2015-07-11 23:43:23 +00:00
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#ifndef _STM32_DMA2D_H
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#define _STM32_DMA2D_H
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#define OPFCCR_ARGB8888 0x00
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#define OPFCCR_RGB888 0x01
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#define OPFCCR_RGB565 0x02
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#define OPFCCR_ARGB1555 0x03
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#define OPFCCR_ARGB4444 0x04
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2016-06-26 09:07:21 +00:00
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#define FGPFCCR_CM_ARGB8888 0x00
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2015-07-11 23:43:23 +00:00
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#define FGPFCCR_CM_RGB888 0x01
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#define FGPFCCR_CM_RGB565 0x02
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#define DMA2D_CR_MODE_R2M ((uint32_t)0x00030000) /* Register-to-memory mode */
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#define DMA2D_CR_MODE_M2M ((uint32_t)0x00000000) /* Register-to-memory mode */
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static void dma2d_init(void);
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#endif /* _STM32_DMA2D_H */
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