2014-11-09 20:55:15 +00:00
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/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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#ifndef _MAX11802_H
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#define _MAX11802_H
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#define MAX11802_CMD_XPOSITION ((0x52 << 1) | 1)
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#define MAX11802_CMD_YPOSITION ((0x54 << 1) | 1)
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#define MAX11802_CMD_ZPOSITION ((0x56 << 1) | 1)
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// LSB of register addresses specifies read (1) or write (0)
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#define MAX11802_CMD_MEASUREXY (0x70 << 1)
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#define MAX11802_CMD_MEASUREXYZ (0x72 << 1)
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2014-11-14 15:38:40 +00:00
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#define MAX11802_CMD_GEN_WR (0x01 << 1) // General config register
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2014-11-09 20:55:15 +00:00
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#define MAX11802_CMD_RES_WR (0x02 << 1)
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#define MAX11802_CMD_AVG_WR (0x03 << 1)
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#define MAX11802_CMD_SAMPLE_WR (0x04 << 1)
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#define MAX11802_CMD_TIMING_WR (0x05 << 1)
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#define MAX11802_CMD_DELAY_WR (0x06 << 1)
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#define MAX11802_CMD_TDPULL_WR (0x07 << 1)
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#define MAX11802_CMD_MDTIM_WR (0x08 << 1)
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#define MAX11802_CMD_APCONF_WR (0x09 << 1)
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#define MAX11802_CMD_MODE_WR (0x0B << 1)
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#define MAX11802_CMD_MODE_RD ((0x0B << 1) | 1)
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#define MAX11802_CMD_GSR_RD ((0x00 << 1) | 1) // General status register - read-only
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#endif /* _MAX11802_H */
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