From 0a2e251391d40d40baec5dba8463d3c241ca70a5 Mon Sep 17 00:00:00 2001 From: inmarket Date: Mon, 25 Apr 2016 14:57:36 +1000 Subject: [PATCH] Add SSD1848 driver by czhou --- .../gdisp/SSD1848/board_ssd1848_template.h | 53 ++ drivers/gdisp/SSD1848/gdisp_lld_SSD1848.c | 623 ++++++++++++++++++ drivers/gdisp/SSD1848/gdisp_lld_config.h | 32 + drivers/gdisp/SSD1848/ssd1848.h | 290 ++++++++ 4 files changed, 998 insertions(+) create mode 100644 drivers/gdisp/SSD1848/board_ssd1848_template.h create mode 100644 drivers/gdisp/SSD1848/gdisp_lld_SSD1848.c create mode 100644 drivers/gdisp/SSD1848/gdisp_lld_config.h create mode 100644 drivers/gdisp/SSD1848/ssd1848.h diff --git a/drivers/gdisp/SSD1848/board_ssd1848_template.h b/drivers/gdisp/SSD1848/board_ssd1848_template.h new file mode 100644 index 00000000..f8081c19 --- /dev/null +++ b/drivers/gdisp/SSD1848/board_ssd1848_template.h @@ -0,0 +1,53 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +#ifndef _BOARD_SSD1848_H +#define _BOARD_SSD1848_H + +static void init_board(GDisplay *g) { + (void) g; +} + +static void post_init_board(GDisplay *g) { + (void) g; +} + +static void setpin_reset(GDisplay *g, bool_t state) { + (void) g; + (void) state; +} + +static void set_backlight(GDisplay *g, uint8_t percent) { + (void) g; + (void) percent; +} + +static void acquire_bus(GDisplay *g) { + (void) g; +} + +static void release_bus(GDisplay *g) { + (void) g; +} + +static void spi_write_cmd(GDisplay *g, uint8_t cmd) { + (void) g; + (void) cmd; +} + +static void spi_write_data_array(GDisplay *g, uint8_t* datas, size_t length) { + (void) g; + (void) datas; + (void) length; +} + +static void spi_write_data(GDisplay *g, uint8_t data) { + (void) g; + (void) data; +} + +#endif /* _BOARD_SSD1848_H */ diff --git a/drivers/gdisp/SSD1848/gdisp_lld_SSD1848.c b/drivers/gdisp/SSD1848/gdisp_lld_SSD1848.c new file mode 100644 index 00000000..de02a2e1 --- /dev/null +++ b/drivers/gdisp/SSD1848/gdisp_lld_SSD1848.c @@ -0,0 +1,623 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +#include "gfx.h" + +#if GFX_USE_GDISP + +#define GDISP_DRIVER_VMT GDISPVMT_SSD1848 +#include "gdisp_lld_config.h" +#include "../../../src/gdisp/gdisp_driver.h" + +typedef struct LCD_Parameters +{ + uint8_t curXPtr; + uint8_t startXPtr; /* The area start bit position in the start column */ + uint8_t endXPtr; /* The area end bit position in the end column */ + uint8_t curCol; + uint8_t startCol; /* The area start column */ + uint8_t endCol; /* The area end column */ + uint8_t curYPtr; +} LCD_Parameters; + +#include "board_SSD1848.h" +#include /* for memset */ + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#ifndef GDISP_SCREEN_HEIGHT + #define GDISP_SCREEN_HEIGHT 130 +#endif +#ifndef GDISP_SCREEN_WIDTH + #define GDISP_SCREEN_WIDTH 128 +#endif +#ifndef GDISP_INITIAL_CONTRAST + #define GDISP_INITIAL_CONTRAST 80 +#endif +#ifndef GDISP_INITIAL_BACKLIGHT + #define GDISP_INITIAL_BACKLIGHT 100 +#endif +#ifdef SSD1848_PAGE_PREFIX + #define SSD1848_PAGE_WIDTH (GDISP_SCREEN_WIDTH + 1) + #define SSD1848_PAGE_OFFSET 1 +#else + #define SSD1848_PAGE_WIDTH GDISP_SCREEN_WIDTH + #define SSD1848_PAGE_OFFSET 0 +#endif + +#define GDISP_FLG_NEEDFLUSH (GDISP_FLG_DRIVER << 0) + +#include "SSD1848.h" + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/* Some common routines and macros */ +#define PRM(g) ((LCD_Parameters *)g->priv) +#define RAM(g) ((uint8_t *)(PRM(g)+1)) +#define write_cmd2(g, cmd1, cmd2) { spi_write_cmd (g, cmd1); spi_write_data (g, cmd2); } +#define write_cmd3(g, cmd1, cmd2, cmd3) { spi_write_cmd (g, cmd1); spi_write_data2 (g, cmd2, cmd3); } + +#define xyaddr(x, y) (SSD1848_PAGE_OFFSET + (x) + ((y) >> 3) * SSD1848_PAGE_WIDTH) +#define xybit(y) (1 << ((y) & 7)) + + +static void set_viewport (GDisplay* g) +{ + switch (g->g.Orientation) + { + default: + case GDISP_ROTATE_0: + spi_write_cmd (g, SSD1848_HV_COLUMN_ADDRESS); + spi_write_data2 (g, (uint8_t) (g->p.x / 8), (uint8_t) ((g->p.x + g->p.cx - 1) / 8)); + spi_write_cmd (g, SSD1848_HV_PAGE_ADDRESS); + spi_write_data2 (g, g->p.y, g->p.y + g->p.cy - 1); + spi_write_cmd (g, SSD1848_WRITE_DISP_DATA); + break; + + case GDISP_ROTATE_90: + spi_write_cmd (g, SSD1848_HV_COLUMN_ADDRESS); + spi_write_data2 (g, g->p.y, g->p.y + g->p.cy - 1); + spi_write_cmd (g, SSD1848_HV_PAGE_ADDRESS); + spi_write_data2 (g, g->g.Width - g->p.x - g->p.cx, g->g.Width - 1 - g->p.x); + spi_write_cmd (g, SSD1848_WRITE_DISP_DATA); + break; + + case GDISP_ROTATE_180: + spi_write_cmd (g, SSD1848_HV_COLUMN_ADDRESS); + spi_write_data2 (g, g->g.Width - g->p.x - g->p.cx, g->g.Width - 1 - g->p.x); + spi_write_cmd (g, SSD1848_HV_PAGE_ADDRESS); + spi_write_data2 (g, g->g.Height - g->p.y - g->p.cy, g->g.Height - 1 - g->p.y); + spi_write_cmd (g, SSD1848_WRITE_DISP_DATA); + break; + + case GDISP_ROTATE_270: + spi_write_cmd (g, SSD1848_HV_COLUMN_ADDRESS); + spi_write_data2 (g, g->g.Height - g->p.y - g->p.cy, g->g.Height - 1 - g->p.y); + spi_write_cmd (g, SSD1848_HV_PAGE_ADDRESS); + spi_write_data2 (g, g->p.x, g->p.x + g->p.cx - 1); + spi_write_cmd (g, SSD1848_WRITE_DISP_DATA); + break; + } +} + + +/** + * As this controller can't update on a pixel boundary we need to maintain the + * the entire display surface in memory so that we can do the necessary bit + * operations. Fortunately it is a small display in monochrome. + * 128 * 128 / 8 = 2048 bytes. + */ + +LLDSPEC bool_t gdisp_lld_init (GDisplay *g) +{ + uint8_t temp [5] = { 0 }; + + /* The private area is the display surface. */ + g->priv = gfxAlloc (sizeof(DisplayData) + GDISP_SCREEN_WIDTH / 8 * GDISP_SCREEN_HEIGHT); + if (!g->priv) + return FALSE; + memset (g->priv, 0, sizeof(DisplayData) + GDISP_SCREEN_WIDTH / 8 * GDISP_SCREEN_HEIGHT); + + /* Initialise the board interface */ + init_board (g); + + /* Init LCD */ + /* Hardware reset */ + setpin_reset (g, FALSE); + gfxSleepMilliseconds (50); + setpin_reset (g, TRUE); + gfxSleepMilliseconds (50); + setpin_reset (g, FALSE); + + + acquire_bus (g); + gfxSleepMilliseconds (50); + spi_write_cmd (g, SSD1848_ENABLE_INTERNAL_CLOCK); /* 0xD1 */ + spi_write_cmd (g, SSD1848_EXITSLEEP); /* 0x94 */ + gfxSleepMilliseconds (20); + + spi_write_cmd (g, SSD1848_SET_FRAME_FREQ_LINEINVE); + spi_write_data2 (g, 0x00, 0x00); + + temp [0] = 0x00; + temp [1] = 0x0e; + temp [2] = 0x41; + spi_write_cmd (g, SSD1848_SET_BLACK_WHITE); + spi_write_data_array (g, temp, 3); + + temp [0] = 0x00; + temp [1] = 0x00; + temp [2] = 0x00; + spi_write_cmd (g, SSD1848_DATA_OUTPUT_SCAN_DIR); + spi_write_data_array (g, temp, 3); + + spi_write_cmd (g, SSD1848_SETSTARTLINE); + spi_write_data (g, 0x00); + + spi_write_cmd (g, SSD1848_COM_OUTPUT_SCAN_DIR); + spi_write_data (g, 0x01); + + spi_write_cmd (g, SSD1848_SETDISP_CTRL); /* 0xCA */ + temp [0] = 0x00; + temp [1] = 0x20; /* 0x1F */ + temp [2] = 0x00; + spi_write_data_array (g, temp, 3); + + + spi_write_cmd (g, SSD1848_SETPOWER_CTRL); /* 0x20 */ + spi_write_data (g, 0x0F); + + gfxSleepMilliseconds (150); + + spi_write_cmd (g, SSD1848_SETCONTRAST); /* 0x81 */ + spi_write_data2 (g, 0x28, 0x06); + + spi_write_cmd (g, SSD1848_TEMP_COMPENSATION); + spi_write_data (g, 0x01); + + spi_write_cmd (g, SSD1848_SET_BIASING_LOCK); /* 0xFB */ + spi_write_data (g, 0x02); + + spi_write_cmd (g, 0xF3); + temp [0] = 0xc4; + temp [1] = 0x15; + temp [2] = 0x00; + temp [3] = 0x80; + spi_write_data_array (g, temp, 4); + + spi_write_cmd (g, SSD1848_SET_FRAME_FREQ_LINEINVE); + temp [0] = 0x40; + temp [1] = 0x04; + temp [2] = 0x10; + temp [3] = 0x01; + spi_write_data_array (g, temp, 4); + + spi_write_cmd (g, SSD1848_DISPLAYON); + + spi_write_cmd (g, SSD1848_DUAL_OPT_SET); + spi_write_data2 (g, 0x1F, 0x06); + + release_bus (g); + + /* Finish Init */ + post_init_board (g); + + /* Initialise the GDISP structure */ + g->g.Width = GDISP_SCREEN_WIDTH; + g->g.Height = GDISP_SCREEN_HEIGHT; + g->g.Orientation = GDISP_ROTATE_0; + g->g.Powermode = powerOn; + g->g.Backlight = GDISP_INITIAL_BACKLIGHT; + g->g.Contrast = GDISP_INITIAL_CONTRAST; + return TRUE; +} + +#if GDISP_HARDWARE_STREAM_WRITE +LLDSPEC void gdisp_lld_write_start (GDisplay *g) +{ + acquire_bus (g); + set_viewport (g); + + PRM(g)->curCol = PRM(g)->startCol = (uint8_t) (g->p.x / 8); + PRM(g)->endCol = (uint8_t) ((g->p.x + g->p.cx - 1) / 8); + PRM(g)->curXPtr = PRM(g)->startXPtr = (uint8_t) (g->p.x % 8); + PRM(g)->endXPtr = (uint8_t) ((g->p.x + g->p.cx - 1) % 8); + PRM(g)->curYPtr = g->p.y; +} +LLDSPEC void gdisp_lld_write_color (GDisplay *g) +{ + uint8_t temp; + uint8_t a; + uint16_t y = PRM(g)->curYPtr; + uint16_t c = PRM(g)->curCol; + + temp = RAM (g)[y * 16 + c]; + if (gdispColor2Native (g->p.color)) + { + temp |= 0x80 >> PRM(g)->curXPtr; + } + else + { + temp &= ~(0x80 >> PRM(g)->curXPtr); + } + RAM (g)[y * 16 + c] = temp; + + PRM(g)->curXPtr++; + if (PRM(g)->curXPtr == 8) + { + spi_write_data (g, temp); + if (PRM(g)->curCol == PRM(g)->endCol) + { + PRM(g)->curYPtr++; + PRM(g)->curCol = PRM(g)->startCol; + PRM(g)->curXPtr = PRM(g)->startXPtr; + } + else + { + PRM(g)->curCol++; + PRM(g)->curXPtr = 0; + } + } + + /* If hit the boundary, flush the byte */ + else if ((PRM(g)->curCol == PRM(g)->endCol) && + (PRM(g)->curXPtr == PRM(g)->endXPtr + 1)) + { + spi_write_data (g, temp); + PRM(g)->curXPtr = PRM(g)->startXPtr; + PRM(g)->curCol = PRM(g)->startCol; + PRM(g)->curYPtr++; + } +} +LLDSPEC void gdisp_lld_write_stop (GDisplay *g) +{ + release_bus (g); +} +#endif + +#if GDISP_HARDWARE_FLUSH +LLDSPEC void gdisp_lld_flush (GDisplay *g) +{ + uint8_t * ram; + unsigned pages; + + /* Don't flush if we don't need it. */ + if (!(g->flags & GDISP_FLG_NEEDFLUSH)) + return; + ram = RAM (g); + pages = GDISP_SCREEN_WIDTH / 8; + + acquire_bus (g); + spi_write_cmd (g, SSD1848_SETSTARTLINE | 0); + + while (pages--) + { + spi_write_data_array (g, ram, SSD1848_PAGE_WIDTH); + ram += SSD1848_PAGE_WIDTH; + } + release_bus (g); + + g->flags &= ~GDISP_FLG_NEEDFLUSH; +} +#endif + +#if GDISP_HARDWARE_CLEARS +LLDSPEC void gdisp_lld_clear (GDisplay *g) +{ + uint16_t area = GDISP_SCREEN_WIDTH / 8 * GDISP_SCREEN_HEIGHT; + + if (gdispColor2Native (g->p.color)) + { + memset (RAM (g), 0xFF, GDISP_SCREEN_WIDTH / 8 * GDISP_SCREEN_HEIGHT); + } + else + { + memset (RAM (g), 0, GDISP_SCREEN_WIDTH / 8 * GDISP_SCREEN_HEIGHT); + } + + acquire_bus (g); + spi_write_cmd (g, SSD1848_HV_COLUMN_ADDRESS); + spi_write_data2 (g, 0, 15); + spi_write_cmd (g, SSD1848_HV_PAGE_ADDRESS); + spi_write_data2 (g, 0, 129); + spi_write_cmd (g, SSD1848_WRITE_DISP_DATA); + + for (; area; area--) + { + spi_write_data (g, 0); + } + release_bus (g); +} +#endif + +#if GDISP_HARDWARE_FILLS +LLDSPEC void gdisp_lld_fill_area (GDisplay *g) +{ + coord_t scol, ecol, sx, ex; + coord_t y, col, x; + uint16_t area = (uint16_t) g->p.cx * g->p.cy; + uint8_t temp; + + col = scol = (uint8_t) (g->p.x / 8); + ecol = (uint8_t) ((g->p.x + g->p.cx - 1) / 8); + x = sx = (uint8_t) (g->p.x % 8); + ex = (uint8_t) ((g->p.x + g->p.cx - 1) % 8); + y = g->p.y; + + + acquire_bus (g); + set_viewport (g); + for (; area; area--) + { + temp = RAM (g)[y * 16 + col]; + if (gdispColor2Native (g->p.color)) + { + temp |= (0x80 >> x); + } + else + { + temp &= ~(0x80 >> x); + } + RAM (g)[y * 16 + col] = temp; + + if (++x == 8) + { + spi_write_data (g, temp); + if (col == ecol) + { + y++; + col = scol; + x = sx; + } + else + { + col++; + x = 0; + } + } + + /* If hit the boundary, flush the byte */ + else if ((col == ecol) && (x == ex + 1)) + { + spi_write_data (g, temp); + x = sx; + col = scol; + y++; + } + } + release_bus (g); +} +#endif + +#if GDISP_HARDWARE_DRAWPIXEL +LLDSPEC void gdisp_lld_draw_pixel (GDisplay *g) +{ + coord_t x, y; + + switch (g->g.Orientation) + { + default: + case GDISP_ROTATE_0: + x = g->p.x; + y = g->p.y; + break; + + case GDISP_ROTATE_90: + x = g->p.y; + y = GDISP_SCREEN_HEIGHT - 1 - g->p.x; + break; + + case GDISP_ROTATE_180: + x = GDISP_SCREEN_WIDTH - 1 - g->p.x; + y = GDISP_SCREEN_HEIGHT - 1 - g->p.y; + break; + + case GDISP_ROTATE_270: + x = GDISP_SCREEN_WIDTH - 1 - g->p.y; + y = g->p.x; + break; + } + if (gdispColor2Native (g->p.color) != gdispColor2Native (Black)) + RAM (g)[xyaddr (x, y)] |= xybit (y); + else + RAM (g)[xyaddr (x, y)] &= ~xybit(y); + g->flags |= GDISP_FLG_NEEDFLUSH; +} +#endif + +#if GDISP_HARDWARE_PIXELREAD +LLDSPEC color_t gdisp_lld_get_pixel_color (GDisplay *g) +{ + coord_t x, y; + + switch (g->g.Orientation) + { + default: + case GDISP_ROTATE_0: + x = g->p.x; + y = g->p.y; + break; + + case GDISP_ROTATE_90: + x = g->p.y; + y = GDISP_SCREEN_HEIGHT - 1 - g->p.x; + break; + + case GDISP_ROTATE_180: + x = GDISP_SCREEN_WIDTH - 1 - g->p.x; + y = GDISP_SCREEN_HEIGHT - 1 - g->p.y; + break; + + case GDISP_ROTATE_270: + x = GDISP_SCREEN_WIDTH - 1 - g->p.y; + y = g->p.x; + break; + } + return (RAM (g)[xyaddr (x, y)] & xybit (y)) ? White : Black; +} +#endif + +#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL +LLDSPEC void gdisp_lld_control (GDisplay *g) +{ + switch (g->p.x) + { + case GDISP_CONTROL_POWER: + if (g->g.Powermode == (powermode_t) g->p.ptr) + return; + switch ((powermode_t) g->p.ptr) + { + case powerOff: + acquire_bus (g); + spi_write_cmd (g, SSD1848_SETCONTRAST); + spi_write_data2 (g, 0x00, 0x00); /* Drop the contrast & gain */ + spi_write_cmd (g, SSD1848_DISPLAYOFF); + spi_write_cmd (g, SSD1848_ENTERSLEEP); + release_bus (g); + break; + + case powerSleep: + case powerDeepSleep: + acquire_bus (g); + spi_write_cmd (g, SSD1848_ENTERSLEEP); + release_bus (g); + break; + + case powerOn: + acquire_bus (g); + spi_write_cmd (g, SSD1848_EXITSLEEP); /* need this in case we were in 'normal' sleep mode */ + gfxSleepMilliseconds (5); + spi_write_cmd (g, SSD1848_DISPLAYON); + release_bus (g); + break; + + default: + return; + } + g->g.Powermode = (powermode_t) g->p.ptr; + return; + + case GDISP_CONTROL_ORIENTATION: + if (g->g.Orientation == (orientation_t) g->p.ptr) + return; + switch ((orientation_t) g->p.ptr) + { + /* Rotation is handled by the drawing routines */ + case GDISP_ROTATE_0: + case GDISP_ROTATE_180: + g->g.Height = GDISP_SCREEN_HEIGHT; + g->g.Width = GDISP_SCREEN_WIDTH; + break; + + case GDISP_ROTATE_90: + case GDISP_ROTATE_270: + g->g.Height = GDISP_SCREEN_WIDTH; + g->g.Width = GDISP_SCREEN_HEIGHT; + break; + + default: + return; + } + g->g.Orientation = (orientation_t) g->p.ptr; + return; + + case GDISP_CONTROL_CONTRAST: + if ((unsigned) g->p.ptr > 100) + g->p.ptr = (void *) 100; + acquire_bus (g); + spi_write_cmd (g, SSD1848_SETCONTRAST); + spi_write_data (g, (((uint16_t) g->p.ptr) << 8) / 101); + release_bus (g); + g->g.Contrast = (uint8_t) g->p.ptr; + return; + + /* Our own special controller code to inverse the display */ + /* 0 = normal, 1 = inverse */ + case GDISP_CONTROL_INVERSE: + acquire_bus (g); + spi_write_cmd (g, g->p.ptr ? SSD1848_INVERTDISPLAY : SSD1848_NORMALDISPLAY); + release_bus (g); + return; + } +} +#endif /* GDISP_NEED_CONTROL */ + + +#if GDISP_HARDWARE_BITFILLS +LLDSPEC void gdisp_lld_blit_area (GDisplay *g) +{ + coord_t scol, ecol, sx; + coord_t y, col; + uint16_t area; + uint8_t temp, temp2, i; + + col = scol = (uint8_t) (g->p.x / 8); + ecol = (uint8_t) ((g->p.x + g->p.cx - 1) / 8); + sx = (uint8_t) (g->p.x % 8); + y = g->p.y; + area = (ecol - scol + 1) * (g->p.cy); + + + acquire_bus (g); + set_viewport (g); + + /* Bitfill align with Column */ + if (sx == 0) + { + for (; area; area--) + { + temp = RAM (g)[y * 16 + col] = *((uint8_t *) g->p.ptr)++; + spi_write_data (g, temp); + if (col == ecol) + { + y++; + col = scol; + } + else + { + col++; + } + } + } + else + { + /* Bitfil doesn't align with column */ + for (; area; area--) + { + temp = RAM (g)[y * 16 + col]; + if (col != ecol) + { + temp |= (*((uint8_t *) g->p.ptr) >> sx); + RAM (g)[y * 16 + col] = temp; + + temp2 = RAM (g)[y * 16 + col + 1]; + temp2 |= (*((uint8_t *) g->p.ptr) << (8-sx)); + RAM (g)[y * 16 + col + 1] = temp2; + ((uint8_t *) g->p.ptr)++; + } + + spi_write_data (g, temp); + if (col == ecol) + { + y++; + col = scol; + } + else + { + col++; + } + } + } + release_bus (g); +} +#endif + +#endif /* GFX_USE_GDISP */ diff --git a/drivers/gdisp/SSD1848/gdisp_lld_config.h b/drivers/gdisp/SSD1848/gdisp_lld_config.h new file mode 100644 index 00000000..c7e7d906 --- /dev/null +++ b/drivers/gdisp/SSD1848/gdisp_lld_config.h @@ -0,0 +1,32 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +#ifndef _GDISP_LLD_CONFIG_H +#define _GDISP_LLD_CONFIG_H + +#if GFX_USE_GDISP + +/*===========================================================================*/ +/* Driver hardware support. */ +/*===========================================================================*/ + +#define GDISP_HARDWARE_FLUSH TRUE /* This controller requires flushing */ +#define GDISP_HARDWARE_CONTROL TRUE +#define GDISP_HARDWARE_FILLS TRUE +#define GDISP_HARDWARE_STREAM_WRITE TRUE +#define GDISP_HARDWARE_CLEARS TRUE +#define GDISP_HARDWARE_BITFILLS TRUE + +#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO + +/* This controller supports a special gdispControl() to inverse the display. */ +/* Pass a parameter of 1 for inverse and 0 for normal. */ +#define GDISP_CONTROL_INVERSE (GDISP_CONTROL_LLD + 0) + +#endif /* GFX_USE_GDISP */ + +#endif /* _GDISP_LLD_CONFIG_H */ diff --git a/drivers/gdisp/SSD1848/ssd1848.h b/drivers/gdisp/SSD1848/ssd1848.h new file mode 100644 index 00000000..5b7fa576 --- /dev/null +++ b/drivers/gdisp/SSD1848/ssd1848.h @@ -0,0 +1,290 @@ +/* + * This file is subject to the terms of the GPL License. + */ + +#ifndef _SSD1848_H +#define _SSD1848_H + +/* + * Set the start column address by X5X4X3X2X1X0 + * Set the end column address by Y5Y4Y3Y2Y1Y0 + * Column address = 00000000b (POR) + * Column address is in a range of 0~32 (0x00~0x20). + */ +#define SSD1848_HV_COLUMN_ADDRESS 0x15 + +/* + * Set the start page address by X7X6X5X4X3X2X1X0 + * Set the end page address by Y7Y6Y5Y4Y3Y2Y1Y0 + * Page address = 00000000b (POR) + * Page address is in a range of 0~129 (0x00~0x81). + */ +#define SSD1848_HV_PAGE_ADDRESS 0x75 + +/* + * X2 X1 X0 ROW0…ROW64 ROW65…ROW129 + * 0 0 0 COM0 ->COM64 COM65-> COM129(POR) + * 0 0 1 COM0->COM64 COM129<-COM65 + * 0 1 0 COM64<-COM0 COM65->COM129 + * 0 1 1 COM64<-COM0 COM129<-COM65 + */ +#define SSD1848_COM_OUTPUT_SCAN_DIR 0xBB + +/* + * a) Normal or Reverse page/column/RAM access/scan + * directions + * P10 = 0: set page address to normal display (POR) + * P10 = 1: set page address to inverse display + * P11 = 0: set column address to normal rotation (POR) + * P11 = 1: set column address to inverse rotation + * P12 = 0: set scan direction to column scan(POR) + * P12 = 1: set scan direction to page scan + * P13 = 0: set normal scan direction (POR) + * P13 = 1: set inverse scan direction + * + * b) Gray-scale setting + * X = Light gray PWM count (POR 5 counts) + * Y = Dark gray PWM count (POR 10 counts) + * P22P21P20 = X -1 (POR 100) + * P25P24P23 = Y - X - 1 (POR 100) + * Remark: Y-X≤8 + * + * # Remarks: The PWM count for White and Black are 0 and 15 respectively. + * + * P30 = 0: PWM (POR) + * P34 = 0: + * White | Light Gray | Dark Gray | Black + * 0% | 33% | 66% | 100% + * + * P34 = 1: + * White | Light Gray | Dark Gray | Black + * 0% | X/15 | Y/15 | 100% + * + * P30 = 1: FRC + * P31 = 0: 3-frame FRC (POR) + * White | Light Gray | Dark Gray | Black + * 0% | 33% | 66% | 100% + * + * P31 = 1: 4-frame FRC + * P33 P32 | White | Light Gray | Dark Gray | Black + * 00(POR) | 0% | 25% | 75% | 100% + * 01 | 0% | 50% | 75% | 100% + * 10 | 0% | 25% | 50% | 100% + * 11 | Reserved + */ +#define SSD1848_DATA_OUTPUT_SCAN_DIR 0xBC + +/* @ + * Driver duty selection + * Select driver duty from 1/16 to 1/128. As Y5Y4Y3Y2Y1Y0 is increased + * from 000011b to 011111b, the number of display lines, N is increased + * at the same rating. To specify the Y5Y4Y3Y2Y1Y0 = (N/4)-1 where 1/N + * is the driver duty. + * + * Y5Y4Y3Y2Y1Y0 = 100000b for 1/130 duty. + */ +#define SSD1848_SETDISP_CTRL 0xCA + +/* @ + * X0=0: turns off the reference voltage generator (POR) + * X0=1: turns on the reference voltage generator + * X1=0: turns off the internal regulator and voltage follower (POR) + * X1=1: turns on the internal regulator and voltage follower + * + * Select booster level + * X4 X3 X2 Boost level + * 0 0 0 4X + * 0 0 1 5X + * 0 1 0 6X (POR) + * 0 1 1 7X + */ +#define SSD1848_SETPOWER_CTRL 0x20 + +/* + * a) Select contrast level from 64 contrast steps Contrast increases + * as X5X4X3X2X1X0 is increased from 000000b to 111111b. + * X5X4X3X2X1X0 = 100000b (POR) + * + * b) The internal regulator gain (1+R2/R1) VOUT increases as Y2Y1Y0 + * is increased from 000b to 111b. + * + * The factor, 1+R2/R1, is given by: + * Y2Y1Y0 = 000: 3.38 (POR) + * Y2Y1Y0 = 001: 4.41 + * Y2Y1Y0 = 010: 5.44 + * Y2Y1Y0 = 011: 6.47 + * Y2Y1Y0 = 100: 7.50 + * Y2Y1Y0 = 101: 8.52 + * Y2Y1Y0 = 110: 9.55 + * Y2Y1Y0 = 111: 10.58 + */ +#define SSD1848_SETCONTRAST 0x81 + +/* + * X7X6X5X4X3X2X1X0 : End COM Address = 00000000b (POR) + */ +#define SSD1848_ENABLE_PARTIAL_DISP 0xA8 +#define SSD1848_EXIT_PARTIAL_DISP 0xA9 + +#define SSD1848_DISPLAYOFF 0xAE +#define SSD1848_DISPLAYON 0xAF + +#define SSD1848_EXITSLEEP 0x94 +#define SSD1848_ENTERSLEEP 0x95 + +#define SSD1848_ENABLE_INTERNAL_CLOCK 0xD1 +#define SSD1848_DISABLE_INTERNAL_CLOCK 0xD2 + + + +/* + * VOUT average temperature gradients + * X1 X0 Average Temperature + * Gradient [%/oC] + * 0 0 -0.01 (POR) + * 0 1 -0.06 + */ +#define SSD1848_TEMP_COMPENSATION 0x82 + +/* + * Enter the "write display data mode" by executing + * the command 01011100b. The following byte is + * used to specify the data byte to be written to the + * GDDRAM directly. + * The D/C bit should be stated at logic "1" during the + * display data is written to the GDDRAM. + */ +#define SSD1848_WRITE_DISP_DATA 0x5C + +/* + * Allow user to set bias from 1/ 4 to 1/13 + * B3B2B1B0 Bias ratio + * 1 0 0 1 1/4 bias + * 1 0 0 0 1/5 bias + * 0 1 1 1 1/6 bias + * 0 1 1 0 1/7 bias + * 0 1 0 1 1/8 bias + * 0 1 0 0 1/9 bias + * 0 0 1 1 1/10 bias + * 0 0 1 0 1/11 bias + * 0 0 0 1 1/12 bias + * 0 0 0 0 1/13 bias (POR) + * L0 Lock and unlock Cmd + * 0 unlock (POR) + * 1 lock and no more cmd/data is written to driver + * The 2nd byte is sent as Cmd if L0 is set to 1 + */ +#define SSD1848_SET_BIASING_LOCK 0xFB + +/* + * This command uses to change the frame + * frequency; set the N-line inversion and N-line + * inversion mode + * X0 = 1 (POR) X0 = 0 + * F4F3F2F1F0 + * 00000 : 56.4 Hz (POR) 64Hz + * 00111 : +10.1% +11.8% + * 01000 : +10.7% +15.2% + * 01001 : +12.5% +15.2% + * 01010 : +14.1% +20.6% + * 01011 : +16.1% +20.6% + * 01100 : +17.4% +25.9% + * 01101 : +19.5% +25.9% + * 01110 : +21.4% +32.9% + * 01111 : +23.7% +32.9% + * 10000 : +24.6% +37.4% + * 10001 : +27.1% +37.4% + * 10010 : +29.2% +46.0% + * 10011 : +31.8% +46.0% + * 10100 : +33.6% +54.6% + * 10101 : +36.5% +54.6% + * 10110 : +39.0% +66.9% + * 10111 : +42.2% +66.9% + * 11000 : +43.2% +75.8% + * 11001 : +46.6% +75.8% + * 11010 : +49.7% +94.0% + * + * Remark: The frame frequency is typical value + * for 130mux and PWM mode. + * The second byte data N5N4N3N2N1N0 sets the nline + * inversion register from 2 to 64 lines to + * reduce display crosstalk. Register values from + * 000001b to 111111b are mapped to 2 lines to 64 + * lines respectively. Value 00000b disables the Nline + * inversion. 010000 is the POR value. To + * avoid a fix polarity at some lines, it should be + * noted that the total number of mux should NOT + * be a multiple of the lines of inversion (n). + * N6 + * 0 – reset n-line counter per frame (POR) + * 1 – will not reset n-line counter per frame + */ +#define SSD1848_SET_FRAME_FREQ_LINEINVE 0xF2 + + +#define SSD1848_DUAL_OPT_SET 0xF6 +#define SSD1848_SET_BLACK_WHITE 0xF7 +#define SSD1848_OTP 0xF8 + + +#define SSD1848_NORMALDISPLAY 0xA6 +#define SSD1848_INVERTDISPLAY 0xA7 + +/* + * This command specifies 1st Com line function. Byte A specifies the first + * display line which the graphic start to display. At POR, the 1st Com line + * is set to 00000000b (0 lines). + */ +#define SSD1848_SETSTARTLINE 0x44 + + + + +/* Scrolling #defines */ +/* + * a) Top Block Address + * X7X6X5X4X3X2X1X0 is used to specify the row + * address at the top of the scrolling area. + * Top row address = 00000000b (POR) + * + * b) Bottom Block Address + * Y7Y6Y5Y4Y3Y2Y1Y0 is used to specify the row + * address at the bottom of the scrolling area. + * Bottom row address = 00000000b (POR) + * + * c) Number of specified Blocks + * The number of specified blocks = Number of (Top + * fixed area + Scroll area) blocks –1. If bottom scroll + * or whole screen scroll mode is chosen, the number + * of specified blocks is set to Z7Z6Z5Z4Z3Z2Z1Z0 + * Number of specified blocks = 00000000b (POR) + * + * d) Area Scroll Mode + * There are four types of area scroll. + * P41 P40 Types of Area Scroll + * 0 0 Center Screen Scroll + * 0 1 Top Screen Scroll + * 1 0 Bottom Screen Scroll + * 1 1 Whole Screen Scroll + * Type of area scroll = Whole Screen Scroll (POR) + */ +#define SSD1848_SET_AREA_SCROLL 0xAA + +/* + * X5X4X3X2X1X0 specify the start row address + * of area scrolling. + * Start block address = 00000000b (POR) + */ +#define SSD1848_SCROLL_START 0xAB + +/* + * Enter the "read display data mode" by executing + * the command 01011101b. The next byte is a + * dummy data. The GDDRAM data will be read + * form the second byte. The GDDRAM column + * address pointer will be increased by one + * automatically after each 2-bytes data read. + */ +#define SSD1848_READ_DISP_DATA 0x5D + +#endif /* _SSD1848_H */