SSD2119: reorganization of files
- Added FSMC board file (_fsmc suffix) - working. - Added GPIO board file (no suffix) - not working. - Removed unneeded files.ugfx_release_2.6
resset
parent
e097426338
commit
2de39e3302
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@ -58,6 +58,8 @@
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#if defined(GDISP_USE_CUSTOM_BOARD) && GDISP_USE_CUSTOM_BOARD
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/* Include the user supplied board definitions */
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#include "gdisp_lld_board.h"
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#elif defined(BOARD_EMBEST_DMSTF4BB_FSMC)
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#include "gdisp_lld_board_embest_dmstf4bb_fsmc.h"
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#elif defined(BOARD_EMBEST_DMSTF4BB)
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#include "gdisp_lld_board_embest_dmstf4bb.h"
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#else
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@ -172,30 +174,49 @@ bool_t GDISP_LLD(init)(void) {
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// Get the bus for the following initialisation commands
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acquire_bus();
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// Enter sleep mode (if we are not already there).
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write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0001);
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delay(5);
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// Set initial power parameters.
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write_reg(SSD2119_REG_PWR_CTRL_5, 0x00B2);
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delay(5);
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write_reg(SSD2119_REG_VCOM_OTP_1, 0x0006);
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delay(5);
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// Start the oscillator.
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write_reg(SSD2119_REG_OSC_START, 0x0001);
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delay(5);
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// Set pixel format and basic display orientation (scanning direction).
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write_reg(SSD2119_REG_OUTPUT_CTRL, 0x30EF);
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delay(5);
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write_reg(SSD2119_REG_LCD_DRIVE_AC_CTRL, 0x0600);
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delay(5);
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// Exit sleep mode.
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write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000);
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delay(5);
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// Configure pixel color format and MCU interface parameters.
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write_reg(SSD2119_REG_ENTRY_MODE, 0x6830); // ENTRY_MODE_DEFAULT
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delay(5);
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// Set analog parameters.
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write_reg(SSD2119_REG_SLEEP_MODE_2, 0x0999);
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delay(5);
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write_reg(SSD2119_REG_ANALOG_SET, 0x3800);
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delay(5);
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// Enable the display.
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write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033);
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delay(5);
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// Set VCIX2 voltage to 6.1V.
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write_reg(SSD2119_REG_PWR_CTRL_2, 0x0005);
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delay(5);
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// Configure gamma correction.
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write_reg(SSD2119_REG_GAMMA_CTRL_1, 0x0000);
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delay(5);
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write_reg(SSD2119_REG_GAMMA_CTRL_2, 0x0303);
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@ -216,10 +237,14 @@ bool_t GDISP_LLD(init)(void) {
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delay(5);
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write_reg(SSD2119_REG_GAMMA_CTRL_10, 0x1000);
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delay(5);
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// Configure Vlcd63 and VCOMl.
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write_reg(SSD2119_REG_PWR_CTRL_3, 0x000A);
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delay(5);
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write_reg(SSD2119_REG_PWR_CTRL_4, 0x2E00);
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delay(5);
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// Set the display size and ensure that the GRAM window is set to allow access to the full display buffer.
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write_reg(SSD2119_REG_V_RAM_POS, (GDISP_SCREEN_HEIGHT - 1) << 8);
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delay(5);
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write_reg(SSD2119_REG_H_RAM_START, 0x0000);
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@ -29,10 +29,14 @@
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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/* Using FSMC A19 (PE3) as DC */
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#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* DC = 0 */
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#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* DC = 1 */
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#define SET_CS palSetPad(GPIOD, 7);
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#define CLR_CS palClearPad(GPIOD, 7);
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#define SET_DC palSetPad(GPIOE, 3);
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#define CLR_DC palClearPad(GPIOE, 3);
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#define SET_WR palSetPad(GPIOD, 5);
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#define CLR_WR palClearPad(GPIOD, 5);
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#define SET_RD palSetPad(GPIOD, 4);
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#define CLR_RD palClearPad(GPIOD, 4);
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#define SET_RST palSetPad(GPIOD, 3);
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#define CLR_RST palClearPad(GPIOD, 3);
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@ -43,34 +47,45 @@
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* @notapi
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*/
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static __inline void init_board(void) {
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unsigned char FSMC_Bank;
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/* STM32F2-F4 FSMC init */
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rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
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// D0 - D15
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palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 15, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 0, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 1, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 7, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 8, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 9, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 10, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 11, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 12, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 13, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 14, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOE, 15, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 8, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 9, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 10, PAL_MODE_OUTPUT_PUSHPULL);
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/* set pins to FSMC mode */
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IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
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(1 << 9) | (1 << 10) | (1 << 14) | (1 << 15), 0};
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// RST
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palSetPadMode(GPIOD, 3, PAL_MODE_OUTPUT_PUSHPULL);
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IOBus busE = {GPIOE, (1 << 3) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
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(1 << 13) | (1 << 14) | (1 << 15), 0};
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// CS
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palSetPadMode(GPIOD, 7, PAL_MODE_OUTPUT_PUSHPULL);
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// DC
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palSetPadMode(GPIOE, 3, PAL_MODE_OUTPUT_PUSHPULL);
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// RD
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palSetPadMode(GPIOD, 4, PAL_MODE_OUTPUT_PUSHPULL);
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// WR
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palSetPadMode(GPIOD, 5, PAL_MODE_OUTPUT_PUSHPULL);
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/* FSMC is an alternate function 12 (AF12). */
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palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
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palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
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/* Configure the pins to a well know state */
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SET_DC;
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SET_RD;
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SET_WR;
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CLR_CS;
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//SET_RST;
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FSMC_Bank = 0;
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/* FSMC timing */
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FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
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| (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
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| (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
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/* Bank1 NOR/SRAM control register configuration
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* This is actually not needed as already set by default after reset */
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FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
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/* Display backlight always on. */
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/* Display backlight always on */
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palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPad(GPIOD, 13);
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}
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@ -79,7 +94,7 @@ static __inline void init_board(void) {
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* @brief Set or clear the lcd reset pin.
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*
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* @param[in] state TRUE = lcd in reset, FALSE = normal operation
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*
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*
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* @notapi
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*/
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static __inline void setpin_reset(bool_t state) {
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@ -94,7 +109,7 @@ static __inline void setpin_reset(bool_t state) {
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* @brief Set the lcd back-light level.
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*
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* @param[in] percent 0 to 100%
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*
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*
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* @notapi
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*/
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static __inline void set_backlight(uint8_t percent) {
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@ -104,7 +119,6 @@ static __inline void set_backlight(uint8_t percent) {
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/**
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* @brief Take exclusive control of the bus
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* @note Not needed, not implemented
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*
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* @notapi
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*/
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@ -114,7 +128,6 @@ static __inline void acquire_bus(void) {
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/**
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* @brief Release exclusive control of the bus
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* @note Not needed, not implemented
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*
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* @notapi
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*/
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@ -130,18 +143,58 @@ static __inline void release_bus(void) {
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* @notapi
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*/
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static __inline void write_index(uint16_t index) {
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GDISP_REG = index;
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// D0 - D15
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palWritePad(GPIOD, 14, index & 1);
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palWritePad(GPIOD, 15, (index >> 1) & 1);
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palWritePad(GPIOD, 0, (index >> 2) & 1);
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palWritePad(GPIOD, 1, (index >> 3) & 1);
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palWritePad(GPIOE, 7, (index >> 4) & 1);
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palWritePad(GPIOE, 8, (index >> 5) & 1);
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palWritePad(GPIOE, 9, (index >> 6) & 1);
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palWritePad(GPIOE, 10, (index >> 7) & 1);
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palWritePad(GPIOE, 11, (index >> 8) & 1);
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palWritePad(GPIOE, 12, (index >> 9) & 1);
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palWritePad(GPIOE, 13, (index >> 10) & 1);
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palWritePad(GPIOE, 14, (index >> 11) & 1);
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palWritePad(GPIOE, 15, (index >> 12) & 1);
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palWritePad(GPIOD, 8, (index >> 13) & 1);
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palWritePad(GPIOD, 9, (index >> 14) & 1);
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palWritePad(GPIOD, 10, (index >> 15) & 1);
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/* Control lines */
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CLR_DC; CLR_WR; SET_WR; SET_DC;
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}
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/**
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* @brief Send data to the lcd.
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*
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* @param[in] data The data to send
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*
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*
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* @notapi
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*/
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static __inline void write_data(uint16_t data) {
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GDISP_RAM = data;
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// D0 - D15
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palWritePad(GPIOD, 14, data & 1);
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palWritePad(GPIOD, 15, (data >> 1) & 1);
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palWritePad(GPIOD, 0, (data >> 2) & 1);
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palWritePad(GPIOD, 1, (data >> 3) & 1);
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palWritePad(GPIOE, 7, (data >> 4) & 1);
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palWritePad(GPIOE, 8, (data >> 5) & 1);
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palWritePad(GPIOE, 9, (data >> 6) & 1);
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palWritePad(GPIOE, 10, (data >> 7) & 1);
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palWritePad(GPIOE, 11, (data >> 8) & 1);
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palWritePad(GPIOE, 12, (data >> 9) & 1);
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palWritePad(GPIOE, 13, (data >> 10) & 1);
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palWritePad(GPIOE, 14, (data >> 11) & 1);
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palWritePad(GPIOE, 15, (data >> 12) & 1);
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palWritePad(GPIOD, 8, (data >> 13) & 1);
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palWritePad(GPIOD, 9, (data >> 14) & 1);
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palWritePad(GPIOD, 10, (data >> 15) & 1);
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/* Control lines */
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CLR_WR; SET_WR;
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}
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#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
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@ -151,11 +204,24 @@ static __inline void write_data(uint16_t data) {
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* @return The data from the lcd
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* @note The chip select may need to be asserted/de-asserted
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* around the actual spi read
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*
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*
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* @notapi
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*/
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static __inline uint16_t read_data(void) {
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return GDISP_RAM;
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uint16_t value;
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/*
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// change pin mode to digital input
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palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
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CLR_RD;
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value = palReadPort(GPIOE);
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value = palReadPort(GPIOE);
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SET_RD;
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// change pin mode back to digital output
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palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
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*/
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return value;
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}
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#endif
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@ -19,7 +19,7 @@
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*/
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/**
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* @file drivers/gdisp/SSD2119/gdisp_lld_board_firebullstm32f103.h
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* @file drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h
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* @brief GDISP Graphic Driver subsystem board interface for the SSD2119 display.
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*
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* @addtogroup GDISP
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@ -29,14 +29,12 @@
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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#define SET_CS palSetPad(GPIOD, 12);
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#define CLR_CS palClearPad(GPIOD, 12);
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#define SET_RS palSetPad(GPIOD, 13);
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#define CLR_RS palClearPad(GPIOD, 13);
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#define SET_WR palSetPad(GPIOD, 14);
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#define CLR_WR palClearPad(GPIOD, 14);
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#define SET_RD palSetPad(GPIOD, 15);
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#define CLR_RD palClearPad(GPIOD, 15);
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/* Using FSMC A19 (PE3) as DC */
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#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* DC = 0 */
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#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* DC = 1 */
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#define SET_RST palSetPad(GPIOD, 3);
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#define CLR_RST palClearPad(GPIOD, 3);
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/**
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* @brief Initialise the board for the display.
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@ -45,37 +43,61 @@
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* @notapi
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*/
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static __inline void init_board(void) {
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palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 12, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, 15, PAL_MODE_OUTPUT_PUSHPULL);
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// Configure the pins to a well know state
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SET_RS;
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SET_RD;
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SET_WR;
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CLR_CS;
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}
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unsigned char FSMC_Bank;
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/* STM32F4 FSMC init */
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rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
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/* Group pins */
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IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
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(1 << 9) | (1 << 10) | (1 << 14) | (1 << 15), 0};
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IOBus busE = {GPIOE, (1 << 3) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
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(1 << 13) | (1 << 14) | (1 << 15), 0};
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/* FSMC is an alternate function 12 (AF12) */
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palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
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palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
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FSMC_Bank = 0;
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/* FSMC timing */
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FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
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| (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
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| (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
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/* Bank1 NOR/SRAM control register configuration
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* This is actually not needed as already set by default after reset */
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FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
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/* Display backlight always on */
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palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPad(GPIOD, 13);
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/* TIM4 is an alternate function 2 (AF2) */
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//palSetPadMode(GPIOD, 13, PAL_MODE_ALTERNATE(2));
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}
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/**
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* @brief Set or clear the lcd reset pin.
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*
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* @param[in] state TRUE = lcd in reset, FALSE = normal operation
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*
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*
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* @notapi
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*/
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static __inline void setpin_reset(bool_t state) {
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(void) state;
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/* Nothing to do here - reset pin tied to Vcc */
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if (state) {
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CLR_RST;
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} else {
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SET_RST;
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}
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}
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/**
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* @brief Set the lcd back-light level.
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*
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* @param[in] percent 0 to 100%
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*
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*
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* @notapi
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*/
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static __inline void set_backlight(uint8_t percent) {
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@ -85,6 +107,7 @@ static __inline void set_backlight(uint8_t percent) {
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/**
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* @brief Take exclusive control of the bus
|
||||
* @note Not needed, not implemented
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
|
|
@ -94,6 +117,7 @@ static __inline void acquire_bus(void) {
|
|||
|
||||
/**
|
||||
* @brief Release exclusive control of the bus
|
||||
* @note Not needed, not implemented
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
|
|
@ -109,20 +133,18 @@ static __inline void release_bus(void) {
|
|||
* @notapi
|
||||
*/
|
||||
static __inline void write_index(uint16_t index) {
|
||||
palWritePort(GPIOE, index);
|
||||
CLR_RS; CLR_WR; SET_WR; SET_RS;
|
||||
GDISP_REG = index;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the lcd.
|
||||
*
|
||||
* @param[in] data The data to send
|
||||
*
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void write_data(uint16_t data) {
|
||||
palWritePort(GPIOE, data);
|
||||
CLR_WR; SET_WR;
|
||||
GDISP_RAM = data;
|
||||
}
|
||||
|
||||
#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
|
||||
|
|
@ -132,24 +154,11 @@ static __inline void write_data(uint16_t data) {
|
|||
* @return The data from the lcd
|
||||
* @note The chip select may need to be asserted/de-asserted
|
||||
* around the actual spi read
|
||||
*
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline uint16_t read_data(void) {
|
||||
uint16_t value;
|
||||
|
||||
// change pin mode to digital input
|
||||
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
|
||||
|
||||
CLR_RD;
|
||||
value = palReadPort(GPIOE);
|
||||
value = palReadPort(GPIOE);
|
||||
SET_RD;
|
||||
|
||||
// change pin mode back to digital output
|
||||
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
return value;
|
||||
return GDISP_RAM;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -1,125 +0,0 @@
|
|||
/*
|
||||
ChibiOS/GFX - Copyright (C) 2012
|
||||
Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||
|
||||
This file is part of ChibiOS/GFX.
|
||||
|
||||
ChibiOS/GFX is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/GFX is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drivers/gdisp/SSD2119/gdisp_lld_board_example.h
|
||||
* @brief GDISP Graphic Driver subsystem board interface for the SSD2119 display.
|
||||
*
|
||||
* @addtogroup GDISP
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _GDISP_LLD_BOARD_H
|
||||
#define _GDISP_LLD_BOARD_H
|
||||
|
||||
/**
|
||||
* @brief Initialise the board for the display.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void init_board(void) {
|
||||
/* Code here */
|
||||
#error "SSD2119: You must supply a definition for init_board for your board"
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set or clear the lcd reset pin.
|
||||
*
|
||||
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void setpin_reset(bool_t state) {
|
||||
/* Code here */
|
||||
#error "SSD2119: You must supply a definition for setpin_reset for your board"
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the lcd back-light level.
|
||||
*
|
||||
* @param[in] percent 0 to 100%
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void set_backlight(uint8_t percent) {
|
||||
/* Code here */
|
||||
#error "SSD2119: You must supply a definition for set_backlight for your board"
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Take exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void acquire_bus(void) {
|
||||
#error "SSD2119: You must supply a definition for acquire_bus for your board"
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Release exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void release_bus(void) {
|
||||
#error "SSD2119: You must supply a definition for release_bus for your board"
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the index register.
|
||||
*
|
||||
* @param[in] index The index register to set
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void write_index(uint16_t index) {
|
||||
/* Code here */
|
||||
#error "SSD2119: You must supply a definition for write_index for your board"
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the lcd.
|
||||
*
|
||||
* @param[in] data The data to send
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void write_data(uint16_t data) {
|
||||
/* Code here */
|
||||
#error "SSD2119: You must supply a definition for write_data for your board"
|
||||
}
|
||||
|
||||
#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Read data from the lcd.
|
||||
*
|
||||
* @return The data from the lcd
|
||||
* @note The chip select may need to be asserted/de-asserted
|
||||
* around the actual spi read
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline uint16_t read_data(void) {
|
||||
/* Code here */
|
||||
#error "SSD2119: You must supply a definition for read_data for your board"
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _GDISP_LLD_BOARD_H */
|
||||
/** @} */
|
||||
|
|
@ -1,164 +0,0 @@
|
|||
/*
|
||||
ChibiOS/GFX - Copyright (C) 2012
|
||||
Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||
|
||||
This file is part of ChibiOS/GFX.
|
||||
|
||||
ChibiOS/GFX is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/GFX is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drivers/gdisp/SSD2119/gdisp_lld_board_example_fsmc.h
|
||||
* @brief GDISP Graphic Driver subsystem board interface for the SSD2119 display.
|
||||
*
|
||||
* @addtogroup GDISP
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _GDISP_LLD_BOARD_H
|
||||
#define _GDISP_LLD_BOARD_H
|
||||
|
||||
#define GDISP_REG ((volatile uint16_t *) 0x60000000)[0] /* RS = 0 */
|
||||
#define GDISP_RAM ((volatile uint16_t *) 0x60020000)[0] /* RS = 1 */
|
||||
|
||||
/**
|
||||
* @brief Initialise the board for the display.
|
||||
* @notes Performs the following functions:
|
||||
* 1. initialise the io port used by your display
|
||||
* 2. initialise the reset pin (initial state not-in-reset)
|
||||
* 3. initialise the chip select pin (initial state not-active)
|
||||
* 4. initialise the backlight pin (initial state back-light off)
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void init_board(void) {
|
||||
const unsigned char FSMC_Bank;
|
||||
|
||||
#if defined(STM32F1XX) || defined(STM32F3XX)
|
||||
/* FSMC setup for F1/F3 */
|
||||
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
|
||||
|
||||
#if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
|
||||
#error "DMA not implemented for F1/F3 Devices"
|
||||
#endif
|
||||
#elif defined(STM32F4XX) || defined(STM32F2XX)
|
||||
/* STM32F2-F4 FSMC init */
|
||||
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
|
||||
|
||||
#if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
|
||||
if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) chSysHalt();
|
||||
dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
|
||||
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
|
||||
#endif
|
||||
#else
|
||||
#error "FSMC not implemented for this device"
|
||||
#endif
|
||||
|
||||
/* set pins to FSMC mode */
|
||||
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
|
||||
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
|
||||
|
||||
IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
|
||||
(1 << 13) | (1 << 14) | (1 << 15), 0};
|
||||
|
||||
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
|
||||
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
|
||||
|
||||
FSMC_Bank = 0;
|
||||
|
||||
/* FSMC timing */
|
||||
FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
|
||||
| (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
|
||||
| (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
|
||||
|
||||
/* Bank1 NOR/SRAM control register configuration
|
||||
* This is actually not needed as already set by default after reset */
|
||||
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set or clear the lcd reset pin.
|
||||
*
|
||||
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void setpin_reset(bool_t state) {
|
||||
(void) state;
|
||||
/* Nothing to do here */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the lcd back-light level.
|
||||
*
|
||||
* @param[in] percent 0 to 100%
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void set_backlight(uint8_t percent) {
|
||||
(void) percent;
|
||||
/* Nothing to do here */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Take exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void acquire_bus(void) {
|
||||
/* Nothing to do here */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Release exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void release_bus(void) {
|
||||
/* Nothing to do here */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the index register.
|
||||
*
|
||||
* @param[in] index The index register to set
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void write_index(uint16_t index) { GDISP_REG = index; }
|
||||
|
||||
/**
|
||||
* @brief Send data to the lcd.
|
||||
*
|
||||
* @param[in] data The data to send
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline void write_data(uint16_t data) { GDISP_RAM = data; }
|
||||
|
||||
#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Read data from the lcd.
|
||||
*
|
||||
* @return The data from the lcd
|
||||
* @note The chip select may need to be asserted/de-asserted
|
||||
* around the actual spi read
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static __inline uint16_t read_data(void) { return GDISP_RAM; }
|
||||
#endif
|
||||
|
||||
#endif /* _GDISP_LLD_BOARD_H */
|
||||
/** @} */
|
||||
Loading…
Reference in New Issue