diff --git a/drivers/gdisp/SSD2119/gdisp_lld.c b/drivers/gdisp/SSD2119/gdisp_lld.c new file mode 100644 index 00000000..b478c6d8 --- /dev/null +++ b/drivers/gdisp/SSD2119/gdisp_lld.c @@ -0,0 +1,670 @@ +/* + ChibiOS/GFX - Copyright (C) 2012 + Joel Bodenmann aka Tectu + + This file is part of ChibiOS/GFX. + + ChibiOS/GFX is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/GFX is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file drivers/gdisp/SSD2119/gdisp_lld.c + * @brief GDISP Graphics Driver subsystem low level driver source for the SSD2119 display. + * + * @addtogroup GDISP + * @{ + */ + +#include "ch.h" +#include "hal.h" +#include "gfx.h" + +#include "ssd2119.h" + +#if GFX_USE_GDISP /*|| defined(__DOXYGEN__)*/ + +/* Include the emulation code for things we don't support */ +#include "gdisp/lld/emulation.c" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#ifndef GDISP_SCREEN_HEIGHT + #define GDISP_SCREEN_HEIGHT 240 +#endif +#ifndef GDISP_SCREEN_WIDTH + #define GDISP_SCREEN_WIDTH 320 +#endif + +#define GDISP_INITIAL_CONTRAST 50 +#define GDISP_INITIAL_BACKLIGHT 100 + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +#if defined(GDISP_USE_CUSTOM_BOARD) && GDISP_USE_CUSTOM_BOARD + /* Include the user supplied board definitions */ + #include "gdisp_lld_board.h" +#elif defined(BOARD_EMBEST_DMSTF4BB_FSMC) + #include "gdisp_lld_board_embest_dmstf4bb_fsmc.h" +#else + /* Include the user supplied board definitions */ + #include "gdisp_lld_board.h" +#endif + +// Some common routines and macros +#define write_reg(reg, data) { write_index(reg); write_data(data); } +#define stream_start() write_index(SSD2119_REG_RAM_DATA); +#define stream_stop() +#define delay(us) chThdSleepMicroseconds(us) +#define delayms(ms) chThdSleepMilliseconds(ms) + +static __inline void set_cursor(coord_t x, coord_t y) { + /* Reg SSD2119_REG_X_RAM_ADDR is 9 bit value + * Reg SSD2119_REG_Y_RAM_ADDR is an 8 bit + * Use a bit mask to make sure they are not set too high + */ + switch(GDISP.Orientation) { + case GDISP_ROTATE_0: + write_reg(SSD2119_REG_X_RAM_ADDR, x & 0x01FF); + write_reg(SSD2119_REG_Y_RAM_ADDR, y & 0x00FF); + break; + case GDISP_ROTATE_90: + write_reg(SSD2119_REG_X_RAM_ADDR, (GDISP_SCREEN_WIDTH - y - 1) & 0x01FF); + write_reg(SSD2119_REG_Y_RAM_ADDR, (GDISP_SCREEN_HEIGHT - x - 1) & 0x00FF); + break; + case GDISP_ROTATE_180: + write_reg(SSD2119_REG_X_RAM_ADDR, (GDISP_SCREEN_WIDTH - 1 - x) & 0x01FF); + write_reg(SSD2119_REG_Y_RAM_ADDR, (GDISP_SCREEN_HEIGHT - 1 - y) & 0x00FF); + break; + case GDISP_ROTATE_270: + write_reg(SSD2119_REG_X_RAM_ADDR, y & 0x01FF); + write_reg(SSD2119_REG_Y_RAM_ADDR, x & 0x00FF); + break; + } +} + +static void set_viewport(coord_t x, coord_t y, coord_t cx, coord_t cy) { + + set_cursor(x, y); + + /* Reg 0x44 - Vertical RAM address position + * Upper Byte - VEA + * Lower Byte - VSA + * 0 <= VSA <= VEA <= 0xEF + * Reg 0x45,0x46 - Horizontal RAM address position + * Lower 9 bits gives 0-511 range in each value, HSA and HEA respectively + * 0 <= HSA <= HEA <= 0x13F + */ + + switch(GDISP.Orientation) { + case GDISP_ROTATE_0: + write_reg(SSD2119_REG_V_RAM_POS, (((y + cy - 1) << 8) & 0xFF00 ) | (y & 0x00FF)); + write_reg(SSD2119_REG_H_RAM_START, (x & 0x01FF)); + write_reg(SSD2119_REG_H_RAM_END, (x + cx - 1) & 0x01FF); + break; + case GDISP_ROTATE_90: + write_reg(SSD2119_REG_V_RAM_POS, (((GDISP_SCREEN_HEIGHT - x - 1) & 0x00FF) << 8) | ((GDISP_SCREEN_HEIGHT - (x + cx)) & 0x00FF)); + write_reg(SSD2119_REG_H_RAM_START, (GDISP_SCREEN_WIDTH - (y + cy)) & 0x01FF); + write_reg(SSD2119_REG_H_RAM_END, (GDISP_SCREEN_WIDTH - y - 1) & 0x01FF); + break; + case GDISP_ROTATE_180: + write_reg(SSD2119_REG_V_RAM_POS, (((GDISP_SCREEN_HEIGHT - y - 1) & 0x00FF) << 8) | ((GDISP_SCREEN_HEIGHT - (y + cy)) & 0x00FF)); + write_reg(SSD2119_REG_H_RAM_START, (GDISP_SCREEN_WIDTH - (x + cx)) & 0x01FF); + write_reg(SSD2119_REG_H_RAM_END, (GDISP_SCREEN_WIDTH - x - 1) & 0x01FF); + break; + case GDISP_ROTATE_270: + write_reg(SSD2119_REG_V_RAM_POS, (((x + cx - 1) << 8) & 0xFF00 ) | (x & 0x00FF)); + write_reg(SSD2119_REG_H_RAM_START, (y & 0x01FF)); + write_reg(SSD2119_REG_H_RAM_END, (y + cy - 1) & 0x01FF); + break; + } + + set_cursor(x, y); +} + +static __inline void reset_viewport(void) { + set_viewport(0, 0, GDISP.Width, GDISP.Height); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/* ---- Required Routines ---- */ +/* + The following 2 routines are required. + All other routines are optional. +*/ + +/** + * @brief Low level GDISP driver initialization. + * + * @notapi + */ +bool_t gdisp_lld_init(void) { + /* Initialise your display */ + init_board(); + + // Hardware reset + setpin_reset(TRUE); + delayms(20); + setpin_reset(FALSE); + delayms(20); + + // Get the bus for the following initialisation commands + acquire_bus(); + + // Enter sleep mode (if we are not already there). + write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0001); + delay(5); + + // Set initial power parameters. + write_reg(SSD2119_REG_PWR_CTRL_5, 0x00B2); + delay(5); + write_reg(SSD2119_REG_VCOM_OTP_1, 0x0006); + delay(5); + + // Start the oscillator. + write_reg(SSD2119_REG_OSC_START, 0x0001); + delay(5); + + // Set pixel format and basic display orientation (scanning direction). + write_reg(SSD2119_REG_OUTPUT_CTRL, 0x30EF); + delay(5); + write_reg(SSD2119_REG_LCD_DRIVE_AC_CTRL, 0x0600); + delay(5); + + // Exit sleep mode. + write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); + delay(5); + + // Configure pixel color format and MCU interface parameters. + write_reg(SSD2119_REG_ENTRY_MODE, 0x6830); // ENTRY_MODE_DEFAULT + delay(5); + + // Set analog parameters. + write_reg(SSD2119_REG_SLEEP_MODE_2, 0x0999); + delay(5); + write_reg(SSD2119_REG_ANALOG_SET, 0x3800); + delay(5); + + // Enable the display. + write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033); + delay(5); + + // Set VCIX2 voltage to 6.1V. + write_reg(SSD2119_REG_PWR_CTRL_2, 0x0005); + delay(5); + + // Configure gamma correction. + write_reg(SSD2119_REG_GAMMA_CTRL_1, 0x0000); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_2, 0x0303); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_3, 0x0407); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_4, 0x0301); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_5, 0x0301); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_6, 0x0403); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_7, 0x0707); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_8, 0x0400); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_9, 0x0a00); + delay(5); + write_reg(SSD2119_REG_GAMMA_CTRL_10, 0x1000); + delay(5); + + // Configure Vlcd63 and VCOMl. + write_reg(SSD2119_REG_PWR_CTRL_3, 0x000A); + delay(5); + write_reg(SSD2119_REG_PWR_CTRL_4, 0x2E00); + delay(5); + + // Set the display size and ensure that the GRAM window is set to allow access to the full display buffer. + write_reg(SSD2119_REG_V_RAM_POS, (GDISP_SCREEN_HEIGHT - 1) << 8); + delay(5); + write_reg(SSD2119_REG_H_RAM_START, 0x0000); + delay(5); + write_reg(SSD2119_REG_H_RAM_END, GDISP_SCREEN_WIDTH - 1); + delay(5); + + write_reg(SSD2119_REG_X_RAM_ADDR, 0x00); + delay(5); + write_reg(SSD2119_REG_Y_RAM_ADDR, 0x00); + delay(5); + + // Release the bus + release_bus(); + + /* Turn on the backlight */ + set_backlight(GDISP_INITIAL_BACKLIGHT); + + /* Initialise the GDISP structure */ + GDISP.Width = GDISP_SCREEN_WIDTH; + GDISP.Height = GDISP_SCREEN_HEIGHT; + GDISP.Orientation = GDISP_ROTATE_0; + GDISP.Powermode = powerOn; + GDISP.Backlight = GDISP_INITIAL_BACKLIGHT; + GDISP.Contrast = GDISP_INITIAL_CONTRAST; + #if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP + GDISP.clipx0 = 0; + GDISP.clipy0 = 0; + GDISP.clipx1 = GDISP.Width; + GDISP.clipy1 = GDISP.Height; + #endif + return TRUE; +} + +/** + * @brief Draws a pixel on the display. + * + * @param[in] x X location of the pixel + * @param[in] y Y location of the pixel + * @param[in] color The color of the pixel + * + * @notapi + */ +void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) { + #if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP + if (x < GDISP.clipx0 || y < GDISP.clipy0 || x >= GDISP.clipx1 || y >= GDISP.clipy1) return; + #endif + + acquire_bus(); + set_cursor(x, y); + write_reg(SSD2119_REG_RAM_DATA, color); + release_bus(); +} + +/* ---- Optional Routines ---- */ +/* + All the below routines are optional. + Defining them will increase speed but everything + will work if they are not defined. + If you are not using a routine - turn it off using + the appropriate GDISP_HARDWARE_XXXX macro. + Don't bother coding for obvious similar routines if + there is no performance penalty as the emulation software + makes a good job of using similar routines. + eg. If gfillarea() is defined there is little + point in defining clear() unless the + performance bonus is significant. + For good performance it is suggested to implement + fillarea() and blitarea(). +*/ + +#if GDISP_HARDWARE_CLEARS || defined(__DOXYGEN__) + /** + * @brief Clear the display. + * @note Optional - The high level driver can emulate using software. + * + * @param[in] color The color of the pixel + * + * @notapi + */ + void gdisp_lld_clear(color_t color) { + unsigned i; + + acquire_bus(); + reset_viewport(); + set_cursor(0, 0); + stream_start(); + for(i = 0; i < GDISP_SCREEN_WIDTH * GDISP_SCREEN_HEIGHT; i++) + write_data(color); + stream_stop(); + release_bus(); + } +#endif + +#if GDISP_HARDWARE_FILLS || defined(__DOXYGEN__) + /** + * @brief Fill an area with a color. + * @note Optional - The high level driver can emulate using software. + * + * @param[in] x, y The start filled area + * @param[in] cx, cy The width and height to be filled + * @param[in] color The color of the fill + * + * @notapi + */ + void gdisp_lld_fill_area(coord_t x, coord_t y, coord_t cx, coord_t cy, color_t color) { + unsigned i, area; + + #if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP + if (x < GDISP.clipx0) { cx -= GDISP.clipx0 - x; x = GDISP.clipx0; } + if (y < GDISP.clipy0) { cy -= GDISP.clipy0 - y; y = GDISP.clipy0; } + if (cx <= 0 || cy <= 0 || x >= GDISP.clipx1 || y >= GDISP.clipy1) return; + if (x+cx > GDISP.clipx1) cx = GDISP.clipx1 - x; + if (y+cy > GDISP.clipy1) cy = GDISP.clipy1 - y; + #endif + + area = cx*cy; + + acquire_bus(); + set_viewport(x, y, cx, cy); + stream_start(); + for(i = 0; i < area; i++) + write_data(color); + stream_stop(); + release_bus(); + } +#endif + +#if GDISP_HARDWARE_BITFILLS || defined(__DOXYGEN__) + /** + * @brief Fill an area with a bitmap. + * @note Optional - The high level driver can emulate using software. + * + * @param[in] x, y The start filled area + * @param[in] cx, cy The width and height to be filled + * @param[in] srcx, srcy The bitmap position to start the fill from + * @param[in] srccx The width of a line in the bitmap. + * @param[in] buffer The pixels to use to fill the area. + * + * @notapi + */ + void gdisp_lld_blit_area_ex(coord_t x, coord_t y, coord_t cx, coord_t cy, coord_t srcx, coord_t srcy, coord_t srccx, const pixel_t *buffer) { + coord_t endx, endy; + unsigned lg; + + #if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP + if (x < GDISP.clipx0) { cx -= GDISP.clipx0 - x; srcx += GDISP.clipx0 - x; x = GDISP.clipx0; } + if (y < GDISP.clipy0) { cy -= GDISP.clipy0 - y; srcy += GDISP.clipy0 - y; y = GDISP.clipy0; } + if (srcx+cx > srccx) cx = srccx - srcx; + if (cx <= 0 || cy <= 0 || x >= GDISP.clipx1 || y >= GDISP.clipy1) return; + if (x+cx > GDISP.clipx1) cx = GDISP.clipx1 - x; + if (y+cy > GDISP.clipy1) cy = GDISP.clipy1 - y; + #endif + + acquire_bus(); + set_viewport(x, y, cx, cy); + stream_start(); + + endx = srcx + cx; + endy = y + cy; + lg = srccx - cx; + buffer += srcx + srcy * srccx; + for(; y < endy; y++, buffer += lg) + for(x=srcx; x < endx; x++) + write_data(*buffer++); + stream_stop(); + release_bus(); + } +#endif + +#if (GDISP_NEED_PIXELREAD && GDISP_HARDWARE_PIXELREAD) || defined(__DOXYGEN__) + /** + * @brief Get the color of a particular pixel. + * @note Optional. + * @note If x,y is off the screen, the result is undefined. + * + * @param[in] x, y The pixel to be read + * + * @notapi + */ + color_t gdisp_lld_get_pixel_color(coord_t x, coord_t y) { + color_t color; + + #if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP + if (x < 0 || x >= GDISP.Width || y < 0 || y >= GDISP.Height) return 0; + #endif + + acquire_bus(); + set_cursor(x, y); + stream_start(); + color = read_data(); // dummy read + color = read_data(); + stream_stop(); + release_bus(); + + return color; + } +#endif + +#if (GDISP_NEED_SCROLL && GDISP_HARDWARE_SCROLL) || defined(__DOXYGEN__) + /** + * @brief Scroll vertically a section of the screen. + * @note Optional. + * @note If x,y + cx,cy is off the screen, the result is undefined. + * @note If lines is >= cy, it is equivelent to a area fill with bgcolor. + * + * @param[in] x, y The start of the area to be scrolled + * @param[in] cx, cy The size of the area to be scrolled + * @param[in] lines The number of lines to scroll (Can be positive or negative) + * @param[in] bgcolor The color to fill the newly exposed area. + * + * @notapi + */ + void gdisp_lld_vertical_scroll(coord_t x, coord_t y, coord_t cx, coord_t cy, int lines, color_t bgcolor) { + static color_t buf[((GDISP_SCREEN_HEIGHT > GDISP_SCREEN_WIDTH ) ? GDISP_SCREEN_HEIGHT : GDISP_SCREEN_WIDTH)]; + coord_t row0, row1; + unsigned i, gap, abslines, j; + + #if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP + if (x < GDISP.clipx0) { cx -= GDISP.clipx0 - x; x = GDISP.clipx0; } + if (y < GDISP.clipy0) { cy -= GDISP.clipy0 - y; y = GDISP.clipy0; } + if (!lines || cx <= 0 || cy <= 0 || x >= GDISP.clipx1 || y >= GDISP.clipy1) return; + if (x+cx > GDISP.clipx1) cx = GDISP.clipx1 - x; + if (y+cy > GDISP.clipy1) cy = GDISP.clipy1 - y; + #endif + + abslines = lines < 0 ? -lines : lines; + + acquire_bus(); + if (abslines >= cy) { + abslines = cy; + gap = 0; + } else { + gap = cy - abslines; + for(i = 0; i < gap; i++) { + if(lines > 0) { + row0 = y + i + lines; + row1 = y + i; + } else { + row0 = (y - i - 1) + lines; + row1 = (y - i - 1); + } + + /* read row0 into the buffer and then write at row1*/ + set_viewport(x, row0, cx, 1); + stream_start(); + j = read_data(); // dummy read + for (j = 0; j < cx; j++) + buf[j] = read_data(); + stream_stop(); + + set_viewport(x, row1, cx, 1); + stream_start(); + for (j = 0; j < cx; j++) + write_data(buf[j]); + stream_stop(); + } + } + + /* fill the remaining gap */ + set_viewport(x, lines > 0 ? (y+gap) : y, cx, abslines); + stream_start(); + gap = cx*abslines; + for(i = 0; i < gap; i++) write_data(bgcolor); + stream_stop(); + release_bus(); + } +#endif + +#if (GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL) || defined(__DOXYGEN__) + /** + * @brief Driver Control + * @details Unsupported control codes are ignored. + * @note The value parameter should always be typecast to (void *). + * @note There are some predefined and some specific to the low level driver. + * @note GDISP_CONTROL_POWER - Takes a gdisp_powermode_t + * GDISP_CONTROL_ORIENTATION - Takes a gdisp_orientation_t + * GDISP_CONTROL_BACKLIGHT - Takes an int from 0 to 100. For a driver + * that only supports off/on anything other + * than zero is on. + * + * @param[in] what What to do. + * @param[in] value The value to use (always cast to a void *). + * + * @notapi + */ + void gdisp_lld_control(unsigned what, void *value) { + switch(what) { + case GDISP_CONTROL_POWER: + if (GDISP.Powermode == (gdisp_powermode_t)value) + return; + switch((gdisp_powermode_t)value) { + case powerOff: + acquire_bus(); + write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0001); // Enter sleep mode + write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0000); // Display off + write_reg(SSD2119_REG_OSC_START, 0x0000); // Turn off oscillator + release_bus(); + set_backlight(0); + break; + + case powerOn: + if (GDISP.Powermode == powerSleep) { + acquire_bus(); + write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode + write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033); // Display on + release_bus(); + delayms(170); + } else if (GDISP.Powermode == powerDeepSleep) { + acquire_bus(); + write_reg(SSD2119_REG_SLEEP_MODE_2, 0x0999); // Disable deep sleep function + write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode + write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033); // Display on + release_bus(); + delayms(170); + } else { + acquire_bus(); + write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode + release_bus(); + gdisp_lld_init(); + } + set_backlight(100); + break; + + case powerSleep: + acquire_bus(); + write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0001); // Enter sleep mode + write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0000); // Display off + release_bus(); + set_backlight(0); + delayms(25); + break; + + case powerDeepSleep: + acquire_bus(); + write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0001); // Enter sleep mode + write_reg(SSD2119_REG_SLEEP_MODE_2, 0x2999); // Enable deep sleep function + write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0000); // Display off + release_bus(); + set_backlight(0); + delayms(25); + break; + + default: + return; + } + GDISP.Powermode = (gdisp_powermode_t)value; + return; + + case GDISP_CONTROL_ORIENTATION: + if (GDISP.Orientation == (gdisp_orientation_t)value) + return; + switch((gdisp_orientation_t)value) { + case GDISP_ROTATE_0: + acquire_bus(); + /* TB = 0 */ + write_reg(SSD2119_REG_OUTPUT_CTRL, 0x30EF); + /* ID = 11 AM = 0 */ + write_reg(SSD2119_REG_ENTRY_MODE, 0x6830); + release_bus(); + GDISP.Height = GDISP_SCREEN_HEIGHT; + GDISP.Width = GDISP_SCREEN_WIDTH; + break; + + case GDISP_ROTATE_90: + acquire_bus(); + /* TB = 1 */ + write_reg(SSD2119_REG_OUTPUT_CTRL, 0x32EF); + /* ID = 10 AM = 1 */ + write_reg(SSD2119_REG_ENTRY_MODE, 0x6828); + release_bus(); + GDISP.Height = GDISP_SCREEN_WIDTH; + GDISP.Width = GDISP_SCREEN_HEIGHT; + break; + + case GDISP_ROTATE_180: + acquire_bus(); + /* TB = 0 */ + write_reg(SSD2119_REG_OUTPUT_CTRL, 0x30EF); + /* ID = 00 AM = 0 */ + write_reg(SSD2119_REG_ENTRY_MODE, 0x6800); + release_bus(); + GDISP.Height = GDISP_SCREEN_HEIGHT; + GDISP.Width = GDISP_SCREEN_WIDTH; + break; + + case GDISP_ROTATE_270: + acquire_bus(); + /* TB = 1 */ + write_reg(SSD2119_REG_OUTPUT_CTRL, 0x32EF); + /* ID = 01 AM = 1 */ + write_reg(SSD2119_REG_ENTRY_MODE, 0x6818); + release_bus(); + GDISP.Height = GDISP_SCREEN_WIDTH; + GDISP.Width = GDISP_SCREEN_HEIGHT; + break; + + default: + return; + } + + #if GDISP_NEED_CLIP || GDISP_NEED_VALIDATION + GDISP.clipx0 = 0; + GDISP.clipy0 = 0; + GDISP.clipx1 = GDISP.Width; + GDISP.clipy1 = GDISP.Height; + #endif + GDISP.Orientation = (gdisp_orientation_t)value; + return; + + case GDISP_CONTROL_BACKLIGHT: + if ((unsigned)value > 100) + value = (void *)100; + set_backlight((unsigned)value); + GDISP.Backlight = (unsigned)value; + return; + + default: + return; + } + } +#endif + +#endif /* GFX_USE_GDISP */ +/** @} */ diff --git a/drivers/gdisp/SSD2119/gdisp_lld.mk b/drivers/gdisp/SSD2119/gdisp_lld.mk new file mode 100644 index 00000000..e9c70efb --- /dev/null +++ b/drivers/gdisp/SSD2119/gdisp_lld.mk @@ -0,0 +1,5 @@ +# List the required driver. +GFXSRC += $(GFXLIB)/drivers/gdisp/SSD2119/gdisp_lld.c + +# Required include directories +GFXINC += $(GFXLIB)/drivers/gdisp/SSD2119 diff --git a/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h new file mode 100644 index 00000000..c6e11493 --- /dev/null +++ b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h @@ -0,0 +1,178 @@ +/* + ChibiOS/GFX - Copyright (C) 2012 + Joel Bodenmann aka Tectu + + This file is part of ChibiOS/GFX. + + ChibiOS/GFX is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/GFX is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h + * @brief GDISP Graphic Driver subsystem board FSMC interface for the SSD2119 display. + * + * @addtogroup GDISP + * @{ + */ + +#ifndef _GDISP_LLD_BOARD_H +#define _GDISP_LLD_BOARD_H + +/* Using FSMC A19 (PE3) as DC */ +#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* DC = 0 */ +#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* DC = 1 */ + +#define SET_RST palSetPad(GPIOD, 3); +#define CLR_RST palClearPad(GPIOD, 3); + +/* PWM configuration structure. We use timer 4 channel 2 (orange LED on board). */ +static const PWMConfig pwmcfg = { + 1000000, /* 1 MHz PWM clock frequency. */ + 100, /* PWM period is 100 cycles. */ + NULL, + { + {PWM_OUTPUT_ACTIVE_HIGH, NULL}, + {PWM_OUTPUT_ACTIVE_HIGH, NULL}, + {PWM_OUTPUT_ACTIVE_HIGH, NULL}, + {PWM_OUTPUT_ACTIVE_HIGH, NULL} + }, + 0 +}; + +/** + * @brief Initialise the board for the display. + * @notes This board definition uses GPIO and assumes exclusive access to these GPIO pins + * + * @notapi + */ +static __inline void init_board(void) { + unsigned char FSMC_Bank; + + /* STM32F4 FSMC init */ + rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0); + + /* Group pins */ + IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) | + (1 << 9) | (1 << 10) | (1 << 14) | (1 << 15), 0}; + + IOBus busE = {GPIOE, (1 << 3) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) | + (1 << 13) | (1 << 14) | (1 << 15), 0}; + + /* FSMC is an alternate function 12 (AF12) */ + palSetBusMode(&busD, PAL_MODE_ALTERNATE(12)); + palSetBusMode(&busE, PAL_MODE_ALTERNATE(12)); + + FSMC_Bank = 0; + + /* FSMC timing */ + FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \ + | (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \ + | (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ; + + /* Bank1 NOR/SRAM control register configuration + * This is actually not needed as already set by default after reset */ + FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN; + + /* Display backlight control */ + /* TIM4 is an alternate function 2 (AF2) */ + pwmStart(&PWMD4, &pwmcfg); + palSetPadMode(GPIOD, 13, PAL_MODE_ALTERNATE(2)); + pwmEnableChannel(&PWMD4, 1, 100); +} + +/** + * @brief Set or clear the lcd reset pin. + * + * @param[in] state TRUE = lcd in reset, FALSE = normal operation + * + * @notapi + */ +static __inline void setpin_reset(bool_t state) { + if (state) { + CLR_RST; + } else { + SET_RST; + } +} + +/** + * @brief Set the lcd back-light level. + * + * @param[in] percent 0 to 100% + * + * @notapi + */ +static __inline void set_backlight(uint8_t percent) { + pwmEnableChannel(&PWMD4, 1, percent); +} + +/** + * @brief Take exclusive control of the bus + * @note Not needed, not implemented + * + * @notapi + */ +static __inline void acquire_bus(void) { + /* Nothing to do here since LCD is the only device on that bus */ +} + +/** + * @brief Release exclusive control of the bus + * @note Not needed, not implemented + * + * @notapi + */ +static __inline void release_bus(void) { + /* Nothing to do here since LCD is the only device on that bus */ +} + +/** + * @brief Send data to the index register. + * + * @param[in] index The index register to set + * + * @notapi + */ +static __inline void write_index(uint16_t index) { + GDISP_REG = index; +} + +/** + * @brief Send data to the lcd. + * + * @param[in] data The data to send + * + * @notapi + */ +static __inline void write_data(uint16_t data) { + GDISP_RAM = data; +} + +#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__) +/** + * @brief Read data from the lcd. + * + * @return The data from the lcd + * @note The chip select may need to be asserted/de-asserted + * around the actual spi read + * + * @notapi + */ +static __inline uint16_t read_data(void) { + return GDISP_RAM; +} +#endif + +#endif /* _GDISP_LLD_BOARD_H */ +/** @} */ diff --git a/drivers/gdisp/SSD2119/gdisp_lld_config.h b/drivers/gdisp/SSD2119/gdisp_lld_config.h new file mode 100644 index 00000000..05c007b0 --- /dev/null +++ b/drivers/gdisp/SSD2119/gdisp_lld_config.h @@ -0,0 +1,52 @@ +/* + ChibiOS/GFX - Copyright (C) 2012 + Joel Bodenmann aka Tectu + + This file is part of ChibiOS/GFX. + + ChibiOS/GFX is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/GFX is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file drivers/gdisp/SSD2119/gdisp_lld_config.h + * @brief GDISP Graphic Driver subsystem low level driver header for the SSD2119 display. + * + * @addtogroup GDISP + * @{ + */ + +#ifndef _GDISP_LLD_CONFIG_H +#define _GDISP_LLD_CONFIG_H + +#if GFX_USE_GDISP + +/*===========================================================================*/ +/* Driver hardware support. */ +/*===========================================================================*/ + +#define GDISP_DRIVER_NAME "SSD2119" + +#define GDISP_HARDWARE_CLEARS TRUE +#define GDISP_HARDWARE_FILLS TRUE +#define GDISP_HARDWARE_BITFILLS TRUE +#define GDISP_HARDWARE_SCROLL TRUE +#define GDISP_HARDWARE_PIXELREAD TRUE +#define GDISP_HARDWARE_CONTROL TRUE + +#define GDISP_PIXELFORMAT GDISP_PIXELFORMAT_RGB565 + +#endif /* GFX_USE_GDISP */ + +#endif /* _GDISP_LLD_CONFIG_H */ +/** @} */ diff --git a/drivers/gdisp/SSD2119/readme.txt b/drivers/gdisp/SSD2119/readme.txt new file mode 100644 index 00000000..f77e6259 --- /dev/null +++ b/drivers/gdisp/SSD2119/readme.txt @@ -0,0 +1,25 @@ +Description: + +Driver for LCD with 16-bit interface in 8080 mode (65k colors). + +To use this driver: + +1. Add in your halconf.h: + a) #define GFX_USE_GDISP TRUE + + b) Any optional high level driver defines (see gdisp.h) eg: GDISP_NEED_MULTITHREAD + + c) If you are not using a known board then create a gdisp_lld_board.h file + and ensure it is on your include path. + Use the gdisp_lld_board_embest_dmstf4bb_fsmc.h or gdisp_lld_board_embest_dmstf4bb_fsmc.h file as a basis. + Currently known boards are: + BOARD_EMBEST_DMSTF4BB - GPIO interface + BOARD_EMBEST_DMSTF4BB_FSMC - FSMC interface + Both board configurations assume you have STM32_PWM_USE_TIM4 set to TRUE in your mcuconf.h. + + d) The following are optional - define them if you are not using the defaults below: + #define GDISP_SCREEN_WIDTH 320 + #define GDISP_SCREEN_HEIGHT 240 + +2. To your makefile add the following lines: + include $(GFXLIB)/drivers/gdisp/SSD2119/gdisp_lld.mk diff --git a/drivers/gdisp/SSD2119/ssd2119.h b/drivers/gdisp/SSD2119/ssd2119.h new file mode 100644 index 00000000..a907fcbb --- /dev/null +++ b/drivers/gdisp/SSD2119/ssd2119.h @@ -0,0 +1,81 @@ +/* + ChibiOS/GFX - Copyright (C) 2012 + Joel Bodenmann aka Tectu + + This file is part of ChibiOS/GFX. + + ChibiOS/GFX is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/GFX is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file drivers/gdisp/SSD2119/ssd2119.h + * @brief GDISP Graphic Driver support header for the SSD2119 display. + * + * @addtogroup GDISP + * @{ + */ + +#ifndef _SSD2119_H +#define _SSD2119_H + +/* SSD2119 registers */ + +#define SSD2119_REG_DEVICE_CODE_READ 0x00 +#define SSD2119_REG_OSC_START 0x00 +#define SSD2119_REG_OUTPUT_CTRL 0x01 +#define SSD2119_REG_LCD_DRIVE_AC_CTRL 0x02 +#define SSD2119_REG_PWR_CTRL_1 0x03 +#define SSD2119_REG_DISPLAY_CTRL 0x07 +#define SSD2119_REG_FRAME_CYCLE_CTRL 0x0B +#define SSD2119_REG_PWR_CTRL_2 0x0C +#define SSD2119_REG_PWR_CTRL_3 0x0D +#define SSD2119_REG_PWR_CTRL_4 0x0E +#define SSD2119_REG_GATE_SCAN_START 0x0F +#define SSD2119_REG_SLEEP_MODE_1 0x10 +#define SSD2119_REG_ENTRY_MODE 0x11 +#define SSD2119_REG_SLEEP_MODE_2 0x12 +#define SSD2119_REG_GEN_IF_CTRL 0x15 +#define SSD2119_REG_H_PORCH 0x16 +#define SSD2119_REG_V_PORCH 0x17 +#define SSD2119_REG_PWR_CTRL_5 0x1E +#define SSD2119_REG_UNIFORMITY 0x20 +#define SSD2119_REG_RAM_DATA 0x22 +#define SSD2119_REG_FRAME_FREQ 0x25 +#define SSD2119_REG_ANALOG_SET 0x26 +#define SSD2119_REG_VCOM_OTP_1 0x28 +#define SSD2119_REG_VCOM_OTP_2 0x29 +#define SSD2119_REG_GAMMA_CTRL_1 0x30 +#define SSD2119_REG_GAMMA_CTRL_2 0x31 +#define SSD2119_REG_GAMMA_CTRL_3 0x32 +#define SSD2119_REG_GAMMA_CTRL_4 0x33 +#define SSD2119_REG_GAMMA_CTRL_5 0x34 +#define SSD2119_REG_GAMMA_CTRL_6 0x35 +#define SSD2119_REG_GAMMA_CTRL_7 0x36 +#define SSD2119_REG_GAMMA_CTRL_8 0x37 +#define SSD2119_REG_GAMMA_CTRL_9 0x3A +#define SSD2119_REG_GAMMA_CTRL_10 0x3B +#define SSD2119_REG_V_SCROLL_1 0x41 +#define SSD2119_REG_V_SCROLL_2 0x42 +#define SSD2119_REG_V_RAM_POS 0x44 +#define SSD2119_REG_H_RAM_START 0x45 +#define SSD2119_REG_H_RAM_END 0x46 +#define SSD2119_REG_1_DRV_POS_1 0x48 +#define SSD2119_REG_1_DRV_POS_2 0x49 +#define SSD2119_REG_2_DRV_POS_1 0x4A +#define SSD2119_REG_2_DRV_POS_2 0x4B +#define SSD2119_REG_X_RAM_ADDR 0x4E +#define SSD2119_REG_Y_RAM_ADDR 0x4F + +#endif /* _SSD2119_H */ +/** @} */