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Convert HX8437D driver to new format

ugfx_release_2.6
inmarket 2013-10-18 15:57:13 +10:00
parent 257f7364f8
commit c4ae7fd6c8
7 changed files with 415 additions and 411 deletions
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163
drivers/gdisp/HX8347D/board_HX8347D_stm32f4discovery.h 100644
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@ -0,0 +1,163 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/HX8347D/board_HX8347D_stm32f4discovery.h
* @brief GDISP Graphic Driver subsystem board SPI interface for the HX8347D display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->priv to that structure.
/* Pin assignments */
#define SET_RST palSetPad(GPIOB, 8)
#define CLR_RST palClearPad(GPIOB, 8)
#define SET_DATA palSetPad(GPIOB, 9)
#define CLR_DATA palClearPad(GPIOB, 9)
#define SET_CS palSetPad(GPIOA, 4)
#define CLR_CS palClearPad(GPIOA, 4)
/* PWM configuration structure. We use timer 4 channel 2 (orange LED on board). */
static const PWMConfig pwmcfg = {
1000000, /* 1 MHz PWM clock frequency. */
100, /* PWM period is 100 cycles. */
NULL,
{
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL}
},
0
};
/*
* SPI1 configuration structure.
* Speed 42MHz, CPHA=0, CPOL=0, 8bits frames, MSb transmitted first.
* The slave select line is the pin 4 on the port GPIOA.
*/
static const SPIConfig spi1cfg_8bit = {
NULL,
/* HW dependent part.*/
GPIOA,
4,
0 //SPI_CR1_BR_0
};
/*
* SPI1 configuration structure.
* Speed 42MHz, CPHA=0, CPOL=0, 16bits frames, MSb transmitted first.
* The slave select line is the pin 4 on the port GPIOA.
*/
static const SPIConfig spi1cfg_16bit = {
NULL,
/* HW dependent part.*/
GPIOA,
4,
SPI_CR1_DFF //SPI_CR1_BR_0
};
static inline void init_board(GDisplay *g, unsigned display) {
// As we are not using multiple displays we set g->priv to NULL as we don't use it.
g->priv = 0;
if (display == 0) {
/**
* Set up for Display 0
*/
/* Display backlight control */
/* TIM4 is an alternate function 2 (AF2) */
pwmStart(&PWMD4, &pwmcfg);
palSetPadMode(GPIOD, 13, PAL_MODE_ALTERNATE(2));
pwmEnableChannel(&PWMD4, 1, 100);
palSetPadMode(GPIOB, 8, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* RST */
palSetPadMode(GPIOB, 9, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* RS */
/*
* Initializes the SPI driver 1. The SPI1 signals are routed as follow:
* PB12 - NSS.
* PB13 - SCK.
* PB14 - MISO.
* PB15 - MOSI.
*/
SET_CS; SET_DATA;
spiStart(&SPID1, &spi1cfg_8bit);
palSetPadMode(GPIOA, 4, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* NSS. */
palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5)|PAL_STM32_OSPEED_HIGHEST); /* SCK. */
palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5)); /* MISO. */
palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(5)|PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if (state) {
CLR_RST;
} else {
SET_RST;
}
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
pwmEnableChannel(&PWMD4, 1, percent);
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
spiAcquireBus(&SPID1);
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0)); // Safety
CLR_CS;
}
static inline void release_bus(GDisplay *g) {
(void) g;
SET_CS;
spiReleaseBus(&SPID1);
}
static inline void busmode16(GDisplay *g) {
(void) g;
spiStart(&SPID1, &spi1cfg_16bit);
}
static inline void busmode8(GDisplay *g) {
(void) g;
spiStart(&SPID1, &spi1cfg_8bit);
}
static inline void write_index(GDisplay *g, uint8_t index) {
(void) g;
CLR_DATA;
SPI1->DR = cmd;
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0));
SET_DATA;
}
static inline void write_data(GDisplay *g, uint8_t data) {
(void) g;
SPI1->DR = data;
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0));
}
static inline void write_ram16(GDisplay *g, uint16_t data) {
(void) g;
SPI1->DR = data;
while((SPI1->SR & SPI_SR_TXE) == 0);
}
#endif /* _GDISP_LLD_BOARD_H */

150
drivers/gdisp/HX8347D/board_HX8347D_template.h 100644
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@ -0,0 +1,150 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/HX8347D/board_HX8347D_template.h
* @brief GDISP Graphic Driver subsystem board SPI interface for the HX8347D display.
*
* @addtogroup GDISP
* @{
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
/**
* @brief Initialise the board for the display.
*
* @param[in] g The GDisplay structure
* @param[in] display The display number on this controller (0..n)
*
* @note Set the g->priv member to whatever is appropriate. For multiple
* displays this might be a pointer to the appropriate register set.
*
* @notapi
*/
static inline void init_board(GDisplay *g, unsigned display) {
}
/**
* @brief After the initialisation.
*
* @param[in] g The GDisplay structure
*
* @notapi
*/
static inline void post_init_board(GDisplay *g) {
}
/**
* @brief Set or clear the lcd reset pin.
*
* @param[in] g The GDisplay structure
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
*
* @notapi
*/
static inline void setpin_reset(GDisplay *g, bool_t state) {
}
/**
* @brief Set the lcd back-light level.
*
* @param[in] g The GDisplay structure
* @param[in] percent 0 to 100%
*
* @notapi
*/
static inline void set_backlight(GDisplay *g, uint8_t percent) {
}
/**
* @brief Take exclusive control of the bus
*
* @param[in] g The GDisplay structure
*
* @notapi
*/
static inline void acquire_bus(GDisplay *g) {
}
/**
* @brief Release exclusive control of the bus
*
* @param[in] g The GDisplay structure
*
* @notapi
*/
static inline void release_bus(GDisplay *g) {
}
/**
* @brief Set the bus in 16 bit mode
*
* @param[in] g The GDisplay structure
*
* @notapi
*/
static inline void busmode16(GDisplay *g) {
}
/**
* @brief Set the bus in 8 bit mode (the default)
*
* @param[in] g The GDisplay structure
*
* @notapi
*/
static inline void busmode8(GDisplay *g) {
}
/**
* @brief Send data to the index register.
*
* @param[in] g The GDisplay structure
* @param[in] index The index register to set
*
* @notapi
*/
static inline void write_index(GDisplay *g, uint8_t index) {
}
/**
* @brief Send 8 bits of data to the lcd.
* @pre The bus is in 8 bit mode
*
* @param[in] g The GDisplay structure
* @param[in] data The data to send
*
* @notapi
*/
static inline void write_data(GDisplay *g, uint8_t data) {
}
/**
* @brief Send 16 bits of data to the lcd.
* @pre The bus is in 16 bit mode
*
* @param[in] g The GDisplay structure
* @param[in] data The data to send
*
* @notapi
*/
static inline void write_ram16(GDisplay *g, uint16_t data) {
}
#endif /* _GDISP_LLD_BOARD_H */
/** @} */

199
drivers/gdisp/HX8347D/gdisp_lld.c
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@ -8,18 +8,17 @@
/**
* @file drivers/gdisp/HX8347D/gdisp_lld.c
* @brief GDISP Graphics Driver subsystem low level driver source for the HX8347D display.
*
* @addtogroup GDISP
* @{
*/
#include "gfx.h"
#if GFX_USE_GDISP /*|| defined(__DOXYGEN__)*/
#if GFX_USE_GDISP
#define GDISP_LLD_DECLARATIONS
#define GDISP_DRIVER_VMT GDISPVMT_HX8347D
#include "../drivers/gdisp/HX8347D/gdisp_lld_config.h"
#include "gdisp/lld/gdisp_lld.h"
#include "gdisp_lld_board.h"
#include "board_HX8347D.h"
/*===========================================================================*/
/* Driver local definitions. */
@ -42,106 +41,111 @@
/* Driver local functions. */
/*===========================================================================*/
#include "HX8347D.h"
#include "../drivers/gdisp/HX8347D/HX8347D.h"
static inline void set_viewport(GDISPDriver* g) {
write_reg(HX8347D_REG_SCL, (uint8_t) g->p.x);
write_reg(HX8347D_REG_SCH, (uint8_t) (g->p.x >> 8));
write_reg(HX8347D_REG_ECL, (uint8_t) (g->p.x + g->p.cx -1));
write_reg(HX8347D_REG_ECH, (uint8_t) ((g->p.x + g->p.cx -1) >> 8));
write_reg(HX8347D_REG_SPL, (uint8_t) g->p.y);
write_reg(HX8347D_REG_SPH, (uint8_t) (g->p.y >> 8));
write_reg(HX8347D_REG_EPL, (uint8_t) (g->p.y + g->p.cy -1));
write_reg(HX8347D_REG_EPH, (uint8_t) ((g->p.y + g->p.cy -1) >> 8));
write_index(HX8347D_REG_SRAMWC);
#define write_reg(g, reg, data) { write_index(g, reg); write_data(g, data); }
static inline void set_viewport(GDisplay* g) {
write_reg(g, HX8347D_REG_SCL, g->p.x);
write_reg(g, HX8347D_REG_SCH, g->p.x >> 8);
write_reg(g, HX8347D_REG_ECL, g->p.x + g->p.cx -1);
write_reg(g, HX8347D_REG_ECH, (g->p.x + g->p.cx -1) >> 8);
write_reg(g, HX8347D_REG_SPL, g->p.y);
write_reg(g, HX8347D_REG_SPH, g->p.y >> 8);
write_reg(g, HX8347D_REG_EPL, g->p.y + g->p.cy -1);
write_reg(g, HX8347D_REG_EPH, (g->p.y + g->p.cy -1) >> 8);
write_index(g, HX8347D_REG_SRAMWC);
}
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
LLDSPEC bool_t gdisp_lld_init(GDisplay *g, unsigned display) {
/* Initialise your display */
init_board();
init_board(g, display);
// Hardware reset
setpin_reset(TRUE);
setpin_reset(g, TRUE);
gfxSleepMilliseconds(1);
setpin_reset(FALSE);
setpin_reset(g, FALSE);
gfxSleepMilliseconds(5);
// Get the bus for the following initialisation commands
acquire_bus();
acquire_bus(g);
/* Start Initial Sequence ----------------------------------------------------*/
write_reg(HX8347D_REG_STBAH, 0x00); /* Reset Power Control 1 */
write_reg(HX8347D_REG_STBAL, 0x20); /* Power Control 2 */
write_reg(HX8347D_REG_PTBAH, 0x0C); /* Power Control 1 */
write_reg(HX8347D_REG_PTBAL, 0xC4); /* Power Control 2 */
write_reg(HX8347D_REG_OPONN, 0x40); /* Source OPON_N */
write_reg(HX8347D_REG_OPONI, 0x38); /* Source OPON_I */
write_reg(HX8347D_REG_DC2, 0xA3); /* Display Control 2 */
write_reg(g, HX8347D_REG_STBAH, 0x00); /* Reset Power Control 1 */
write_reg(g, HX8347D_REG_STBAL, 0x20); /* Power Control 2 */
write_reg(g, HX8347D_REG_PTBAH, 0x0C); /* Power Control 1 */
write_reg(g, HX8347D_REG_PTBAL, 0xC4); /* Power Control 2 */
write_reg(g, HX8347D_REG_OPONN, 0x40); /* Source OPON_N */
write_reg(g, HX8347D_REG_OPONI, 0x38); /* Source OPON_I */
write_reg(g, HX8347D_REG_DC2, 0xA3); /* Display Control 2 */
/* Power On sequence ---------------------------------------------------------*/
write_reg(HX8347D_REG_PWC2, 0x1B); /* Power Control 2 */
write_reg(HX8347D_REG_PWC1, 0x01); /* Power Control 1 */
write_reg(HX8347D_REG_VMH, 0x2F); /* Vcom Control 2 */
write_reg(HX8347D_REG_VML, 0x57); /* Vcom Control 3 */
write_reg(HX8347D_REG_VMF, 0x8D); /* Vcom Control 1 */
write_reg(g, HX8347D_REG_PWC2, 0x1B); /* Power Control 2 */
write_reg(g, HX8347D_REG_PWC1, 0x01); /* Power Control 1 */
write_reg(g, HX8347D_REG_VMH, 0x2F); /* Vcom Control 2 */
write_reg(g, HX8347D_REG_VML, 0x57); /* Vcom Control 3 */
write_reg(g, HX8347D_REG_VMF, 0x8D); /* Vcom Control 1 */
/* Gamma settings -----------------------------------------------------------*/
write_reg(HX8347D_REG_VRP0,0x01); // default setup
write_reg(HX8347D_REG_VRP1,0x0e); //
write_reg(HX8347D_REG_VRP2,0x11); //
write_reg(HX8347D_REG_VRP3,0x1a); //
write_reg(HX8347D_REG_VRP4,0x18); //
write_reg(HX8347D_REG_VRP5,0x24); //
write_reg(HX8347D_REG_PRP0,0x15); //
write_reg(HX8347D_REG_PRP1,0x65); //
write_reg(HX8347D_REG_PKP0,0x0b); //
write_reg(HX8347D_REG_PKP1,0x18); //
write_reg(HX8347D_REG_PKP2,0x19); //
write_reg(HX8347D_REG_PKP3,0x1a); //
write_reg(HX8347D_REG_PKP4,0x18); //
write_reg(HX8347D_REG_VRN0,0x1b); //
write_reg(HX8347D_REG_VRN1,0x27); //
write_reg(HX8347D_REG_VRN2,0x25); //
write_reg(HX8347D_REG_VRN3,0x2e); //
write_reg(HX8347D_REG_VRN4,0x31); //
write_reg(HX8347D_REG_VRN5,0x3e); //
write_reg(HX8347D_REG_PRN0,0x1a); //
write_reg(HX8347D_REG_PRN1,0x6a); //
write_reg(HX8347D_REG_PKN0,0x07); //
write_reg(HX8347D_REG_PKN1,0x05); //
write_reg(HX8347D_REG_PKN2,0x06); //
write_reg(HX8347D_REG_PKN3,0x0b); //
write_reg(HX8347D_REG_PKN4,0x14); //
write_reg(HX8347D_REG_CGM,0xcc); //
write_reg(g, HX8347D_REG_VRP0, 0x01); // default setup
write_reg(g, HX8347D_REG_VRP1, 0x0e); //
write_reg(g, HX8347D_REG_VRP2, 0x11); //
write_reg(g, HX8347D_REG_VRP3, 0x1a); //
write_reg(g, HX8347D_REG_VRP4, 0x18); //
write_reg(g, HX8347D_REG_VRP5, 0x24); //
write_reg(g, HX8347D_REG_PRP0, 0x15); //
write_reg(g, HX8347D_REG_PRP1, 0x65); //
write_reg(g, HX8347D_REG_PKP0, 0x0b); //
write_reg(g, HX8347D_REG_PKP1, 0x18); //
write_reg(g, HX8347D_REG_PKP2, 0x19); //
write_reg(g, HX8347D_REG_PKP3, 0x1a); //
write_reg(g, HX8347D_REG_PKP4, 0x18); //
write_reg(g, HX8347D_REG_VRN0, 0x1b); //
write_reg(g, HX8347D_REG_VRN1, 0x27); //
write_reg(g, HX8347D_REG_VRN2, 0x25); //
write_reg(g, HX8347D_REG_VRN3, 0x2e); //
write_reg(g, HX8347D_REG_VRN4, 0x31); //
write_reg(g, HX8347D_REG_VRN5, 0x3e); //
write_reg(g, HX8347D_REG_PRN0, 0x1a); //
write_reg(g, HX8347D_REG_PRN1, 0x6a); //
write_reg(g, HX8347D_REG_PKN0, 0x07); //
write_reg(g, HX8347D_REG_PKN1, 0x05); //
write_reg(g, HX8347D_REG_PKN2, 0x06); //
write_reg(g, HX8347D_REG_PKN3, 0x0b); //
write_reg(g, HX8347D_REG_PKN4, 0x14); //
write_reg(g, HX8347D_REG_CGM, 0xcc); //
/* Power + Osc ---------------------------------------------------------------*/
write_reg(HX8347D_REG_OSCCH, 0x36); /* OSC Control 1 */
write_reg(HX8347D_REG_OSCCL, 0x01); /* OSC Control 2 */
write_reg(HX8347D_REG_DMODE, 0x00); /* Display Mode Control */
write_reg(HX8347D_REG_PWC6, 0x88); /* Power Control 6 */
write_reg(g, HX8347D_REG_OSCCH, 0x36); /* OSC Control 1 */
write_reg(g, HX8347D_REG_OSCCL, 0x01); /* OSC Control 2 */
write_reg(g, HX8347D_REG_DMODE, 0x00); /* Display Mode Control */
write_reg(g, HX8347D_REG_PWC6, 0x88); /* Power Control 6 */
gfxSleepMilliseconds(5); /* Delay 5 ms */
write_reg(HX8347D_REG_PWC6, 0x80); /* Power Control 6 */
write_reg(g, HX8347D_REG_PWC6, 0x80); /* Power Control 6 */
gfxSleepMilliseconds(5); /* Delay 5 ms */
write_reg(HX8347D_REG_PWC6, 0x90); /* Power Control 6 */
write_reg(g, HX8347D_REG_PWC6, 0x90); /* Power Control 6 */
gfxSleepMilliseconds(5); /* Delay 5 ms */
write_reg(HX8347D_REG_PWC6, 0xD0); /* Power Control 6 */
write_reg(g, HX8347D_REG_PWC6, 0xD0); /* Power Control 6 */
gfxSleepMilliseconds(5); /* Delay 5 ms */
write_reg(HX8347D_REG_COLMOD, 0x05); /* Colmod 16Bit/Pixel */
write_reg(HX8347D_REG_PCH, 0x00); /* Panel Characteristic */
write_reg(HX8347D_REG_DC3, 0x38); /* Display Control 3 */
write_reg(g, HX8347D_REG_COLMOD, 0x05); /* Colmod 16Bit/Pixel */
write_reg(g, HX8347D_REG_PCH, 0x00); /* Panel Characteristic */
write_reg(g, HX8347D_REG_DC3, 0x38); /* Display Control 3 */
gfxSleepMilliseconds(40); /* Delay 40 ms */
write_reg(HX8347D_REG_DC3, 0x3C); /* Display Control 3 */
write_reg(HX8347D_REG_MAC, 0x08); /* Memory access control */
write_reg(g, HX8347D_REG_DC3, 0x3C); /* Display Control 3 */
write_reg(g, HX8347D_REG_MAC, 0x08); /* Memory access control */
// Finish Init
post_init_board(g);
// Release the bus
release_bus();
release_bus(g);
/* Turn on the backlight */
set_backlight(GDISP_INITIAL_BACKLIGHT);
set_backlight(g, GDISP_INITIAL_BACKLIGHT);
/* Initialise the GDISP structure */
g->g.Width = GDISP_SCREEN_WIDTH;
@ -154,55 +158,55 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
}
#if GDISP_HARDWARE_STREAM_WRITE
LLDSPEC void gdisp_lld_write_start(GDISPDriver *g) {
acquire_bus();
LLDSPEC void gdisp_lld_write_start(GDisplay *g) {
acquire_bus(g);
set_viewport(g);
busmode16();
busmode16(g);
}
LLDSPEC void gdisp_lld_write_color(GDISPDriver *g) {
write_ram16(g->p.color);
LLDSPEC void gdisp_lld_write_color(GDisplay *g) {
write_ram16(g, g->p.color);
}
LLDSPEC void gdisp_lld_write_stop(GDISPDriver *g) {
busmode8();
release_bus();
LLDSPEC void gdisp_lld_write_stop(GDisplay *g) {
busmode8(g);
release_bus(g);
}
#endif
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
LLDSPEC void gdisp_lld_control(GDISPDriver *g) {
LLDSPEC void gdisp_lld_control(GDisplay *g) {
switch(g->p.x) {
case GDISP_CONTROL_ORIENTATION:
if (g->g.Orientation == (orientation_t)g->p.ptr)
return;
switch((orientation_t)g->p.ptr) {
case GDISP_ROTATE_0:
acquire_bus();
write_reg(HX8347D_REG_MAC, 0x08); /* Memory access control */
release_bus();
acquire_bus(g);
write_reg(g, HX8347D_REG_MAC, 0x08); /* Memory access control */
release_bus(g);
g->g.Height = GDISP_SCREEN_HEIGHT;
g->g.Width = GDISP_SCREEN_WIDTH;
break;
case GDISP_ROTATE_90:
acquire_bus();
write_reg(HX8347D_REG_MAC, 0x68); /* Memory access control */
release_bus();
acquire_bus(g);
write_reg(g, HX8347D_REG_MAC, 0x68); /* Memory access control */
release_bus(g);
g->g.Height = GDISP_SCREEN_WIDTH;
g->g.Width = GDISP_SCREEN_HEIGHT;
break;
case GDISP_ROTATE_180:
acquire_bus();
write_reg(HX8347D_REG_MAC, 0xc8); /* Memory access control */
release_bus();
acquire_bus(g);
write_reg(g, HX8347D_REG_MAC, 0xc8); /* Memory access control */
release_bus(g);
g->g.Height = GDISP_SCREEN_HEIGHT;
g->g.Width = GDISP_SCREEN_WIDTH;
break;
case GDISP_ROTATE_270:
acquire_bus();
write_reg(HX8347D_REG_MAC, 0xa8); /* Memory access control */
release_bus();
acquire_bus(g);
write_reg(g, HX8347D_REG_MAC, 0xa8); /* Memory access control */
release_bus(g);
g->g.Height = GDISP_SCREEN_WIDTH;
g->g.Width = GDISP_SCREEN_HEIGHT;
break;
@ -215,7 +219,7 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
case GDISP_CONTROL_BACKLIGHT:
if ((unsigned)g->p.ptr > 100)
g->p.ptr = (void *)100;
set_backlight((unsigned)g->p.ptr);
set_backlight(g, (unsigned)g->p.ptr);
g->g.Backlight = (unsigned)g->p.ptr;
return;
@ -226,4 +230,3 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
#endif
#endif /* GFX_USE_GDISP */
/** @} */

5
drivers/gdisp/HX8347D/gdisp_lld.mk
View File

@ -1,5 +1,2 @@
# List the required driver.
GFXSRC += $(GFXLIB)/drivers/gdisp/HX8347D/gdisp_lld.c
# Required include directories
GFXINC += $(GFXLIB)/drivers/gdisp/HX8347D
GFXSRC += $(GFXLIB)/drivers/gdisp/HX8347D/gdisp_lld.c

197
drivers/gdisp/HX8347D/gdisp_lld_board_st_stm32f4_discovery.h
View File

@ -1,197 +0,0 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/HX8347D/gdisp_lld_board_st_stm32f4_discovery.h
* @brief GDISP Graphic Driver subsystem board SPI interface for the HX8347D display.
*
* @addtogroup GDISP
* @{
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// Overrides
#ifndef GDISP_INITIAL_BACKLIGHT
#define GDISP_INITIAL_BACKLIGHT 50
#endif
/* Pin assignments */
#define SET_RST palSetPad(GPIOB, 8)
#define CLR_RST palClearPad(GPIOB, 8)
#define SET_DATA palSetPad(GPIOB, 9)
#define CLR_DATA palClearPad(GPIOB, 9)
#define SET_CS palSetPad(GPIOA, 4)
#define CLR_CS palClearPad(GPIOA, 4)
/* PWM configuration structure. We use timer 4 channel 2 (orange LED on board). */
static const PWMConfig pwmcfg = {
1000000, /* 1 MHz PWM clock frequency. */
100, /* PWM period is 100 cycles. */
NULL,
{
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL}
},
0
};
/*
* SPI1 configuration structure.
* Speed 42MHz, CPHA=0, CPOL=0, 8bits frames, MSb transmitted first.
* The slave select line is the pin 4 on the port GPIOA.
*/
static const SPIConfig spi1cfg_8bit = {
NULL,
/* HW dependent part.*/
GPIOA,
4,
0 //SPI_CR1_BR_0
};
/*
* SPI1 configuration structure.
* Speed 42MHz, CPHA=0, CPOL=0, 16bits frames, MSb transmitted first.
* The slave select line is the pin 4 on the port GPIOA.
*/
static const SPIConfig spi1cfg_16bit = {
NULL,
/* HW dependent part.*/
GPIOA,
4,
SPI_CR1_DFF //SPI_CR1_BR_0
};
/**
* @brief Initialise the board for the display.
* @notes This board definition uses GPIO and SPI. It assumes exclusive access to these GPIO pins but not necessarily the SPI port.
*
* @notapi
*/
static inline void init_board(void) {
/* Display backlight control */
/* TIM4 is an alternate function 2 (AF2) */
pwmStart(&PWMD4, &pwmcfg);
palSetPadMode(GPIOD, 13, PAL_MODE_ALTERNATE(2));
pwmEnableChannel(&PWMD4, 1, 100);
palSetPadMode(GPIOB, 8, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* RST */
palSetPadMode(GPIOB, 9, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* RS */
/*
* Initializes the SPI driver 1. The SPI1 signals are routed as follow:
* PB12 - NSS.
* PB13 - SCK.
* PB14 - MISO.
* PB15 - MOSI.
*/
SET_CS; SET_DATA;
spiStart(&SPID1, &spi1cfg_8bit);
palSetPadMode(GPIOA, 4, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* NSS. */
palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5)|PAL_STM32_OSPEED_HIGHEST); /* SCK. */
palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5)); /* MISO. */
palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(5)|PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
}
/**
* @brief Set or clear the lcd reset pin.
*
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
*
* @notapi
*/
static inline void setpin_reset(bool_t state) {
if (state) {
CLR_RST;
} else {
SET_RST;
}
}
/**
* @brief Set the lcd back-light level.
*
* @param[in] percent 0 to 100%
*
* @notapi
*/
static inline void set_backlight(uint8_t percent) {
pwmEnableChannel(&PWMD4, 1, percent);
}
/**
* @brief Take exclusive control of the bus
* @notapi
*/
static inline void acquire_bus(void) {
spiAcquireBus(&SPID1);
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0)); // Safety
CLR_CS;
}
/**
* @brief Release exclusive control of the bus
* @notapi
*/
static inline void release_bus(void) {
SET_CS;
spiReleaseBus(&SPID1);
}
/**
* @brief Set the bus in 16 bit mode
* @notapi
*/
static inline void busmode16(void) {
spiStart(&SPID1, &spi1cfg_16bit);
}
/**
* @brief Set the bus in 8 bit mode (the default)
* @notapi
*/
static inline void busmode8(void) {
spiStart(&SPID1, &spi1cfg_8bit);
}
/**
* @brief Set which index register to use.
*
* @param[in] index The index register to set
*
* @notapi
*/
static inline void write_index(uint8_t cmd) {
CLR_DATA;
SPI1->DR = cmd;
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0));
SET_DATA;
}
/**
* @brief Send a command to the lcd.
*
* @param[in] data The data to send
*
* @notapi
*/
static inline void write_reg(uint8_t cmd, uint8_t data) {
write_index(cmd);
SPI1->DR = data;
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0));
}
static inline void write_ram16(uint16_t data) {
SPI1->DR = data;
while((SPI1->SR & SPI_SR_TXE) == 0);
}
#endif /* _GDISP_LLD_BOARD_H */
/** @} */

109
drivers/gdisp/HX8347D/gdisp_lld_board_template.h
View File

@ -1,109 +0,0 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/HX8347D/gdisp_lld_board_template.h
* @brief GDISP Graphic Driver subsystem board SPI interface for the HX8347D display.
*
* @addtogroup GDISP
* @{
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
/**
* @brief Initialise the board for the display.
* @notapi
*/
static inline void init_board(void) {
}
/**
* @brief Set or clear the lcd reset pin.
*
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
*
* @notapi
*/
static inline void setpin_reset(bool_t state) {
}
/**
* @brief Set the lcd back-light level.
*
* @param[in] percent 0 to 100%
*
* @notapi
*/
static inline void set_backlight(uint8_t percent) {
}
/**
* @brief Take exclusive control of the bus
* @notapi
*/
static inline void acquire_bus(void) {
}
/**
* @brief Release exclusive control of the bus
* @notapi
*/
static inline void release_bus(void) {
}
/**
* @brief Set the bus in 16 bit mode
* @notapi
*/
static inline void busmode16(void) {
}
/**
* @brief Set the bus in 8 bit mode (the default)
* @notapi
*/
static inline void busmode8(void) {
}
/**
* @brief Set which index register to use.
*
* @param[in] index The index register to set
*
* @notapi
*/
static inline void write_index(uint8_t cmd) {
}
/**
* @brief Send a command to the lcd.
*
* @param[in] data The data to send
*
* @notapi
*/
static inline void write_reg(uint8_t cmd, uint8_t data) {
}
static inline void write_ram16(uint16_t data) {
}
#endif /* _GDISP_LLD_BOARD_H */
/** @} */

3
drivers/gdisp/HX8347D/gdisp_lld_config.h
View File

@ -22,9 +22,6 @@
/* Driver hardware support. */
/*===========================================================================*/
#define GDISP_DRIVER_NAME "HX8347D"
#define GDISP_DRIVER_STRUCT GDISP_HX8347D
#define GDISP_HARDWARE_STREAM_WRITE TRUE
#define GDISP_HARDWARE_CONTROL TRUE