inmarket
6 years ago
5 changed files with 385 additions and 11 deletions
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/*
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* This file is subject to the terms of the GFX License. If a copy of |
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* the license was not distributed with this file, you can obtain one at: |
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* |
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* http://ugfx.org/license.html
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*/ |
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#ifndef _GDISP_LLD_BOARD_H |
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#define _GDISP_LLD_BOARD_H |
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// Avoid naming collisions with CubeHAL
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#undef Red |
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#undef Green |
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#undef Blue |
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// Don't allow the driver to init the LTDC clock. We will do it here
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#define LTDC_NO_CLOCK_INIT TRUE |
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//#include "stm32f4xx_hal.h"
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//#include "stm32f4xx_hal_sdram.h"
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//#include "stm32f4xx_hal_rcc.h"
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//#include "stm32f4xx_hal_gpio.h"
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//#include "stm32f4xx_hal_ltdc.h"
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#include "stm32469i_discovery_lcd.h" |
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LTDC_HandleTypeDef hltdc_eval; |
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static DSI_VidCfgTypeDef hdsivideo_handle; |
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DSI_HandleTypeDef hdsi_eval; |
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// Panel parameters
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// This panel is a KoD KM-040TMP-02-0621 DSI LCD Display.
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static const ltdcConfig driverCfg = { |
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800, 480, // Width, Height (pixels)
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120, 12, // Horizontal, Vertical sync (pixels)
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120, 12, // Horizontal, Vertical back porch (pixels)
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120, 12, // Horizontal, Vertical front porch (pixels)
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0, // Sync flags
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0x000000, // Clear color (RGB888)
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{ // Background layer config
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(LLDCOLOR_TYPE *)SDRAM_DEVICE_ADDR, // Frame buffer address
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800, 480, // Width, Height (pixels)
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800 * LTDC_PIXELBYTES, // Line pitch (bytes)
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LTDC_PIXELFORMAT, // Pixel format
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0, 0, // Start pixel position (x, y)
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800, 480, // Size of virtual layer (cx, cy)
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LTDC_COLOR_FUCHSIA, // Default color (ARGB8888)
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0x980088, // Color key (RGB888)
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LTDC_BLEND_FIX1_FIX2, // Blending factors
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0, // Palette (RGB888, can be NULL)
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0, // Palette length
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0xFF, // Constant alpha factor
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LTDC_LEF_ENABLE // Layer configuration flags
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}, |
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LTDC_UNUSED_LAYER_CONFIG // Foreground layer config
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}; |
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/* Display timing */ |
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#define KoD_FREQUENCY_DIVIDER 7 |
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static GFXINLINE void init_board(GDisplay *g) { |
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// As we are not using multiple displays we set g->board to NULL as we don't use it
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g->board = 0; |
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DSI_PLLInitTypeDef dsiPllInit; |
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DSI_PHY_TimerTypeDef PhyTimings; |
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// static RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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uint32_t LcdClock = 30000;//27429; /*!< LcdClk = 27429 kHz */
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/**
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* @brief Default Active LTDC Layer in which drawing is made is LTDC Layer Background |
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*/ |
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// static uint32_t ActiveLayer = LTDC_ACTIVE_LAYER_BACKGROUND;
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/**
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* @brief Current Drawing Layer properties variable |
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*/ |
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// static LCD_DrawPropTypeDef DrawProp[LTDC_MAX_LAYER_NUMBER];
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uint32_t laneByteClk_kHz = 0; |
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uint32_t VSA; /*!< Vertical start active time in units of lines */ |
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uint32_t VBP; /*!< Vertical Back Porch time in units of lines */ |
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uint32_t VFP; /*!< Vertical Front Porch time in units of lines */ |
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uint32_t VACT; /*!< Vertical Active time in units of lines = imageSize Y in pixels to display */ |
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uint32_t HSA; /*!< Horizontal start active time in units of lcdClk */ |
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uint32_t HBP; /*!< Horizontal Back Porch time in units of lcdClk */ |
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uint32_t HFP; /*!< Horizontal Front Porch time in units of lcdClk */ |
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uint32_t HACT; /*!< Horizontal Active time in units of lcdClk = imageSize X in pixels to display */ |
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/* Toggle Hardware Reset of the DSI LCD using
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* its XRES signal (active low) */ |
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BSP_LCD_Reset(); |
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/* Call first MSP Initialize only in case of first initialization
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* This will set IP blocks LTDC, DSI and DMA2D |
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* - out of reset |
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* - clocked |
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* - NVIC IRQ related to IP blocks enabled |
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*/ |
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BSP_LCD_MspInit(); |
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/*************************DSI Initialization***********************************/ |
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/* Base address of DSI Host/Wrapper registers to be set before calling De-Init */ |
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hdsi_eval.Instance = DSI; |
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HAL_DSI_DeInit(&(hdsi_eval)); |
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#if !defined(USE_STM32469I_DISCO_REVA) |
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dsiPllInit.PLLNDIV = 125; |
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dsiPllInit.PLLIDF = DSI_PLL_IN_DIV2; |
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dsiPllInit.PLLODF = DSI_PLL_OUT_DIV1; |
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#else |
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dsiPllInit.PLLNDIV = 100; |
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dsiPllInit.PLLIDF = DSI_PLL_IN_DIV5; |
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dsiPllInit.PLLODF = DSI_PLL_OUT_DIV1; |
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#endif |
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laneByteClk_kHz = 62500; /* 500 MHz / 8 = 62.5 MHz = 62500 kHz */ |
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/* Set number of Lanes */ |
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hdsi_eval.Init.NumberOfLanes = DSI_TWO_DATA_LANES; |
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/* TXEscapeCkdiv = f(LaneByteClk)/15.62 = 4 */ |
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hdsi_eval.Init.TXEscapeCkdiv = laneByteClk_kHz/15620; |
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HAL_DSI_Init(&(hdsi_eval), &(dsiPllInit)); |
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/* Timing parameters for all Video modes
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* Set Timing parameters of LTDC depending on its chosen orientation |
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*/ |
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/* lcd_orientation == LCD_ORIENTATION_LANDSCAPE */ |
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uint32_t lcd_x_size = OTM8009A_800X480_WIDTH; /* 800 */ |
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uint32_t lcd_y_size = OTM8009A_800X480_HEIGHT; /* 480 */ |
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HACT = lcd_x_size; |
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VACT = lcd_y_size; |
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/* The following values are same for portrait and landscape orientations */ |
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VSA = 12;//OTM8009A_480X800_VSYNC; /* 12 */
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VBP = 12;//OTM8009A_480X800_VBP; /* 12 */
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VFP = 12;//OTM8009A_480X800_VFP; /* 12 */
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HSA = 120;//OTM8009A_480X800_HSYNC; /* 63 */
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HBP = 120;//OTM8009A_480X800_HBP; /* 120 */
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HFP = 120;//OTM8009A_480X800_HFP; /* 120 */
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hdsivideo_handle.VirtualChannelID = LCD_OTM8009A_ID; |
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hdsivideo_handle.ColorCoding = LCD_DSI_PIXEL_DATA_FMT_RBG888; |
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hdsivideo_handle.VSPolarity = DSI_VSYNC_ACTIVE_HIGH; |
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hdsivideo_handle.HSPolarity = DSI_HSYNC_ACTIVE_HIGH; |
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hdsivideo_handle.DEPolarity = DSI_DATA_ENABLE_ACTIVE_HIGH; |
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hdsivideo_handle.Mode = DSI_VID_MODE_BURST; /* Mode Video burst ie : one LgP per line */ |
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hdsivideo_handle.NullPacketSize = 0xFFF; |
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hdsivideo_handle.NumberOfChunks = 0; |
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hdsivideo_handle.PacketSize = HACT; /* Value depending on display orientation choice portrait/landscape */ |
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hdsivideo_handle.HorizontalSyncActive = (HSA * laneByteClk_kHz) / LcdClock; |
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hdsivideo_handle.HorizontalBackPorch = (HBP * laneByteClk_kHz) / LcdClock; |
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hdsivideo_handle.HorizontalLine = ((HACT + HSA + HBP + HFP) * laneByteClk_kHz) / LcdClock; /* Value depending on display orientation choice portrait/landscape */ |
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hdsivideo_handle.VerticalSyncActive = VSA; |
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hdsivideo_handle.VerticalBackPorch = VBP; |
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hdsivideo_handle.VerticalFrontPorch = VFP; |
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hdsivideo_handle.VerticalActive = VACT; /* Value depending on display orientation choice portrait/landscape */ |
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/* Enable or disable sending LP command while streaming is active in video mode */ |
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hdsivideo_handle.LPCommandEnable = DSI_LP_COMMAND_ENABLE; /* Enable sending commands in mode LP (Low Power) */ |
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/* Largest packet size possible to transmit in LP mode in VSA, VBP, VFP regions */ |
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/* Only useful when sending LP packets is allowed while streaming is active in video mode */ |
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hdsivideo_handle.LPLargestPacketSize = 16; |
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/* Largest packet size possible to transmit in LP mode in HFP region during VACT period */ |
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/* Only useful when sending LP packets is allowed while streaming is active in video mode */ |
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hdsivideo_handle.LPVACTLargestPacketSize = 0; |
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/* Specify for each region of the video frame, if the transmission of command in LP mode is allowed in this region */ |
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/* while streaming is active in video mode */ |
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hdsivideo_handle.LPHorizontalFrontPorchEnable = DSI_LP_HFP_ENABLE; /* Allow sending LP commands during HFP period */ |
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hdsivideo_handle.LPHorizontalBackPorchEnable = DSI_LP_HBP_ENABLE; /* Allow sending LP commands during HBP period */ |
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hdsivideo_handle.LPVerticalActiveEnable = DSI_LP_VACT_ENABLE; /* Allow sending LP commands during VACT period */ |
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hdsivideo_handle.LPVerticalFrontPorchEnable = DSI_LP_VFP_ENABLE; /* Allow sending LP commands during VFP period */ |
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hdsivideo_handle.LPVerticalBackPorchEnable = DSI_LP_VBP_ENABLE; /* Allow sending LP commands during VBP period */ |
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hdsivideo_handle.LPVerticalSyncActiveEnable = DSI_LP_VSYNC_ENABLE; /* Allow sending LP commands during VSync = VSA period */ |
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/* Configure DSI Video mode timings with settings set above */ |
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HAL_DSI_ConfigVideoMode(&(hdsi_eval), &(hdsivideo_handle)); |
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/* Configure DSI PHY HS2LP and LP2HS timings */ |
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PhyTimings.ClockLaneHS2LPTime = 35; |
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PhyTimings.ClockLaneLP2HSTime = 35; |
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PhyTimings.DataLaneHS2LPTime = 35; |
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PhyTimings.DataLaneLP2HSTime = 35; |
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PhyTimings.DataLaneMaxReadTime = 0; |
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PhyTimings.StopWaitTime = 10; |
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HAL_DSI_ConfigPhyTimer(&hdsi_eval, &PhyTimings); |
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/*************************End DSI Initialization*******************************/ |
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/************************LTDC Initialization***********************************/ |
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// KoD LCD clock configuration
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// PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz
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// PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 384 Mhz
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// PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 384/7 = 54.857 Mhz
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// LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_2 = 54.857/2 = 27.429Mhz
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#define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */ |
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#define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */ |
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#define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */ |
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#define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */ |
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#define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */ |
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#define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */ |
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#define STM32_PLLSAIN_VALUE 384 |
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#define STM32_PLLSAIQ_VALUE 4 |
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#define STM32_PLLSAIR_VALUE KoD_FREQUENCY_DIVIDER |
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#define STM32_PLLSAIR_POST STM32_SAIR_DIV2 |
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RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24); |
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RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST; |
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RCC->CR |= RCC_CR_PLLSAION; |
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// PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
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// PeriphClkInitStruct.PLLSAI.PLLSAIN = 384;
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// PeriphClkInitStruct.PLLSAI.PLLSAIR = 7;
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// PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
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// HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
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/* Get LTDC Configuration from DSI Configuration */ |
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// HAL_LTDC_StructInitFromVideoConfig(&(hltdc_eval), &(hdsivideo_handle));
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/* Initialize the LTDC */ |
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// HAL_LTDC_Init(&hltdc_eval);
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/* Enable the DSI host and wrapper : but LTDC is not started yet at this stage */ |
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HAL_DSI_Start(&(hdsi_eval)); |
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#if !defined(DATA_IN_ExtSDRAM) |
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/* Initialize the SDRAM */ |
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BSP_SDRAM_Init(); |
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#endif /* DATA_IN_ExtSDRAM */ |
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} |
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static GFXINLINE void post_init_board(GDisplay* g) |
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{ |
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(void)g; |
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/* Initialize the font */ |
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BSP_LCD_SetFont(&LCD_DEFAULT_FONT); |
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/************************End LTDC Initialization*******************************/ |
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/***********************OTM8009A Initialization********************************/ |
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/* Initialize the OTM8009A LCD Display IC Driver (KoD LCD IC Driver)
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* depending on configuration set in 'hdsivideo_handle'. |
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*/ |
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OTM8009A_Init(OTM8009A_FORMAT_RGB888, OTM8009A_ORIENTATION_LANDSCAPE); |
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/***********************End OTM8009A Initialization****************************/ |
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// ------------------------------------------------------------------------
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//BSP_LCD_LayerDefaultInit(LTDC_ACTIVE_LAYER_BACKGROUND, LCD_FB_START_ADDRESS);
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//BSP_LCD_SelectLayer(LTDC_ACTIVE_LAYER_BACKGROUND);
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//BSP_LCD_SetLayerVisible(LTDC_ACTIVE_LAYER_FOREGROUND, DISABLE);
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} |
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static GFXINLINE void set_backlight(GDisplay* g, uint8_t percent) |
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{ |
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(void)g; |
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(void)percent; |
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} |
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#endif /* _GDISP_LLD_BOARD_H */ |
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@ -0,0 +1,85 @@ |
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/*
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* This file is subject to the terms of the GFX License. If a copy of |
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* the license was not distributed with this file, you can obtain one at: |
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* |
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* http://ugfx.org/license.html
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*/ |
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#ifndef _GINPUT_LLD_MOUSE_BOARD_H |
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#define _GINPUT_LLD_MOUSE_BOARD_H |
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#include "tm_stm32_i2c.h" |
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#include "stm32469i_discovery_ts.h" |
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#include "ft6x06.h" |
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// Resolution and Accuracy Settings
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#define GMOUSE_FT6x06_PEN_CALIBRATE_ERROR 8 |
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#define GMOUSE_FT6x06_PEN_CLICK_ERROR 6 |
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#define GMOUSE_FT6x06_PEN_MOVE_ERROR 4 |
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#define GMOUSE_FT6x06_FINGER_CALIBRATE_ERROR 14 |
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#define GMOUSE_FT6x06_FINGER_CLICK_ERROR 18 |
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#define GMOUSE_FT6x06_FINGER_MOVE_ERROR 14 |
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// How much extra data to allocate at the end of the GMouse structure for the board's use
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#define GMOUSE_FT6x06_BOARD_DATA_SIZE 0 |
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// Set this to TRUE if you want self-calibration.
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// NOTE: This is not as accurate as real calibration.
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// It requires the orientation of the touch panel to match the display.
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// It requires the active area of the touch panel to exactly match the display size.
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//#define GMOUSE_FT6x06_SELF_CALIBRATE TRUE
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#define FT6x06_SLAVE_ADDR 0x54 |
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static bool_t init_board(GMouse* m, unsigned driverinstance) { |
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(void)m; |
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TS_StateTypeDef ts_state; |
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return TS_OK == BSP_TS_Init(BSP_LCD_GetXSize(), BSP_LCD_GetYSize()); |
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} |
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#define aquire_bus(m) |
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#define release_bus(m); |
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static void write_reg(GMouse* m, uint8_t reg, uint8_t val) { |
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(void)m; |
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//TM_I2C_Write(I2C1, FT6x06_SLAVE_ADDR, reg, val);
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} |
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static uint8_t read_byte(GMouse* m, uint8_t reg) { |
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(void)m; |
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/*uint8_t data;
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TM_I2C_Read(I2C1, FT6x06_SLAVE_ADDR, reg, &data); |
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return data;*/ |
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TS_StateTypeDef ts_state; |
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if(reg == FT6x06_TOUCH_POINTS){ |
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if (TS_OK != BSP_TS_GetState(&ts_state)) |
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{ |
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return FALSE; |
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} |
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return ts_state.touchDetected; |
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} |
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} |
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static uint16_t read_word(GMouse* m, uint8_t reg) { |
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(void)m; |
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/*uint8_t data[2];
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TM_I2C_ReadMulti(I2C1, FT6x06_SLAVE_ADDR, reg, data, 2); |
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return (data[1]<<8 | data[0]);*/ |
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TS_StateTypeDef ts_state; |
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if (TS_OK == BSP_TS_GetState(&ts_state)) |
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{ |
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if(reg == FT6x06_TOUCH1_XH){ |
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return (coord_t)ts_state.touchX[0]; |
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}else if(reg == FT6x06_TOUCH1_YH){ |
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return (coord_t)ts_state.touchY[0]; |
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} |
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} |
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} |
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#endif /* _GINPUT_LLD_MOUSE_BOARD_H */ |
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@ -0,0 +1,3 @@ |
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Note this board definition is definitly incomplete. |
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Please someone help us complete it! |
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Reference in new issue