Adding Embest board example for chibios 2.x
This commit is contained in:
Joel Bodenmann
parent
3356b5a544
commit
cb668266b5
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# Possible Targets: all clean Debug cleanDebug Release cleanRelease
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##############################################################################################
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# Settings
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#
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# General settings
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# See $(GFXLIB)/tools/gmake_scripts/readme.txt for the list of variables
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OPT_OS = chibios
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OPT_THUMB = yes
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OPT_LINK_OPTIMIZE = yes
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OPT_CPU = stm32m4
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# uGFX settings
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# See $(GFXLIB)/tools/gmake_scripts/library_ugfx.mk for the list of variables
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GFXLIB = /path/to/your/ugfx
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GFXBOARD = Embest-STM32-DMSTF4BB
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GFXDEMO = modules/gdisp/basics
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# ChibiOS settings
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ifeq ($(OPT_OS),chibios)
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# See $(GFXLIB)/tools/gmake_scripts/os_chibios.mk for the list of variables
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CHIBIOS = /path/to/your/chibios
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CHIBIOS_BOARD =
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CHIBIOS_PLATFORM = STM32F4xx
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CHIBIOS_PORT = GCC/ARMCMx/STM32F4xx
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CHIBIOS_LDSCRIPT = STM32F407xG.ld
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# We define a non standard board script as this is not a standard ChibiOS supported board
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include $(GFXLIB)/boards/base/$(GFXBOARD)/chibios_board/board.mk
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endif
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##############################################################################################
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# Set these for your project
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#
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ARCH = arm-none-eabi-
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SRCFLAGS = -ggdb -O0
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CFLAGS =
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CXXFLAGS = -fno-rtti
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ASFLAGS =
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LDFLAGS =
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SRC =
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OBJS =
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DEFS =
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LIBS =
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INCPATH =
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LIBPATH =
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LDSCRIPT =
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##############################################################################################
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# These should be at the end
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#
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include $(GFXLIB)/tools/gmake_scripts/library_ugfx.mk
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include $(GFXLIB)/tools/gmake_scripts/os_$(OPT_OS).mk
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include $(GFXLIB)/tools/gmake_scripts/compiler_gcc.mk
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# *** EOF ***
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535
boards/base/Embest-STM32-DMSTF4BB/example_chibios_2.x/chconf.h
Normal file
535
boards/base/Embest-STM32-DMSTF4BB/example_chibios_2.x/chconf.h
Normal file
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file templates/chconf.h
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* @brief Configuration file template.
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* @details A copy of this file must be placed in each project directory, it
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* contains the application specific kernel settings.
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*
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* @addtogroup config
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* @details Kernel related settings and hooks.
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* @{
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*/
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#ifndef _CHCONF_H_
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#define _CHCONF_H_
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/*===========================================================================*/
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/**
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* @name Kernel parameters and options
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* @{
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*/
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/*===========================================================================*/
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/**
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* @brief System tick frequency.
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* @details Frequency of the system timer that drives the system ticks. This
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* setting also defines the system tick time unit.
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*/
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#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
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#define CH_FREQUENCY 1000
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#endif
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/**
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* @brief Round robin interval.
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* @details This constant is the number of system ticks allowed for the
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* threads before preemption occurs. Setting this value to zero
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* disables the preemption for threads with equal priority and the
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* round robin becomes cooperative. Note that higher priority
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* threads can still preempt, the kernel is always preemptive.
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*
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* @note Disabling the round robin preemption makes the kernel more compact
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* and generally faster.
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*/
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#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
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#define CH_TIME_QUANTUM 20
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#endif
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/**
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* @brief Managed RAM size.
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* @details Size of the RAM area to be managed by the OS. If set to zero
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* then the whole available RAM is used. The core memory is made
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* available to the heap allocator and/or can be used directly through
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* the simplified core memory allocator.
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*
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* @note In order to let the OS manage the whole RAM the linker script must
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* provide the @p __heap_base__ and @p __heap_end__ symbols.
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* @note Requires @p CH_USE_MEMCORE.
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*/
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#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
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#define CH_MEMCORE_SIZE 0
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#endif
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/**
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* @brief Idle thread automatic spawn suppression.
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* @details When this option is activated the function @p chSysInit()
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* does not spawn the idle thread automatically. The application has
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* then the responsibility to do one of the following:
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* - Spawn a custom idle thread at priority @p IDLEPRIO.
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* - Change the main() thread priority to @p IDLEPRIO then enter
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* an endless loop. In this scenario the @p main() thread acts as
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* the idle thread.
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* .
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* @note Unless an idle thread is spawned the @p main() thread must not
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* enter a sleep state.
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*/
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#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
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#define CH_NO_IDLE_THREAD FALSE
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#endif
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/** @} */
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/*===========================================================================*/
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/**
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* @name Performance options
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* @{
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*/
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/*===========================================================================*/
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/**
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* @brief OS optimization.
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* @details If enabled then time efficient rather than space efficient code
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* is used when two possible implementations exist.
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*
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* @note This is not related to the compiler optimization options.
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
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#define CH_OPTIMIZE_SPEED TRUE
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#endif
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/** @} */
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/*===========================================================================*/
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/**
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* @name Subsystem options
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* @{
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*/
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/*===========================================================================*/
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/**
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* @brief Threads registry APIs.
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* @details If enabled then the registry APIs are included in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
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#define CH_USE_REGISTRY TRUE
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#endif
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/**
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* @brief Threads synchronization APIs.
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* @details If enabled then the @p chThdWait() function is included in
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* the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
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#define CH_USE_WAITEXIT TRUE
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#endif
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/**
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* @brief Semaphores APIs.
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* @details If enabled then the Semaphores APIs are included in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
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#define CH_USE_SEMAPHORES TRUE
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#endif
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/**
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* @brief Semaphores queuing mode.
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* @details If enabled then the threads are enqueued on semaphores by
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* priority rather than in FIFO order.
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*
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* @note The default is @p FALSE. Enable this if you have special requirements.
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* @note Requires @p CH_USE_SEMAPHORES.
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*/
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#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
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#define CH_USE_SEMAPHORES_PRIORITY FALSE
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#endif
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/**
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* @brief Atomic semaphore API.
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* @details If enabled then the semaphores the @p chSemSignalWait() API
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* is included in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_USE_SEMAPHORES.
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*/
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#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
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#define CH_USE_SEMSW TRUE
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#endif
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/**
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* @brief Mutexes APIs.
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* @details If enabled then the mutexes APIs are included in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
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#define CH_USE_MUTEXES TRUE
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#endif
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/**
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* @brief Conditional Variables APIs.
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* @details If enabled then the conditional variables APIs are included
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* in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_USE_MUTEXES.
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*/
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#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
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#define CH_USE_CONDVARS TRUE
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#endif
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/**
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* @brief Conditional Variables APIs with timeout.
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* @details If enabled then the conditional variables APIs with timeout
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* specification are included in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_USE_CONDVARS.
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*/
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#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
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#define CH_USE_CONDVARS_TIMEOUT TRUE
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#endif
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/**
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* @brief Events Flags APIs.
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* @details If enabled then the event flags APIs are included in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
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#define CH_USE_EVENTS TRUE
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#endif
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/**
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* @brief Events Flags APIs with timeout.
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* @details If enabled then the events APIs with timeout specification
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* are included in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_USE_EVENTS.
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*/
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#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
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#define CH_USE_EVENTS_TIMEOUT TRUE
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#endif
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/**
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* @brief Synchronous Messages APIs.
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* @details If enabled then the synchronous messages APIs are included
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* in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
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#define CH_USE_MESSAGES TRUE
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#endif
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/**
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* @brief Synchronous Messages queuing mode.
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* @details If enabled then messages are served by priority rather than in
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* FIFO order.
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*
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* @note The default is @p FALSE. Enable this if you have special requirements.
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* @note Requires @p CH_USE_MESSAGES.
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*/
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#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
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#define CH_USE_MESSAGES_PRIORITY FALSE
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#endif
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/**
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* @brief Mailboxes APIs.
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* @details If enabled then the asynchronous messages (mailboxes) APIs are
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* included in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_USE_SEMAPHORES.
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*/
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#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
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#define CH_USE_MAILBOXES TRUE
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#endif
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/**
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* @brief I/O Queues APIs.
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* @details If enabled then the I/O queues APIs are included in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
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#define CH_USE_QUEUES TRUE
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#endif
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/**
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* @brief Core Memory Manager APIs.
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* @details If enabled then the core memory manager APIs are included
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* in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
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#define CH_USE_MEMCORE TRUE
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#endif
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/**
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* @brief Heap Allocator APIs.
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* @details If enabled then the memory heap allocator APIs are included
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* in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
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* @p CH_USE_SEMAPHORES.
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* @note Mutexes are recommended.
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*/
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#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
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#define CH_USE_HEAP TRUE
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#endif
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/**
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* @brief C-runtime allocator.
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* @details If enabled the the heap allocator APIs just wrap the C-runtime
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* @p malloc() and @p free() functions.
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*
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* @note The default is @p FALSE.
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* @note Requires @p CH_USE_HEAP.
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* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
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* appropriate documentation.
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*/
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#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
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#define CH_USE_MALLOC_HEAP FALSE
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#endif
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/**
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* @brief Memory Pools Allocator APIs.
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* @details If enabled then the memory pools allocator APIs are included
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* in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
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#define CH_USE_MEMPOOLS TRUE
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#endif
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/**
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* @brief Dynamic Threads APIs.
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* @details If enabled then the dynamic threads creation APIs are included
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* in the kernel.
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*
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* @note The default is @p TRUE.
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||||
* @note Requires @p CH_USE_WAITEXIT.
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||||
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
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*/
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#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
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#define CH_USE_DYNAMIC TRUE
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#endif
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/** @} */
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/*===========================================================================*/
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/**
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* @name Debug options
|
||||
* @{
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||||
*/
|
||||
/*===========================================================================*/
|
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|
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/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
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*
|
||||
* @note The default is @p FALSE.
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||||
*/
|
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#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
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#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
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#endif
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/**
|
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* @brief Debug option, parameters checks.
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||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
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#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
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||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
#endif
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|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
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||||
* runtime anomalies and port-defined checks.
|
||||
*
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||||
* @note The default is @p FALSE.
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||||
*/
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||||
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
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||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
#endif
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/**
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||||
* @brief Debug option, trace buffer.
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||||
* @details If enabled then the context switch circular trace buffer is
|
||||
* activated.
|
||||
*
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||||
* @note The default is @p FALSE.
|
||||
*/
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||||
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
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||||
#define CH_DBG_ENABLE_TRACE FALSE
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||||
#endif
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||||
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||||
/**
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||||
* @brief Debug option, stack checks.
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||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
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||||
* @note The stack check is performed in a architecture/port dependent way.
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||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
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||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
#endif
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||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p Thread structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note This debug option is defaulted to TRUE because it is required by
|
||||
* some test cases into the test suite.
|
||||
*/
|
||||
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
|
||||
#define CH_DBG_THREADS_PROFILING TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p Thread structure.
|
||||
*/
|
||||
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
|
||||
#define THREAD_EXT_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
|
||||
#define THREAD_EXT_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*
|
||||
* @note It is inserted into lock zone.
|
||||
* @note It is also invoked when the threads simply return in order to
|
||||
* terminate.
|
||||
*/
|
||||
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
|
||||
#define THREAD_EXT_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
|
||||
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
|
||||
#define IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
|
||||
#define SYSTEM_TICK_EVENT_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
|
||||
#define SYSTEM_HALT_HOOK() { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* NOTE: When changing this option you also have to enable or disable the FPU
|
||||
in the project options.*/
|
||||
#define CORTEX_USE_FPU FALSE
|
||||
|
||||
#endif /* _CHCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
312
boards/base/Embest-STM32-DMSTF4BB/example_chibios_2.x/halconf.h
Normal file
312
boards/base/Embest-STM32-DMSTF4BB/example_chibios_2.x/halconf.h
Normal file
@ -0,0 +1,312 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HALCONF_H_
|
||||
#define _HALCONF_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the TM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_TM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 64 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
#endif /* _HALCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
288
boards/base/Embest-STM32-DMSTF4BB/example_chibios_2.x/mcuconf.h
Normal file
288
boards/base/Embest-STM32-DMSTF4BB/example_chibios_2.x/mcuconf.h
Normal file
@ -0,0 +1,288 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* STM32F4xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 15...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#define STM32F4xx_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_HSI_ENABLED TRUE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED TRUE
|
||||
#define STM32_LSE_ENABLED FALSE
|
||||
#define STM32_CLOCK48_REQUIRED TRUE
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_HSE
|
||||
#define STM32_PLLM_VALUE 8
|
||||
#define STM32_PLLN_VALUE 336
|
||||
#define STM32_PLLP_VALUE 2
|
||||
#define STM32_PLLQ_VALUE 7
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE1 STM32_PPRE1_DIV4
|
||||
#define STM32_PPRE2 STM32_PPRE2_DIV2
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
#define STM32_RTCPRE_VALUE 8
|
||||
#define STM32_MCO1SEL STM32_MCO1SEL_HSI
|
||||
#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
|
||||
#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
|
||||
#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
|
||||
#define STM32_I2SSRC STM32_I2SSRC_CKIN
|
||||
#define STM32_PLLI2SN_VALUE 192
|
||||
#define STM32_PLLI2SR_VALUE 5
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_BKPRAM_ENABLE FALSE
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
|
||||
#define STM32_ADC_USE_ADC1 TRUE
|
||||
#define STM32_ADC_USE_ADC2 FALSE
|
||||
#define STM32_ADC_USE_ADC3 FALSE
|
||||
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC2_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC3_DMA_PRIORITY 2
|
||||
#define STM32_ADC_IRQ_PRIORITY 6
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
|
||||
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
|
||||
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
|
||||
|
||||
/*
|
||||
* CAN driver system settings.
|
||||
*/
|
||||
#define STM32_CAN_USE_CAN1 FALSE
|
||||
#define STM32_CAN_USE_CAN2 FALSE
|
||||
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
||||
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
|
||||
|
||||
/*
|
||||
* EXT driver system settings.
|
||||
*/
|
||||
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
|
||||
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
|
||||
#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
*/
|
||||
#define STM32_GPT_USE_TIM1 FALSE
|
||||
#define STM32_GPT_USE_TIM2 FALSE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM5 FALSE
|
||||
#define STM32_GPT_USE_TIM6 FALSE
|
||||
#define STM32_GPT_USE_TIM7 FALSE
|
||||
#define STM32_GPT_USE_TIM8 FALSE
|
||||
#define STM32_GPT_USE_TIM9 FALSE
|
||||
#define STM32_GPT_USE_TIM11 FALSE
|
||||
#define STM32_GPT_USE_TIM12 FALSE
|
||||
#define STM32_GPT_USE_TIM14 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 TRUE
|
||||
#define STM32_I2C_USE_I2C2 FALSE
|
||||
#define STM32_I2C_USE_I2C3 FALSE
|
||||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C3_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C3_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
|
||||
#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
|
||||
#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt()
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_USE_TIM4 FALSE
|
||||
#define STM32_ICU_USE_TIM5 FALSE
|
||||
#define STM32_ICU_USE_TIM8 FALSE
|
||||
#define STM32_ICU_USE_TIM9 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* MAC driver system settings.
|
||||
*/
|
||||
#define STM32_MAC_TRANSMIT_BUFFERS 2
|
||||
#define STM32_MAC_RECEIVE_BUFFERS 4
|
||||
#define STM32_MAC_BUFFERS_SIZE 1522
|
||||
#define STM32_MAC_PHY_TIMEOUT 100
|
||||
#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
|
||||
#define STM32_MAC_ETH1_IRQ_PRIORITY 13
|
||||
#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_USE_TIM4 TRUE
|
||||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM8 FALSE
|
||||
#define STM32_PWM_USE_TIM9 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 TRUE
|
||||
#define STM32_SERIAL_USE_USART3 FALSE
|
||||
#define STM32_SERIAL_USE_UART4 FALSE
|
||||
#define STM32_SERIAL_USE_UART5 FALSE
|
||||
#define STM32_SERIAL_USE_USART6 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||
#define STM32_SERIAL_USART6_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 FALSE
|
||||
#define STM32_SPI_USE_SPI2 TRUE
|
||||
#define STM32_SPI_USE_SPI3 FALSE
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
#define STM32_UART_USE_USART2 FALSE
|
||||
#define STM32_UART_USE_USART3 FALSE
|
||||
#define STM32_UART_USE_UART4 FALSE
|
||||
#define STM32_UART_USE_UART5 FALSE
|
||||
#define STM32_UART_USE_USART6 FALSE
|
||||
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART4_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART5_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART6_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||
#define STM32_UART_UART4_DMA_PRIORITY 0
|
||||
#define STM32_UART_UART5_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART6_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_OTG1 FALSE
|
||||
#define STM32_USB_USE_OTG2 FALSE
|
||||
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG2_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
|
||||
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
|
||||
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||||
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
|
||||
@ -0,0 +1,81 @@
|
||||
# This is a script file for OpenOCD 0.7.0
|
||||
#
|
||||
# It is set up for the Mikromedia-STM32M4 board using the ST-Link JTAG adaptor.
|
||||
#
|
||||
# Assuming the current directory is your project directory containing this openocd.cfg file...
|
||||
#
|
||||
# To program your device:
|
||||
#
|
||||
# openocd -f openocd.cfg -c "Burn yourfile.bin" -c shutdown
|
||||
#
|
||||
# To debug your device:
|
||||
#
|
||||
# openocd
|
||||
# (This will run openocd in gdb server debug mode. Leave it running in the background)
|
||||
#
|
||||
# gdb yourfile.elf
|
||||
# (To start gdb. Then run the following commands in gdb...)
|
||||
#
|
||||
# target remote 127.0.0.1:3333
|
||||
# monitor Debug
|
||||
# stepi
|
||||
# (This last stepi resynchronizes gdb).
|
||||
#
|
||||
# If you want to reprogram from within gdb:
|
||||
#
|
||||
# monitor Burn yourfile.bin
|
||||
#
|
||||
|
||||
echo ""
|
||||
echo "##### Loading debugger..."
|
||||
source [find interface/stlink-v2.cfg]
|
||||
|
||||
echo ""
|
||||
echo "##### Loading CPU..."
|
||||
source [find target/stm32f4x_stlink.cfg]
|
||||
|
||||
echo ""
|
||||
echo "##### Configuring..."
|
||||
reset_config srst_only srst_nogate
|
||||
#cortex_m maskisr (auto|on|off)
|
||||
#cortex_m vector_catch [all|none|list]
|
||||
#cortex_m reset_config (srst|sysresetreq|vectreset)
|
||||
#gdb_breakpoint_override hard
|
||||
|
||||
proc Debug { } {
|
||||
echo ""
|
||||
echo "##### Debug Session Connected..."
|
||||
reset init
|
||||
echo "Ready..."
|
||||
}
|
||||
|
||||
proc Burn {file} {
|
||||
echo ""
|
||||
echo "##### Burning $file to device..."
|
||||
halt
|
||||
# Due to an issue with the combination of the ST-Link adapters and OpenOCD
|
||||
# applying the stm32f2x unlock 0 command actaully applies read protection - VERY BAD!
|
||||
# If this happens to you - use the ST-Link utility to set the option byte back to normal.
|
||||
# If you are using a different debugger eg a FT2232 based adapter you can uncomment the line below.
|
||||
#stm32f2x unlock 0
|
||||
flash protect 0 0 last off
|
||||
reset init
|
||||
flash write_image erase $file 0x08000000
|
||||
verify_image $file 0x0
|
||||
#flash protect 0 0 last on
|
||||
reset
|
||||
echo "Burning Complete!"
|
||||
}
|
||||
|
||||
echo ""
|
||||
echo "##### Leaving Configuration Mode..."
|
||||
init
|
||||
reset init
|
||||
flash probe 0
|
||||
flash banks
|
||||
#flash info 0
|
||||
|
||||
echo ""
|
||||
echo "##### Waiting for debug connections..."
|
||||
|
||||
|
||||
@ -26,7 +26,7 @@ ifeq ($(OPT_OS),chibios)
|
||||
CHIBIOS_PORT = GCC/ARMCMx/STM32F4xx
|
||||
CHIBIOS_LDSCRIPT = STM32F407xG.ld
|
||||
# We define a non standard board script as this is not a standard ChibiOS supported board
|
||||
include $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.mk
|
||||
include $(GFXLIB)/boards/base/$(GFXBOARD)/ChibiOS_Board/board.mk
|
||||
endif
|
||||
|
||||
##############################################################################################
|
||||
|
||||
@ -28,7 +28,7 @@ ifeq ($(OPT_OS),chibios)
|
||||
CHIBIOS_PORT = stm32f4xx
|
||||
CHIBIOS_LDSCRIPT = STM32F407xG.ld
|
||||
# We define a non standard board script as this is not a standard ChibiOS supported board
|
||||
include $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.mk
|
||||
include $(GFXLIB)/boards/base/$(GFXBOARD)/ChibiOS_Board/board.mk
|
||||
endif
|
||||
|
||||
##############################################################################################
|
||||
|
||||
Loading…
Reference in New Issue
Block a user