Updating STM32F429i-Discovery board file for ChibiOS
parent
f9be386e52
commit
d0fb541191
|
|
@ -1,7 +0,0 @@
|
||||||
GFXINC += $(GFXLIB)/boards/base/STM32F429i-Discovery
|
|
||||||
GFXSRC += $(GFXLIB)/boards/base/STM32F429i-Discovery/stm32f429i_discovery_sdram.c \
|
|
||||||
$(GFXLIB)/boards/base/STM32F429i-Discovery/stm32f4xx_fmc.c
|
|
||||||
|
|
||||||
GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE
|
|
||||||
include $(GFXLIB)/drivers/gdisp/STM32LTDC/driver.mk
|
|
||||||
include $(GFXLIB)/drivers/ginput/touch/STMPE811/driver.mk
|
|
||||||
|
|
@ -0,0 +1,7 @@
|
||||||
|
GFXINC += $(GFXLIB)/boards/base/STM32F429i-Discovery/chibios
|
||||||
|
GFXSRC += $(GFXLIB)/boards/base/STM32F429i-Discovery/chibios/stm32f429i_discovery_sdram.c \
|
||||||
|
$(GFXLIB)/boards/base/STM32F429i-Discovery/chibios/stm32f4xx_fmc.c
|
||||||
|
|
||||||
|
GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE
|
||||||
|
include $(GFXLIB)/drivers/gdisp/STM32LTDC/driver.mk
|
||||||
|
include $(GFXLIB)/drivers/ginput/touch/STMPE811/driver.mk
|
||||||
|
|
@ -1,213 +1,213 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.org/license.html
|
* http://ugfx.org/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_BOARD_H
|
#ifndef _GDISP_LLD_BOARD_H
|
||||||
#define _GDISP_LLD_BOARD_H
|
#define _GDISP_LLD_BOARD_H
|
||||||
|
|
||||||
#include "stm32f4xx_fmc.h"
|
#include "stm32f4xx_fmc.h"
|
||||||
#include "stm32f429i_discovery_sdram.h"
|
#include "stm32f429i_discovery_sdram.h"
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
#define SPI_PORT &SPID5
|
#define SPI_PORT &SPID5
|
||||||
#define DC_PORT GPIOD
|
#define DC_PORT GPIOD
|
||||||
#define DC_PIN GPIOD_LCD_WRX
|
#define DC_PIN GPIOD_LCD_WRX
|
||||||
|
|
||||||
static const SPIConfig spi_cfg = {
|
static const SPIConfig spi_cfg = {
|
||||||
NULL,
|
NULL,
|
||||||
GPIOC,
|
GPIOC,
|
||||||
GPIOC_SPI5_LCD_CS,
|
GPIOC_SPI5_LCD_CS,
|
||||||
((1 << 3) & SPI_CR1_BR) | SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR
|
((1 << 3) & SPI_CR1_BR) | SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR
|
||||||
};
|
};
|
||||||
|
|
||||||
#define ALLOW_2ND_LAYER TRUE
|
#define ALLOW_2ND_LAYER TRUE
|
||||||
|
|
||||||
static const ltdcConfig driverCfg = {
|
static const ltdcConfig driverCfg = {
|
||||||
240, 320,
|
240, 320,
|
||||||
10, 2,
|
10, 2,
|
||||||
20, 2,
|
20, 2,
|
||||||
10, 4,
|
10, 4,
|
||||||
0,
|
0,
|
||||||
0x000000,
|
0x000000,
|
||||||
{
|
{
|
||||||
(LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // frame
|
(LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // frame
|
||||||
240, 320, // width, height
|
240, 320, // width, height
|
||||||
240 * LTDC_PIXELBYTES, // pitch
|
240 * LTDC_PIXELBYTES, // pitch
|
||||||
LTDC_PIXELFORMAT, // fmt
|
LTDC_PIXELFORMAT, // fmt
|
||||||
0, 0, // x, y
|
0, 0, // x, y
|
||||||
240, 320, // cx, cy
|
240, 320, // cx, cy
|
||||||
0x00000000, // defcolor
|
0x00000000, // defcolor
|
||||||
0x000000, // keycolor
|
0x000000, // keycolor
|
||||||
LTDC_BLEND_FIX1_FIX2, // blending
|
LTDC_BLEND_FIX1_FIX2, // blending
|
||||||
0, // palette
|
0, // palette
|
||||||
0, // palettelen
|
0, // palettelen
|
||||||
0xFF, // alpha
|
0xFF, // alpha
|
||||||
LTDC_LEF_ENABLE // flags
|
LTDC_LEF_ENABLE // flags
|
||||||
},
|
},
|
||||||
#if ALLOW_2ND_LAYER
|
#if ALLOW_2ND_LAYER
|
||||||
{ // Foreground layer config (if turned on)
|
{ // Foreground layer config (if turned on)
|
||||||
(LLDCOLOR_TYPE *)(SDRAM_DEVICE_ADDR+(240 * 320 * LTDC_PIXELBYTES)), // Frame buffer address
|
(LLDCOLOR_TYPE *)(SDRAM_BANK_ADDR+(240 * 320 * LTDC_PIXELBYTES)), // Frame buffer address
|
||||||
240, 320, // width, height
|
240, 320, // width, height
|
||||||
240 * LTDC_PIXELBYTES, // pitch
|
240 * LTDC_PIXELBYTES, // pitch
|
||||||
LTDC_PIXELFORMAT, // fmt
|
LTDC_PIXELFORMAT, // fmt
|
||||||
0, 0, // x, y
|
0, 0, // x, y
|
||||||
240, 320, // cx, cy
|
240, 320, // cx, cy
|
||||||
0x00000000, // Default color (ARGB8888)
|
0x00000000, // Default color (ARGB8888)
|
||||||
0x000000, // Color key (RGB888)
|
0x000000, // Color key (RGB888)
|
||||||
LTDC_BLEND_MOD1_MOD2, // Blending factors
|
LTDC_BLEND_MOD1_MOD2, // Blending factors
|
||||||
0, // Palette (RGB888, can be NULL)
|
0, // Palette (RGB888, can be NULL)
|
||||||
0, // Palette length
|
0, // Palette length
|
||||||
0xFF, // Constant alpha factor
|
0xFF, // Constant alpha factor
|
||||||
LTDC_LEF_ENABLE // Layer configuration flags
|
LTDC_LEF_ENABLE // Layer configuration flags
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
LTDC_UNUSED_LAYER_CONFIG
|
LTDC_UNUSED_LAYER_CONFIG
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
#include "ili9341.h"
|
#include "ili9341.h"
|
||||||
|
|
||||||
static void acquire_bus(GDisplay *g) {
|
static void acquire_bus(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
spiSelect(SPI_PORT);
|
spiSelect(SPI_PORT);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void release_bus(GDisplay *g) {
|
static void release_bus(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
spiUnselect(SPI_PORT);
|
spiUnselect(SPI_PORT);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void write_index(GDisplay *g, uint8_t index) {
|
static void write_index(GDisplay *g, uint8_t index) {
|
||||||
static uint8_t sindex;
|
static uint8_t sindex;
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
palClearPad(DC_PORT, DC_PIN);
|
palClearPad(DC_PORT, DC_PIN);
|
||||||
sindex = index;
|
sindex = index;
|
||||||
spiSend(SPI_PORT, 1, &sindex);
|
spiSend(SPI_PORT, 1, &sindex);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void write_data(GDisplay *g, uint8_t data) {
|
static void write_data(GDisplay *g, uint8_t data) {
|
||||||
static uint8_t sdata;
|
static uint8_t sdata;
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
palSetPad(DC_PORT, DC_PIN);
|
palSetPad(DC_PORT, DC_PIN);
|
||||||
sdata = data;
|
sdata = data;
|
||||||
spiSend(SPI_PORT, 1, &sdata);
|
spiSend(SPI_PORT, 1, &sdata);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void Init9341(GDisplay *g) {
|
static void Init9341(GDisplay *g) {
|
||||||
#define REG_TYPEMASK 0xFF00
|
#define REG_TYPEMASK 0xFF00
|
||||||
#define REG_DATAMASK 0x00FF
|
#define REG_DATAMASK 0x00FF
|
||||||
|
|
||||||
#define REG_DATA 0x0000
|
#define REG_DATA 0x0000
|
||||||
#define REG_COMMAND 0x0100
|
#define REG_COMMAND 0x0100
|
||||||
#define REG_DELAY 0x0200
|
#define REG_DELAY 0x0200
|
||||||
|
|
||||||
static const uint16_t initdata[] = {
|
static const uint16_t initdata[] = {
|
||||||
REG_COMMAND | ILI9341_CMD_RESET,
|
REG_COMMAND | ILI9341_CMD_RESET,
|
||||||
REG_DELAY | 5,
|
REG_DELAY | 5,
|
||||||
REG_COMMAND | ILI9341_CMD_DISPLAY_OFF,
|
REG_COMMAND | ILI9341_CMD_DISPLAY_OFF,
|
||||||
REG_COMMAND | ILI9341_SET_FRAME_CTL_NORMAL, 0x00, 0x1B,
|
REG_COMMAND | ILI9341_SET_FRAME_CTL_NORMAL, 0x00, 0x1B,
|
||||||
REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA2,
|
REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA2,
|
||||||
REG_COMMAND | ILI9341_SET_POWER_CTL_1, 0x10,
|
REG_COMMAND | ILI9341_SET_POWER_CTL_1, 0x10,
|
||||||
REG_COMMAND | ILI9341_SET_POWER_CTL_2, 0x10,
|
REG_COMMAND | ILI9341_SET_POWER_CTL_2, 0x10,
|
||||||
#if 1
|
#if 1
|
||||||
REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x45, 0x15,
|
REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x45, 0x15,
|
||||||
REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0x90,
|
REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0x90,
|
||||||
#else
|
#else
|
||||||
REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x35, 0x3E,
|
REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x35, 0x3E,
|
||||||
REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0xBE,
|
REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0xBE,
|
||||||
#endif
|
#endif
|
||||||
REG_COMMAND | ILI9341_SET_MEM_ACS_CTL, 0xC8,
|
REG_COMMAND | ILI9341_SET_MEM_ACS_CTL, 0xC8,
|
||||||
REG_COMMAND | ILI9341_SET_RGB_IF_SIG_CTL, 0xC2,
|
REG_COMMAND | ILI9341_SET_RGB_IF_SIG_CTL, 0xC2,
|
||||||
REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA7, 0x27, 0x04,
|
REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA7, 0x27, 0x04,
|
||||||
REG_COMMAND | ILI9341_SET_COL_ADDR, 0x00, 0x00, 0x00, 0xEF,
|
REG_COMMAND | ILI9341_SET_COL_ADDR, 0x00, 0x00, 0x00, 0xEF,
|
||||||
REG_COMMAND | ILI9341_SET_PAGE_ADDR, 0x00, 0x00, 0x01, 0x3F,
|
REG_COMMAND | ILI9341_SET_PAGE_ADDR, 0x00, 0x00, 0x01, 0x3F,
|
||||||
REG_COMMAND | ILI9341_SET_IF_CTL, 0x01, 0x00, 0x06,
|
REG_COMMAND | ILI9341_SET_IF_CTL, 0x01, 0x00, 0x06,
|
||||||
REG_COMMAND | ILI9341_SET_GAMMA, 0x01,
|
REG_COMMAND | ILI9341_SET_GAMMA, 0x01,
|
||||||
REG_COMMAND | ILI9341_SET_PGAMMA,
|
REG_COMMAND | ILI9341_SET_PGAMMA,
|
||||||
#if 1
|
#if 1
|
||||||
0x0F, 0x29, 0x24, 0x0C, 0x0E, 0x09, 0x4E, 0x78,
|
0x0F, 0x29, 0x24, 0x0C, 0x0E, 0x09, 0x4E, 0x78,
|
||||||
0x3C, 0x09, 0x13, 0x05, 0x17, 0x11, 0x00,
|
0x3C, 0x09, 0x13, 0x05, 0x17, 0x11, 0x00,
|
||||||
#else
|
#else
|
||||||
0x1F, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
|
0x1F, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
|
||||||
0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00,
|
0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00,
|
||||||
#endif
|
#endif
|
||||||
REG_COMMAND | ILI9341_SET_NGAMMA,
|
REG_COMMAND | ILI9341_SET_NGAMMA,
|
||||||
#if 1
|
#if 1
|
||||||
0x00, 0x16, 0x1B, 0x04, 0x11, 0x07, 0x31, 0x33,
|
0x00, 0x16, 0x1B, 0x04, 0x11, 0x07, 0x31, 0x33,
|
||||||
0x42, 0x05, 0x0C, 0x0A, 0x28, 0x2F, 0x0F,
|
0x42, 0x05, 0x0C, 0x0A, 0x28, 0x2F, 0x0F,
|
||||||
#else
|
#else
|
||||||
0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
|
0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
|
||||||
0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f,
|
0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f,
|
||||||
#endif
|
#endif
|
||||||
REG_COMMAND | ILI9341_CMD_SLEEP_OFF,
|
REG_COMMAND | ILI9341_CMD_SLEEP_OFF,
|
||||||
REG_DELAY | 10,
|
REG_DELAY | 10,
|
||||||
REG_COMMAND | ILI9341_CMD_DISPLAY_ON,
|
REG_COMMAND | ILI9341_CMD_DISPLAY_ON,
|
||||||
REG_COMMAND | ILI9341_SET_MEM
|
REG_COMMAND | ILI9341_SET_MEM
|
||||||
};
|
};
|
||||||
|
|
||||||
const uint16_t *p;
|
const uint16_t *p;
|
||||||
|
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
for(p = initdata; p < &initdata[sizeof(initdata)/sizeof(initdata[0])]; p++) {
|
for(p = initdata; p < &initdata[sizeof(initdata)/sizeof(initdata[0])]; p++) {
|
||||||
switch(*p & REG_TYPEMASK) {
|
switch(*p & REG_TYPEMASK) {
|
||||||
case REG_DATA: write_data(g, *p); break;
|
case REG_DATA: write_data(g, *p); break;
|
||||||
case REG_COMMAND: write_index(g, *p); break;
|
case REG_COMMAND: write_index(g, *p); break;
|
||||||
case REG_DELAY: gfxSleepMilliseconds(*p & 0xFF); break;
|
case REG_DELAY: gfxSleepMilliseconds(*p & 0xFF); break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void init_board(GDisplay *g) {
|
static void init_board(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); // UART_TX
|
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); // UART_TX
|
||||||
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); // UART_RX
|
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); // UART_RX
|
||||||
palSetPadMode(GPIOF, GPIOF_LCD_DCX, PAL_MODE_ALTERNATE(5));
|
palSetPadMode(GPIOF, GPIOF_LCD_DCX, PAL_MODE_ALTERNATE(5));
|
||||||
palSetPadMode(GPIOF, GPIOF_LCD_DE, PAL_MODE_ALTERNATE(14));
|
palSetPadMode(GPIOF, GPIOF_LCD_DE, PAL_MODE_ALTERNATE(14));
|
||||||
|
|
||||||
#define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */
|
#define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */
|
||||||
#define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */
|
#define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */
|
||||||
#define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */
|
#define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */
|
||||||
#define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */
|
#define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */
|
||||||
#define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */
|
#define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */
|
||||||
#define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */
|
#define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */
|
||||||
|
|
||||||
#define STM32_PLLSAIN_VALUE 192
|
#define STM32_PLLSAIN_VALUE 192
|
||||||
#define STM32_PLLSAIQ_VALUE 7
|
#define STM32_PLLSAIQ_VALUE 7
|
||||||
#define STM32_PLLSAIR_VALUE 4
|
#define STM32_PLLSAIR_VALUE 4
|
||||||
#define STM32_PLLSAIR_POST STM32_SAIR_DIV4
|
#define STM32_PLLSAIR_POST STM32_SAIR_DIV4
|
||||||
|
|
||||||
/* PLLSAI activation.*/
|
/* PLLSAI activation.*/
|
||||||
RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24);
|
RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24);
|
||||||
RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST;
|
RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST;
|
||||||
RCC->CR |= RCC_CR_PLLSAION;
|
RCC->CR |= RCC_CR_PLLSAION;
|
||||||
|
|
||||||
// Initialise the SDRAM
|
// Initialise the SDRAM
|
||||||
SDRAM_Init();
|
SDRAM_Init();
|
||||||
|
|
||||||
// Clear the SDRAM
|
// Clear the SDRAM
|
||||||
memset((void *)SDRAM_BANK_ADDR, 0, 0x400000);
|
memset((void *)SDRAM_BANK_ADDR, 0, 0x400000);
|
||||||
|
|
||||||
spiStart(SPI_PORT, &spi_cfg);
|
spiStart(SPI_PORT, &spi_cfg);
|
||||||
|
|
||||||
Init9341(g);
|
Init9341(g);
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void post_init_board(GDisplay *g) {
|
static GFXINLINE void post_init_board(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
|
static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
|
||||||
(void) g;
|
(void) g;
|
||||||
(void) percent;
|
(void) percent;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _GDISP_LLD_BOARD_H */
|
#endif /* _GDISP_LLD_BOARD_H */
|
||||||
|
|
@ -1,120 +1,126 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.org/license.html
|
* http://ugfx.org/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
|
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
|
||||||
#define _GINPUT_LLD_MOUSE_BOARD_H
|
#define _GINPUT_LLD_MOUSE_BOARD_H
|
||||||
|
|
||||||
// Resolution and Accuracy Settings
|
// Resolution and Accuracy Settings
|
||||||
#define GMOUSE_STMPE811_PEN_CALIBRATE_ERROR 8
|
#define GMOUSE_STMPE811_PEN_CALIBRATE_ERROR 8
|
||||||
#define GMOUSE_STMPE811_PEN_CLICK_ERROR 6
|
#define GMOUSE_STMPE811_PEN_CLICK_ERROR 6
|
||||||
#define GMOUSE_STMPE811_PEN_MOVE_ERROR 4
|
#define GMOUSE_STMPE811_PEN_MOVE_ERROR 4
|
||||||
#define GMOUSE_STMPE811_FINGER_CALIBRATE_ERROR 14
|
#define GMOUSE_STMPE811_FINGER_CALIBRATE_ERROR 14
|
||||||
#define GMOUSE_STMPE811_FINGER_CLICK_ERROR 18
|
#define GMOUSE_STMPE811_FINGER_CLICK_ERROR 18
|
||||||
#define GMOUSE_STMPE811_FINGER_MOVE_ERROR 14
|
#define GMOUSE_STMPE811_FINGER_MOVE_ERROR 14
|
||||||
|
|
||||||
// How much extra data to allocate at the end of the GMouse structure for the board's use
|
// How much extra data to allocate at the end of the GMouse structure for the board's use
|
||||||
#define GMOUSE_STMPE811_BOARD_DATA_SIZE 0
|
#define GMOUSE_STMPE811_BOARD_DATA_SIZE 0
|
||||||
|
|
||||||
// Options - Leave these commented to make it user configurable in the gfxconf.h
|
// Options - Leave these commented to make it user configurable in the gfxconf.h
|
||||||
//#define GMOUSE_STMPE811_READ_PRESSURE FALSE
|
//#define GMOUSE_STMPE811_READ_PRESSURE FALSE
|
||||||
//#define GMOUSE_STMPE811_SELF_CALIBRATE FALSE
|
//#define GMOUSE_STMPE811_SELF_CALIBRATE FALSE
|
||||||
//#define GMOUSE_STMPE811_TEST_MODE FALSE
|
//#define GMOUSE_STMPE811_TEST_MODE FALSE
|
||||||
|
|
||||||
// Set to FALSE because it does not work properly on this board even though the pin exists.
|
// Set to FALSE because it does not work properly on this board even though the pin exists.
|
||||||
#define GMOUSE_STMPE811_GPIO_IRQPIN FALSE
|
#define GMOUSE_STMPE811_GPIO_IRQPIN FALSE
|
||||||
|
|
||||||
// If TRUE this is a really slow CPU and we should always clear the FIFO between reads.
|
// If TRUE this is a really slow CPU and we should always clear the FIFO between reads.
|
||||||
#define GMOUSE_STMPE811_SLOW_CPU FALSE
|
#define GMOUSE_STMPE811_SLOW_CPU FALSE
|
||||||
|
|
||||||
// Slave address
|
// Slave address
|
||||||
#define STMPE811_ADDR 0x41
|
#define STMPE811_ADDR 0x41
|
||||||
|
|
||||||
// Maximum timeout
|
// Maximum timeout
|
||||||
#define STMPE811_TIMEOUT 0x3000
|
#define STMPE811_TIMEOUT 0x3000
|
||||||
|
|
||||||
static const I2CConfig i2ccfg = {
|
static const I2CConfig i2ccfg = {
|
||||||
OPMODE_I2C,
|
OPMODE_I2C,
|
||||||
400000,
|
400000,
|
||||||
FAST_DUTY_CYCLE_2,
|
FAST_DUTY_CYCLE_2,
|
||||||
};
|
};
|
||||||
|
|
||||||
static bool_t init_board(GMouse* m, unsigned driverinstance) {
|
static bool_t init_board(GMouse* m, unsigned driverinstance) {
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
// This board only supports one touch panel
|
// This board only supports one touch panel
|
||||||
if (driverinstance)
|
if (driverinstance)
|
||||||
return FALSE;
|
return FALSE;
|
||||||
|
|
||||||
// Set pin modes
|
// Set pin modes
|
||||||
palSetPadMode(GPIOA, 15, PAL_MODE_INPUT | PAL_STM32_PUDR_FLOATING); /* TP IRQ */
|
#if CH_KERNEL_MAJOR == 2
|
||||||
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SCL */
|
palSetPadMode(GPIOA, 15, PAL_MODE_INPUT | PAL_STM32_PUDR_FLOATING); /* TP IRQ */
|
||||||
palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SDA */
|
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SCL */
|
||||||
|
palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SDA */
|
||||||
// Start the I2C
|
#else
|
||||||
i2cStart(&I2CD3, &i2ccfg);
|
palSetPadMode(GPIOA, 15, PAL_MODE_INPUT | PAL_STM32_PUPDR_FLOATING); /* TP IRQ */
|
||||||
|
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_PUPDR_FLOATING); /* SCL */
|
||||||
return TRUE;
|
palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_PUPDR_FLOATING); /* SDA */
|
||||||
}
|
#endif
|
||||||
|
|
||||||
#if GMOUSE_STMPE811_GPIO_IRQPIN
|
// Start the I2C
|
||||||
static bool_t getpin_irq(GMouse* m) {
|
i2cStart(&I2CD3, &i2ccfg);
|
||||||
(void) m;
|
|
||||||
|
return TRUE;
|
||||||
return !palReadPad(GPIOA, 15);
|
}
|
||||||
}
|
|
||||||
#endif
|
#if GMOUSE_STMPE811_GPIO_IRQPIN
|
||||||
|
static bool_t getpin_irq(GMouse* m) {
|
||||||
static GFXINLINE void aquire_bus(GMouse* m) {
|
(void) m;
|
||||||
(void) m;
|
|
||||||
|
return !palReadPad(GPIOA, 15);
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
static GFXINLINE void release_bus(GMouse* m) {
|
|
||||||
(void) m;
|
static GFXINLINE void aquire_bus(GMouse* m) {
|
||||||
|
(void) m;
|
||||||
}
|
|
||||||
|
}
|
||||||
static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
|
|
||||||
uint8_t txbuf[2];
|
static GFXINLINE void release_bus(GMouse* m) {
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
txbuf[0] = reg;
|
}
|
||||||
txbuf[1] = val;
|
|
||||||
|
static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
|
||||||
i2cAcquireBus(&I2CD3);
|
uint8_t txbuf[2];
|
||||||
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, txbuf, 2, 0, 0, MS2ST(STMPE811_TIMEOUT));
|
(void) m;
|
||||||
i2cReleaseBus(&I2CD3);
|
|
||||||
}
|
txbuf[0] = reg;
|
||||||
|
txbuf[1] = val;
|
||||||
static uint8_t read_byte(GMouse* m, uint8_t reg) {
|
|
||||||
uint8_t rxbuf[1];
|
i2cAcquireBus(&I2CD3);
|
||||||
(void) m;
|
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, txbuf, 2, 0, 0, MS2ST(STMPE811_TIMEOUT));
|
||||||
|
i2cReleaseBus(&I2CD3);
|
||||||
rxbuf[0] = 0;
|
}
|
||||||
|
|
||||||
i2cAcquireBus(&I2CD3);
|
static uint8_t read_byte(GMouse* m, uint8_t reg) {
|
||||||
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, ®, 1, rxbuf, 1, MS2ST(STMPE811_TIMEOUT));
|
uint8_t rxbuf[1];
|
||||||
i2cReleaseBus(&I2CD3);
|
(void) m;
|
||||||
|
|
||||||
return rxbuf[0];
|
rxbuf[0] = 0;
|
||||||
}
|
|
||||||
|
i2cAcquireBus(&I2CD3);
|
||||||
static uint16_t read_word(GMouse* m, uint8_t reg) {
|
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, ®, 1, rxbuf, 1, MS2ST(STMPE811_TIMEOUT));
|
||||||
uint8_t rxbuf[2];
|
i2cReleaseBus(&I2CD3);
|
||||||
(void) m;
|
|
||||||
|
return rxbuf[0];
|
||||||
rxbuf[0] = 0;
|
}
|
||||||
rxbuf[1] = 0;
|
|
||||||
|
static uint16_t read_word(GMouse* m, uint8_t reg) {
|
||||||
i2cAcquireBus(&I2CD3);
|
uint8_t rxbuf[2];
|
||||||
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, ®, 1, rxbuf, 2, MS2ST(STMPE811_TIMEOUT));
|
(void) m;
|
||||||
i2cReleaseBus(&I2CD3);
|
|
||||||
|
rxbuf[0] = 0;
|
||||||
return (((uint16_t)rxbuf[0]) << 8) | rxbuf[1];
|
rxbuf[1] = 0;
|
||||||
}
|
|
||||||
|
i2cAcquireBus(&I2CD3);
|
||||||
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
|
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, ®, 1, rxbuf, 2, MS2ST(STMPE811_TIMEOUT));
|
||||||
|
i2cReleaseBus(&I2CD3);
|
||||||
|
|
||||||
|
return (((uint16_t)rxbuf[0]) << 8) | rxbuf[1];
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
|
||||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue