merging GDISPStreaming

ugfx_release_2.6
Joel Bodenmann 2013-11-10 21:07:16 +01:00
commit da2740b706
279 changed files with 26686 additions and 15601 deletions

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# This could be handy for archiving the generated documentation or
# if some version control system is used.
PROJECT_NUMBER = 1.9
PROJECT_NUMBER = 2.0
# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/* Board interface definitions for ED060SC4 PrimeView E-ink panel.
*
* This file corresponds to the connections shown in example_schematics.png,
* and is designed to interface with ChibiOS/RT.
*
* Please note that this file has never been tested in exactly this pin
* configuration, because the actual boards I have are slightly different.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
#include <hal.h>
/*
* IO pins assignments.
*/
#define GPIOB_EINK_VDD 0
#define GPIOB_EINK_GMODE 1
#define GPIOB_EINK_SPV 2
#define GPIOB_EINK_CKV 3
#define GPIOB_EINK_CL 4
#define GPIOB_EINK_LE 5
#define GPIOB_EINK_OE 6
#define GPIOB_EINK_SPH 7
#define GPIOB_EINK_D0 8
#define GPIOB_EINK_D1 9
#define GPIOB_EINK_D2 10
#define GPIOB_EINK_D3 11
#define GPIOB_EINK_D4 12
#define GPIOB_EINK_D5 13
#define GPIOB_EINK_D6 14
#define GPIOB_EINK_D7 15
#define GPIOC_SMPS_CTRL 13
#define GPIOC_VPOS_CTRL 14
#define GPIOC_VNEG_CTRL 15
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
/* Main SMPS power control, active low
* (open collector so that MOSFET gate can be pulled up to Vbat) */
palWritePad(GPIOC, GPIOC_SMPS_CTRL, true);
palSetPadMode(GPIOC, GPIOC_SMPS_CTRL, PAL_MODE_OUTPUT_OPENDRAIN);
/* Power control for the positive & negative side */
palWritePad(GPIOC, GPIOC_VPOS_CTRL, false);
palSetPadMode(GPIOC, GPIOC_VPOS_CTRL, PAL_MODE_OUTPUT_PUSHPULL);
palWritePad(GPIOC, GPIOC_VNEG_CTRL, false);
palSetPadMode(GPIOC, GPIOC_VNEG_CTRL, PAL_MODE_OUTPUT_PUSHPULL);
/* Main data bus */
palWritePort(GPIOB, 0);
palSetGroupMode(GPIOB, 0xFFFF, 0, PAL_MODE_OUTPUT_PUSHPULL);
break;
}
}
/* Delay for display waveforms. Should be an accurate microsecond delay. */
static void eink_delay(int us) {
halPolledDelay(US2RTT(us));
}
/* Turn the E-ink panel Vdd supply (+3.3V) on or off. */
static inline void setpower_vdd(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOB, GPIOB_SMPS_CTRL, !on);
palWritePad(GPIOA, GPIOA_EINK_VDD, on);
}
/* Turn the E-ink panel negative supplies (-15V, -20V) on or off. */
static inline void setpower_vneg(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOA, GPIOA_VNEG_CTRL, on);
}
/* Turn the E-ink panel positive supplies (-15V, -20V) on or off. */
static inline void setpower_vpos(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOA, GPIOA_VPOS_CTRL, on);
}
/* Set the state of the LE (source driver Latch Enable) pin. */
static inline void setpin_le(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOB, GPIOB_EINK_LE, on);
}
/* Set the state of the OE (source driver Output Enable) pin. */
static inline void setpin_oe(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOB, GPIOB_EINK_OE, on);
}
/* Set the state of the CL (source driver Clock) pin. */
static inline void setpin_cl(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOB, GPIOB_EINK_CL, on);
}
/* Set the state of the SPH (source driver Start Pulse Horizontal) pin. */
static inline void setpin_sph(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOB, GPIOB_EINK_SPH, on);
}
/* Set the state of the D0-D7 (source driver Data) pins. */
static inline void setpins_data(GDisplay *g, uint8_t value) {
(void) g;
palWriteGroup(GPIOB, 0xFF, GPIOB_EINK_D0, value);
}
/* Set the state of the CKV (gate driver Clock Vertical) pin. */
static inline void setpin_ckv(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOB, GPIOB_EINK_CKV, on);
}
/* Set the state of the GMODE (gate driver Gate Mode) pin. */
static inline void setpin_gmode(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOC, GPIOC_EINK_GMODE, on);
}
/* Set the state of the SPV (gate driver Start Pulse Vertical) pin. */
static inline void setpin_spv(GDisplay *g, bool_t on) {
(void) g;
palWritePad(GPIOB, GPIOB_EINK_SPV, on);
}
#endif

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/HX8347D/board_HX8347D_stm32f4discovery.h
* @brief GDISP Graphic Driver subsystem board SPI interface for the HX8347D display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
/* Pin assignments */
#define SET_RST palSetPad(GPIOB, 8)
#define CLR_RST palClearPad(GPIOB, 8)
#define SET_DATA palSetPad(GPIOB, 9)
#define CLR_DATA palClearPad(GPIOB, 9)
#define SET_CS palSetPad(GPIOA, 4)
#define CLR_CS palClearPad(GPIOA, 4)
/* PWM configuration structure. We use timer 4 channel 2 (orange LED on board). */
static const PWMConfig pwmcfg = {
1000000, /* 1 MHz PWM clock frequency. */
100, /* PWM period is 100 cycles. */
NULL,
{
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL}
},
0
};
/*
* SPI1 configuration structure.
* Speed 42MHz, CPHA=0, CPOL=0, 8bits frames, MSb transmitted first.
* The slave select line is the pin 4 on the port GPIOA.
*/
static const SPIConfig spi1cfg_8bit = {
NULL,
/* HW dependent part.*/
GPIOA,
4,
0 //SPI_CR1_BR_0
};
/*
* SPI1 configuration structure.
* Speed 42MHz, CPHA=0, CPOL=0, 16bits frames, MSb transmitted first.
* The slave select line is the pin 4 on the port GPIOA.
*/
static const SPIConfig spi1cfg_16bit = {
NULL,
/* HW dependent part.*/
GPIOA,
4,
SPI_CR1_DFF //SPI_CR1_BR_0
};
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
/* Display backlight control */
/* TIM4 is an alternate function 2 (AF2) */
pwmStart(&PWMD4, &pwmcfg);
palSetPadMode(GPIOD, 13, PAL_MODE_ALTERNATE(2));
pwmEnableChannel(&PWMD4, 1, 100);
palSetPadMode(GPIOB, 8, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* RST */
palSetPadMode(GPIOB, 9, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* RS */
/*
* Initializes the SPI driver 1. The SPI1 signals are routed as follow:
* PB12 - NSS.
* PB13 - SCK.
* PB14 - MISO.
* PB15 - MOSI.
*/
SET_CS; SET_DATA;
spiStart(&SPID1, &spi1cfg_8bit);
palSetPadMode(GPIOA, 4, PAL_MODE_OUTPUT_PUSHPULL|PAL_STM32_OSPEED_HIGHEST); /* NSS. */
palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5)|PAL_STM32_OSPEED_HIGHEST); /* SCK. */
palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5)); /* MISO. */
palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(5)|PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if (state) {
CLR_RST;
} else {
SET_RST;
}
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
pwmEnableChannel(&PWMD4, 1, percent);
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
spiAcquireBus(&SPID1);
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0)); // Safety
CLR_CS;
}
static inline void release_bus(GDisplay *g) {
(void) g;
SET_CS;
spiReleaseBus(&SPID1);
}
static inline void busmode16(GDisplay *g) {
(void) g;
spiStart(&SPID1, &spi1cfg_16bit);
}
static inline void busmode8(GDisplay *g) {
(void) g;
spiStart(&SPID1, &spi1cfg_8bit);
}
static inline void write_index(GDisplay *g, uint8_t index) {
(void) g;
CLR_DATA;
SPI1->DR = index;
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0));
SET_DATA;
}
static inline void write_data(GDisplay *g, uint8_t data) {
(void) g;
SPI1->DR = data;
while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0));
}
static inline void write_ram16(GDisplay *g, uint16_t data) {
(void) g;
SPI1->DR = data;
while((SPI1->SR & SPI_SR_TXE) == 0);
}
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/ILI9320/board_ILI9320_olimex_pic32mx_lcd.h
* @brief GDISP Graphic Driver subsystem board interface for the ILI9325 display.
*/
#ifndef GDISP_LLD_BOARD_H
#define GDISP_LLD_BOARD_H
#ifndef noinline
#define noinline __attribute__((noinline))
#endif
static void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
// RST
palSetPadMode(IOPORTA, 7, PAL_MODE_OUTPUT);
palClearPad(IOPORTA, 7);
// RS
palSetPadMode(IOPORTA, 10, PAL_MODE_OUTPUT);
palSetPad(IOPORTA, 10);
// CS
palSetPadMode(IOPORTA, 9, PAL_MODE_OUTPUT);
palClearPad(IOPORTA, 9);
// Backlight
palSetPadMode(IOPORTD, 3, PAL_MODE_OUTPUT);
palSetPad(IOPORTD, 3);
// PMP setup
PMMODE = 0;
PMAEN = 0;
PMCON = 0;
PMMODEbits.MODE = 2;
PMMODEbits.WAITB = 0;
PMMODEbits.WAITM = 1;
PMMODEbits.WAITE = 0;
PMCONbits.CSF = 0;
PMCONbits.PTRDEN = 1;
PMCONbits.PTWREN = 1;
PMMODEbits.MODE16 = 1;
PMCONbits.PMPEN = 1;
palClearPad(IOPORTA, 9);
break;
}
}
#define PmpWaitBusy() do {} while (PMMODEbits.BUSY)
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static noinline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if (state)
palClearPad(IOPORTA, 7);
else
palSetPad(IOPORTA, 7);
}
static void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
if (percentage)
palClearPad(IOPORTD, 3);
else
palSetPad(IOPORTD, 3);
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static noinline void write_index(GDisplay *g, uint16_t index) {
volatile uint16_t dummy;
(void) g;
PmpWaitBusy();
palClearPad(IOPORTA, 10);
PMDIN = index;
PmpWaitBusy();
palSetPad(IOPORTA, 10);
dummy = PMDIN;
(void)dummy;
}
static noinline void write_data(GDisplay *g, uint16_t data) {
(void) g;
PMDIN = data;
PmpWaitBusy();
}
static inline void setreadmode(GDisplay *g) {
(void) g;
}
static inline void setwritemode(GDisplay *g) {
(void) g;
}
static noinline uint16_t read_data(GDisplay *g) {
(void) g;
PmpWaitBusy();
return PMDIN;
}
#endif /* GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/ILI9320/board_ILI9320_olimex_stm32_lcd.h
* @brief GDISP Graphic Driver subsystem board interface for the ILI9320 display.
*/
#ifndef GDISP_LLD_BOARD_H
#define GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* RS = 1 */
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
/* FSMC setup for F1 */
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
/* set pin modes */
IOBus busD = {GPIOD, PAL_WHOLE_PORT, 0};
IOBus busE = {GPIOE, PAL_WHOLE_PORT, 0};
palSetBusMode(&busD, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
palSetBusMode(&busE, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
palSetPadMode(GPIOE, GPIOE_TFT_RST, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, GPIOD_TFT_LIGHT, PAL_MODE_OUTPUT_PUSHPULL);
/* FSMC timing */
FSMC_Bank1->BTCR[0+1] = (6) | (10 << 8) | (10 << 16);
/* Bank1 NOR/SRAM control register configuration
* This is actually not needed as already set by default after reset */
FSMC_Bank1->BTCR[0] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if(state)
palClearPad(GPIOE, GPIOE_TFT_RST);
else
palSetPad(GPIOE, GPIOE_TFT_RST);
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
if(percent)
palClearPad(GPIOD, GPIOD_TFT_LIGHT);
else
palSetPad(GPIOD, GPIOD_TFT_LIGHT);
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
GDISP_REG = index;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
GDISP_RAM = data;
}
static inline void setreadmode(GDisplay *g) {
(void) g;
}
static inline void setwritemode(GDisplay *g) {
(void) g;
}
static inline uint16_t read_data(GDisplay *g) {
(void) g;
return GDISP_RAM;
}
#endif /* GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/*
driver quickly hacked together from a chinese sourcecode that came
with the board and existing ili9320 code by Chris van Dongen (sjaak)
(sjaak2002 at msn.com)
Also added rotation for 180 and 270 degrees and minor tweaks to
setcursor
Added code comes without warranty and free bugs. Feel free to use
or misuse the added code :D
*/
/**
* @file drivers/gdisp/ILI9325/board_ILI9325_hy_stm32_100p.h
* @brief GDISP Graphic Driver subsystem board interface for the ILI9325 display.
*/
#ifndef GDISP_LLD_BOARD_H
#define GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
#define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
/* FSMC setup for F1 */
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
/* set pin modes */
/* IOBus busD = {GPIOD, PAL_WHOLE_PORT, 0};
IOBus busE = {GPIOE, PAL_WHOLE_PORT, 0};
palSetBusMode(&busD, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
palSetBusMode(&busE, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
palSetPadMode(GPIOE, GPIOE_TFT_RST, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, GPIOD_TFT_LIGHT, PAL_MODE_OUTPUT_PUSHPULL); */
const unsigned char FSMC_Bank = 0;
/* FSMC timing */
FSMC_Bank1->BTCR[FSMC_Bank+1] = (6) | (10 << 8) | (10 << 16);
/* Bank1 NOR/SRAM control register configuration
* This is actually not needed as already set by default after reset */
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if(state)
palClearPad(GPIOE, GPIOE_TFT_RST);
else
palSetPad(GPIOE, GPIOE_TFT_RST);
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
(void)percent;
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
GDISP_REG = index;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
GDISP_RAM = data;
}
static inline void setreadmode(GDisplay *g) {
(void) g;
}
static inline void setwritemode(GDisplay *g) {
(void) g;
}
static inline uint16_t read_data(GDisplay *g) {
(void) g;
return GDISP_RAM;
}
#endif /* GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/ILI9481/board_ILI9481_firebullstm32f103.h
* @brief GDISP Graphics Driver subsystem low level driver source for
* the ILI9481 and compatible HVGA display
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define SET_CS palSetPad(GPIOD, 12);
#define CLR_CS palClearPad(GPIOD, 12);
#define SET_RS palSetPad(GPIOD, 13);
#define CLR_RS palClearPad(GPIOD, 13);
#define SET_WR palSetPad(GPIOD, 14);
#define CLR_WR palClearPad(GPIOD, 14);
#define SET_RD palSetPad(GPIOD, 15);
#define CLR_RD palClearPad(GPIOD, 15);
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, 12, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, 15, PAL_MODE_OUTPUT_PUSHPULL);
// Configure the pins to a well know state
SET_RS;
SET_RD;
SET_WR;
CLR_CS;
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
(void) state;
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
(void) percent;
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
palWritePort(GPIOE, index);
CLR_RS; CLR_WR; SET_WR; SET_RS;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
palWritePort(GPIOE, data);
CLR_WR; SET_WR;
}
static inline void setreadmode(GDisplay *g) {
(void) g;
// change pin mode to digital input
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
}
static inline void setwritemode(GDisplay *g) {
(void) g;
// change pin mode back to digital output
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
}
static inline uint16_t read_data(GDisplay *g) {
uint16_t value;
(void) g;
CLR_RD;
value = palReadPort(GPIOE);
SET_RD;
return value;
}
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/RA8875/board_RA8875_marlin.h
* @brief GDISP Graphic Driver subsystem board interface for the RA8875 display.
*/
#ifndef _BOARD_RA8875_H
#define _BOARD_RA8875_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define GDISP_RAM (*((volatile uint16_t *) 0x68000000)) /* RS = 0 */
#define GDISP_REG (*((volatile uint16_t *) 0x68020000)) /* RS = 1 */
#define FSMC_BANK 4
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
// setup for display 0
case 0: {
// enable the FSMC peripheral
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
// setup the pin modes for FSMC
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 8) |
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
(1 << 13) | (1 << 14) | (1 << 15), 0};
IOBus busG = {GPIOG, (1 << 10), 0};
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
palSetBusMode(&busG, PAL_MODE_ALTERNATE(12));
// FSMC timing
FSMC_Bank1->BTCR[FSMC_BANK+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
| (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
| (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
// Bank1 NOR/SRAM control register configuration
// This is actually not needed as already set by default after reset
FSMC_Bank1->BTCR[FSMC_BANK] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
break;
}
// marlin does not have any secondary display so far
default:
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
// FSMC delay reduced as the controller now runs at full speed
FSMC_Bank1->BTCR[2+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
FSMC_Bank1->BTCR[2] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
(void) state;
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
GDISP_REG = index;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
GDISP_RAM = data;
}
static inline void setreadmode(GDisplay *g) {
(void) g;
}
static inline void setwritemode(GDisplay *g) {
(void) g;
}
static inline uint16_t read_data(GDisplay *g) {
(void) g;
return GDISP_RAM;
}
#endif /* _BOARD_RA8875_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/S6D1121/board_S6D1121_olimex_e407.h
* @brief GDISP Graphic Driver subsystem board interface for the S6D1121 display
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
#define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
/* STM32F4 FSMC init */
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
/* set pins to FSMC mode */
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
(1 << 13) | (1 << 14) | (1 << 15), 0};
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
/* FSMC timing */
FSMC_Bank1->BTCR[0+1] = (6) | (10 << 8) | (10 << 16);
/* Bank1 NOR/SRAM control register configuration */
FSMC_Bank1->BTCR[0] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
break;
}
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
(void) state;
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
(void) percent;
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
GDISP_REG = index;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
GDISP_RAM = data;
}
static inline void setreadmode(GDisplay *g) {
(void) g;
}
static inline void setwritemode(GDisplay *g) {
(void) g;
}
static inline uint16_t read_data(GDisplay *g) {
(void) g;
return GDISP_RAM;
}
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/SSD1289/board_SSD1289_firebullstm32f103.h
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define SET_CS palSetPad(GPIOD, 12);
#define CLR_CS palClearPad(GPIOD, 12);
#define SET_RS palSetPad(GPIOD, 13);
#define CLR_RS palClearPad(GPIOD, 13);
#define SET_WR palSetPad(GPIOD, 14);
#define CLR_WR palClearPad(GPIOD, 14);
#define SET_RD palSetPad(GPIOD, 15);
#define CLR_RD palClearPad(GPIOD, 15);
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, 12, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOD, 15, PAL_MODE_OUTPUT_PUSHPULL);
// Configure the pins to a well know state
SET_RS;
SET_RD;
SET_WR;
CLR_CS;
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
(void) state;
/* Nothing to do here - reset pin tied to Vcc */
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
(void) percent;
/* Nothing to do here - Backlight always on */
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
palWritePort(GPIOE, index);
CLR_RS; CLR_WR; SET_WR; SET_RS;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
palWritePort(GPIOE, data);
CLR_WR; SET_WR;
}
static inline void setreadmode(GDisplay *g) {
(void) g;
// change pin mode to digital input
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
CLR_RD;
}
static inline void setwritemode(GDisplay *g) {
(void) g;
// change pin mode back to digital output
SET_RD;
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
}
static inline uint16_t read_data(GDisplay *g) {
return palReadPort(GPIOE);
}
#if defined(GDISP_USE_DMA)
#error "GDISP - SSD1289: The GPIO interface does not support DMA"
#endif
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/SSD1289/board_SSD1289_stm32f4discovery.h
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define GDISP_REG ((volatile uint16_t *) 0x60000000)[0] /* RS = 0 */
#define GDISP_RAM ((volatile uint16_t *) 0x60020000)[0] /* RS = 1 */
#define GDISP_DMA_STREAM STM32_DMA2_STREAM6
#define FSMC_BANK 0
/* PWM configuration structure. We use timer 3 channel 3 */
static const PWMConfig pwmcfg = {
100000, /* 100 kHz PWM clock frequency. */
100, /* PWM period is 100 cycles. */
NULL,
{
{PWM_OUTPUT_DISABLED, NULL},
{PWM_OUTPUT_DISABLED, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_DISABLED, NULL}
},
0
};
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
/**
* Performs the following functions:
* 1. initialise the io port used by the display
* 2. initialise the reset pin (initial state not-in-reset)
* 3. initialise the chip select pin (initial state not-active)
* 4. initialise the backlight pin (initial state back-light off)
*/
#if defined(STM32F1XX) || defined(STM32F3XX)
/* FSMC setup for F1/F3 */
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
#if defined(GDISP_USE_DMA)
#error "GDISP: SSD1289 - DMA not implemented for F1/F3 Devices"
#endif
#elif defined(STM32F4XX) || defined(STM32F2XX)
/* STM32F2-F4 FSMC init */
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
#if defined(GDISP_USE_DMA)
if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) gfxExit();
dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
#else
#warning "GDISP: SSD1289 - DMA is supported for F2/F4 Devices. Define GDISP_USE_DMA in your gfxconf.h to turn this on for better performance."
#endif
#else
#error "GDISP: SSD1289 - FSMC not implemented for this device"
#endif
/* set pins to FSMC mode */
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
(1 << 13) | (1 << 14) | (1 << 15), 0};
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
/* FSMC timing */
FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
/* Bank1 NOR/SRAM control register configuration
* This is actually not needed as already set by default after reset */
FSMC_Bank1->BTCR[FSMC_BANK] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
/* Display backlight control */
/* TIM3 is an alternate function 2 (AF2) */
pwmStart(&PWMD3, &pwmcfg);
palSetPadMode(GPIOB, 0, PAL_MODE_ALTERNATE(2));
pwmEnableChannel(&PWMD3, 2, 100);
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
(void) state;
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
pwmEnableChannel(&PWMD3, 2, percent);
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
GDISP_REG = index;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
GDISP_RAM = data;
}
static inline void setreadmode(GDisplay *g) {
(void) g;
FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_3 | FSMC_BTR1_DATAST_3 | FSMC_BTR1_BUSTURN_0; /* FSMC timing */
}
static inline void setwritemode(GDisplay *g) {
(void) g;
FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0; /* FSMC timing */
}
static inline uint16_t read_data(GDisplay *g) {
(void) g;
return GDISP_RAM;
}
#if defined(GDISP_USE_DMA) || defined(__DOXYGEN__)
static inline void dma_with_noinc(GDisplay *g, color_t *buffer, int area) {
(void) g;
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (; area > 0; area -= 65535) {
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area > 65535 ? 65535 : area);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
}
}
static inline void dma_with_inc(GDisplay *g, color_t *buffer, int area) {
(void) g;
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PINC | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (; area > 0; area -= 65535) {
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area > 65535 ? 65535 : area);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
}
}
#endif
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/SSD1306/board_SSD1306_i2c.h
* @brief GDISP Graphic Driver subsystem board interface for the SSD1306 display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// The command byte to put on the front of each page line
#define SSD1306_PAGE_PREFIX 0x40 // Co = 0, D/C = 1
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define SSD1306_RESET_PORT GPIOB
#define SSD1306_RESET_PIN 5
/**
* The default slave address is 0x3D, (talking about
* only the real address part here) and the slave
* address can be changed to 0x3C by soldering the
* SA0 pads on the bottom side of the module.
*
* b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0
* --------------------------------------
* 0 | 1 | 1 | 1 | 1 | 0 |SA0 | R/W
*/
#define SSD1306_I2C_ADDRESS 0x3D
#define SSD1306_SDA_PORT GPIOB
#define SSD1306_SDA_PIN 7
#define SSD1306_SCL_PORT GPIOB
#define SSD1306_SCL_PIN 6
#define SET_RST palSetPad(SSD1306_RESET_PORT, SSD1306_RESET_PIN);
#define CLR_RST palClearPad(SSD1306_RESET_PORT, SSD1306_RESET_PIN);
// I2C configuration structure.
static I2CConfig i2cconfig;
#if GFX_USE_OS_CHIBIOS
static int32_t thdPriority = 0;
#endif
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
// RESET pin.
palSetPadMode(SSD1306_RESET_PORT, SSD1306_RESET_PIN, PAL_MODE_OUTPUT_PUSHPULL);
/*
* Initializes the I2C driver 1. The I2C1 signals are routed as follows:
* PB6 - SCL.
* PB7 - SDA.
* Timing value comes from ST I2C config tool (xls):
* 0x00901D2B; // 100kHz Standard Mode
* 0x00300444; // 100kHz Fast Mode
* 0x0030020A; // 400kHz Fast Mode
* 0x00100002; // 800kHz Fast Mode +
*/
palSetPadMode(SSD1306_SCL_PORT, SSD1306_SCL_PIN, PAL_MODE_ALTERNATE(1));
palSetPadMode(SSD1306_SDA_PORT, SSD1306_SDA_PIN, PAL_MODE_ALTERNATE(1));
i2cconfig.timingr = 0x00100002; // 800kHz Fast Mode+
i2cInit();
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if(state)
CLR_RST
else
SET_RST
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
#if GFX_USE_OS_CHIBIOS
thdPriority = (int32_t)chThdGetPriority();
chThdSetPriority(HIGHPRIO);
#endif
i2cAcquireBus(&I2CD1);
}
static inline void release_bus(GDisplay *g) {
(void) g;
#if GFX_USE_OS_CHIBIOS
chThdSetPriority(thdPriority);
#endif
i2cReleaseBus(&I2CD1);
}
static inline void write_cmd(GDisplay *g, uint8_t cmd) {
uint8_t command[2];
(void) g;
command[0] = 0x00; // Co = 0, D/C = 0
command[1] = cmd;
i2cStart(&I2CD1, &i2cconfig);
i2cMasterTransmitTimeout(&I2CD1, SSD1306_I2C_ADDRESS, command, 2, NULL, 0, MS2ST(10));
i2cStop(&I2CD1);
}
static inline void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
(void) g;
i2cStart(&I2CD1, &i2cconfig);
i2cMasterTransmitTimeout(&I2CD1, SSD1306_I2C_ADDRESS, data, length, NULL, 0, MS2ST(10));
i2cStop(&I2CD1);
}
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/SSD1306/board_SSD1306_spi.h
* @brief GDISP Graphic Driver subsystem board interface for the SSD1306 display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// The command byte to put on the front of each page line
#define SSD1306_PAGE_PREFIX 0x40 // Co = 0, D/C = 1
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define SSD1306_RESET_PORT GPIOB
#define SSD1306_RESET_PIN 5
#define SSD1306_MISO_PORT GPIOB
#define SSD1306_MISO_PIN 8
#define SSD1306_MOSI_PORT GPIOB
#define SSD1306_MOSI_PIN 7
#define SSD1306_SCK_PORT GPIOB
#define SSD1306_SCK_PIN 6
#define SSD1306_CS_PORT GPIOB
#define SSD1306_CS_PIN 5
#define SET_RST palSetPad(SSD1306_RESET_PORT, SSD1306_RESET_PIN);
#define CLR_RST palClearPad(SSD1306_RESET_PORT, SSD1306_RESET_PIN);
/*
* SPI1 configuration structure.
* Speed 42MHz, CPHA=0, CPOL=0, 8bits frames, MSb transmitted first.
* The slave select line is the pin 4 on the port GPIOA.
*/
static const SPIConfig spi1config = {
NULL,
/* HW dependent part.*/
SSD1306_MISO_PORT,
SSD1306_MISO_PIN,
0
//SPI_CR1_BR_0
};
#if GFX_USE_OS_CHIBIOS
static int32_t thdPriority = 0;
#endif
static inline void init_board(GDisplay *g) {
unsigned i;
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
// RESET pin.
palSetPadMode(SSD1306_RESET_PORT, SSD1306_RESET_PIN, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(SSD1306_MISO_PORT, SSD1306_MISO_PIN, PAL_MODE_ALTERNATE(1)|
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(SSD1306_MOSI_PORT, SSD1306_MOSI_PIN, PAL_MODE_ALTERNATE(1)|
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(SSD1306_SCK_PORT, SSD1306_SCK_PIN, PAL_MODE_ALTERNATE(1)|
PAL_STM32_OSPEED_HIGHEST);
palSetPad(SSD1306_CS_PORT, SSD1306_CS_PIN);
palSetPadMode(SSD1306_CS_PORT, SSD1306_CS_PIN, PAL_MODE_ALTERNATE(1)|
PAL_STM32_OSPEED_HIGHEST);
spiInit();
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if(state)
CLR_RST
else
SET_RST
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
#if GFX_USE_OS_CHIBIOS
thdPriority = (int32_t)chThdGetPriority();
chThdSetPriority(HIGHPRIO);
#endif
spiAcquireBus(&SPID1);
}
static inline void release_bus(GDisplay *g) {
(void) g;
#if GFX_USE_OS_CHIBIOS
chThdSetPriority(thdPriority);
#endif
spiReleaseBus(&SPID1);
}
static inline void write_cmd(GDisplay *g, uint8_t cmd) {
uint8_t command[2];
(void) g;
command[0] = 0x00; // Co = 0, D/C = 0
command[1] = cmd;
spiStart(&SPID1, &spi1config);
spiSelect(&SPID1);
spiStartSend(&SPID1, 2, command);
spiUnselect(&SPID1);
spiStop(&SPID1);
}
static inline void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
(void) g;
spiStart(&SPID1, &spi1config);
spiSelect(&SPID1);
spiStartSend(&SPID1, length, data);
spiUnselect(&SPID1);
spiStop(&SPID1);
}
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://chibios-gfx.com/license.html
*/
/**
* @file drivers/gdisp/SSD1963/board_SSD1963_fsmc.h
* @brief GDISP Graphic Driver subsystem board interface for the SSD1963 display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
static const LCD_Parameters DisplayTimings[] = {
// You need one of these array elements per display
{
480, 272, // Panel width and height
2, 2, 41, // Horizontal Timings (back porch, front porch, pulse)
CALC_PERIOD(480,2,2,41), // Total Horizontal Period (calculated from above line)
2, 2, 10, // Vertical Timings (back porch, front porch, pulse)
CALC_PERIOD(272,2,2,10), // Total Vertical Period (calculated from above line)
CALC_FPR(480,272,2,2,41,2,2,10,60ULL) // FPR - the 60ULL is the frames per second. Note the ULL!
},
};
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
/* Using FSMC A16 as RS */
#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
#define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
#if defined(STM32F1XX) || defined(STM32F3XX)
/* FSMC setup for F1/F3 */
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
#elif defined(STM32F4XX) || defined(STM32F2XX)
/* STM32F2-F4 FSMC init */
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
#else
#error "FSMC not implemented for this device"
#endif
/* set pins to FSMC mode */
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
(1 << 13) | (1 << 14) | (1 << 15), 0};
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
/* FSMC timing */
FSMC_Bank1->BTCR[0+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
| (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
| (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
/* Bank1 NOR/SRAM control register configuration
* This is actually not needed as already set by default after reset */
FSMC_Bank1->BTCR[0] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
/* FSMC delay reduced as the controller now runs at full speed */
FSMC_Bank1->BTCR[0+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
FSMC_Bank1->BTCR[0] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
(void) state;
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
GDISP_REG = index;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
GDISP_RAM = data;
}
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://chibios-gfx.com/license.html
*/
/**
* @file drivers/gdisp/SSD1963/board_SSD1963_gpio.h
* @brief GDISP Graphic Driver subsystem board interface for the SSD1963 display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
static const LCD_Parameters DisplayTimings[] = {
// You need one of these array elements per display
{
480, 272, // Panel width and height
2, 2, 41, // Horizontal Timings (back porch, front porch, pulse)
CALC_PERIOD(480,2,2,41), // Total Horizontal Period (calculated from above line)
2, 2, 10, // Vertical Timings (back porch, front porch, pulse)
CALC_PERIOD(272,2,2,10), // Total Vertical Period (calculated from above line)
CALC_FPR(480,272,2,2,41,2,2,10,60ULL) // FPR - the 60ULL is the frames per second. Note the ULL!
},
};
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
/**
* @brief The GPIO pin config
*
* @details This block of defines tell your driver how you wired your display
* controller to your MCU. Please change them accordingly.
*/
#define GDISP_CMD_PORT GPIOC
#define GDISP_DATA_PORT GPIOD
#define GDISP_CS 0
#define GDISP_RS 1
#define GDISP_WR 2
#define GDISP_RD 3
#define Set_CS palSetPad(GDISP_CMD_PORT, GDISP_CS);
#define Clr_CS palClearPad(GDISP_CMD_PORT, GDISP_CS);
#define Set_RS palSetPad(GDISP_CMD_PORT, GDISP_RS);
#define Clr_RS palClearPad(GDISP_CMD_PORT, GDISP_RS);
#define Set_WR palSetPad(GDISP_CMD_PORT, GDISP_WR);
#define Clr_WR palClearPad(GDISP_CMD_PORT, GDISP_WR);
#define Set_RD palSetPad(GDISP_CMD_PORT, GDISP_RD);
#define Clr_RD palClearPad(GDISP_CMD_PORT, GDISP_RD);
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
IOBus busCMD = {GDISP_CMD_PORT, (1 << GDISP_CS) | (1 << GDISP_RS) | (1 << GDISP_WR) | (1 << GDISP_RD), 0};
IOBus busDATA = {GDISP_CMD_PORT, 0xFFFFF, 0};
palSetBusMode(&busCMD, PAL_MODE_OUTPUT_PUSHPULL);
palSetBusMode(&busDATA, PAL_MODE_OUTPUT_PUSHPULL);
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
(void) state;
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
Set_CS;
}
static inline void release_bus(GDisplay *g) {
(void) g;
Clr_CS;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
Set_RS; Clr_RD; Set_WR;
palWritePort(GDISP_DATA_PORT, index);
Clr_WR;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
Clr_RS; Clr_RD; Set_WR;
palWritePort(GDISP_DATA_PORT, data);
Clr_WR;
}
#endif /* _GDISP_LLD_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/gdisp/SSD2119/board_SSD2119_embest_dmstf4bb.h
* @brief GDISP Graphic Driver subsystem board FSMC interface for the SSD2119 display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
/* Using FSMC A19 (PE3) as DC */
#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* DC = 0 */
#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* DC = 1 */
#define GDISP_DMA_STREAM STM32_DMA2_STREAM6
#define SET_RST palSetPad(GPIOD, 3);
#define CLR_RST palClearPad(GPIOD, 3);
/*
* PWM configuration structure. We use timer 4 channel 2 (orange LED on board).
* The reason for so high clock is that with any lower, onboard coil is squeaking.
* The major disadvantage of this clock is a lack of linearity between PWM duty
* cycle width and brightness. In fact only with low preset one sees any change
* (eg. duty cycle between 1-20). Feel free to adjust this, maybe only my board
* behaves like this. According to the G5126 datesheet (backlight LED driver)
* the PWM frequency should be somewhere between 200 Hz to 200 kHz.
*/
static const PWMConfig pwmcfg = {
1000000, /* 1 MHz PWM clock frequency. */
100, /* PWM period is 100 cycles. */
NULL,
{
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL}
},
0
};
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
#if defined(STM32F4XX) || defined(STM32F2XX)
/* STM32F4 FSMC init */
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
#if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL))
gfxExit();
dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
#endif
#else
#error "FSMC not implemented for this device"
#endif
/* Group pins */
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
(1 << 9) | (1 << 10) | (1 << 14) | (1 << 15), 0};
IOBus busE = {GPIOE, (1 << 3) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
(1 << 13) | (1 << 14) | (1 << 15), 0};
/* FSMC is an alternate function 12 (AF12) */
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
/* FSMC timing register configuration */
FSMC_Bank1->BTCR[0 + 1] = (FSMC_BTR1_ADDSET_2 | FSMC_BTR1_ADDSET_1) \
| (FSMC_BTR1_DATAST_2 | FSMC_BTR1_DATAST_1) \
| FSMC_BTR1_BUSTURN_0;
/* Bank1 NOR/PSRAM control register configuration
* Write enable, memory databus width set to 16 bit, memory bank enable */
FSMC_Bank1->BTCR[0] = FSMC_BCR1_WREN | FSMC_BCR1_MWID_0 | FSMC_BCR1_MBKEN;
/* Display backlight control */
/* TIM4 is an alternate function 2 (AF2) */
pwmStart(&PWMD4, &pwmcfg);
palSetPadMode(GPIOD, 13, PAL_MODE_ALTERNATE(2));
pwmEnableChannel(&PWMD4, 1, 100);
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if (state) {
CLR_RST;
} else {
SET_RST;
}
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
pwmEnableChannel(&PWMD4, 1, percent);
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
GDISP_REG = index;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
GDISP_RAM = data;
}
static inline void setreadmode(GDisplay *g) {
(void) g;
}
static inline void setwritemode(GDisplay *g) {
(void) g;
}
static inline uint16_t read_data(GDisplay *g) {
(void) g;
return GDISP_RAM;
}
#if defined(GDISP_USE_DMA)
static inline void dma_with_noinc(GDisplay *g, color_t *buffer, int area) {
(void) g;
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (; area > 0; area -= 65535) {
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area > 65535 ? 65535 : area);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
}
}
static inline void dma_with_inc(GDisplay *g, color_t *buffer, int area) {
(void) g;
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PINC | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (; area > 0; area -= 65535) {
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area > 65535 ? 65535 : area);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
}
}
#endif
#endif /* _GDISP_LLD_BOARD_H */

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@ -4,87 +4,87 @@
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/ginput/touch/ADS7843/ginput_lld_mouse_board_firebull_stm32f103.h
* @brief GINPUT ouch low level driver source for the ADS7843 on the FireBull STM32F103-FB board.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
static const SPIConfig spicfg = {
NULL,
GPIOC,
6,
/* SPI_CR1_BR_2 |*/ SPI_CR1_BR_1 | SPI_CR1_BR_0,
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
spiStart(&SPID1, &spicfg);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
return (!palReadPad(GPIOC, 4));
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
spiAcquireBus(&SPID1);
//TOUCHSCREEN_SPI_PROLOGUE();
palClearPad(GPIOC, 6);
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
palSetPad(GPIOC, 6);
spiReleaseBus(&SPID1);
//TOUCHSCREEN_SPI_EPILOGUE();
}
/**
* @brief Read a value from touch controller
* @return The value read from the controller
*
* params[in] port The controller port to read.
*
* @notapi
*/
static inline uint16_t read_value(uint16_t port) {
static uint8_t txbuf[3] = {0};
static uint8_t rxbuf[3] = {0};
uint16_t ret;
txbuf[0] = port;
spiExchange(&SPID1, 3, txbuf, rxbuf);
ret = (rxbuf[1] << 5) | (rxbuf[2] >> 3);
return ret;
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */
/**
* @file drivers/ginput/touch/ADS7843/ginput_lld_mouse_board_firebull_stm32f103.h
* @brief GINPUT ouch low level driver source for the ADS7843 on the FireBull STM32F103-FB board.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
static const SPIConfig spicfg = {
NULL,
GPIOC,
6,
/* SPI_CR1_BR_2 |*/ SPI_CR1_BR_1 | SPI_CR1_BR_0,
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
spiStart(&SPID1, &spicfg);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
return (!palReadPad(GPIOC, 4));
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
spiAcquireBus(&SPID1);
//TOUCHSCREEN_SPI_PROLOGUE();
palClearPad(GPIOC, 6);
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
palSetPad(GPIOC, 6);
spiReleaseBus(&SPID1);
//TOUCHSCREEN_SPI_EPILOGUE();
}
/**
* @brief Read a value from touch controller
* @return The value read from the controller
*
* params[in] port The controller port to read.
*
* @notapi
*/
static inline uint16_t read_value(uint16_t port) {
static uint8_t txbuf[3] = {0};
static uint8_t rxbuf[3] = {0};
uint16_t ret;
txbuf[0] = port;
spiExchange(&SPID1, 3, txbuf, rxbuf);
ret = (rxbuf[1] << 5) | (rxbuf[2] >> 3);
return ret;
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */

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@ -4,87 +4,87 @@
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/ginput/touch/ADS7843/ginput_lld_mouse_board_olimex_stm32_e407.h
* @brief GINPUT Touch low level driver source for the ADS7843 on an Olimex STM32E407.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
static const SPIConfig spicfg = {
NULL,
GPIOG,
10,
/* SPI_CR1_BR_2 |*/ SPI_CR1_BR_1 | SPI_CR1_BR_0,
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
spiStart(&SPID2, &spicfg);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
return (!palReadPad(GPIOG, 0));
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
spiAcquireBus(&SPID2);
//TOUCHSCREEN_SPI_PROLOGUE();
palClearPad(GPIOG, 10);
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
palSetPad(GPIOG, 10);
spiReleaseBus(&SPID2);
//TOUCHSCREEN_SPI_EPILOGUE();
}
/**
* @brief Read a value from touch controller
* @return The value read from the controller
*
* params[in] port The controller port to read.
*
* @notapi
*/
static inline uint16_t read_value(uint16_t port) {
static uint8_t txbuf[3] = {0};
static uint8_t rxbuf[3] = {0};
uint16_t ret;
txbuf[0] = port;
spiExchange(&SPID2, 3, txbuf, rxbuf);
ret = (rxbuf[1] << 5) | (rxbuf[2] >> 3);
return ret;
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */
/**
* @file drivers/ginput/touch/ADS7843/ginput_lld_mouse_board_olimex_stm32_e407.h
* @brief GINPUT Touch low level driver source for the ADS7843 on an Olimex STM32E407.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
static const SPIConfig spicfg = {
NULL,
GPIOG,
10,
/* SPI_CR1_BR_2 |*/ SPI_CR1_BR_1 | SPI_CR1_BR_0,
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
spiStart(&SPID2, &spicfg);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
return (!palReadPad(GPIOG, 0));
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
spiAcquireBus(&SPID2);
//TOUCHSCREEN_SPI_PROLOGUE();
palClearPad(GPIOG, 10);
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
palSetPad(GPIOG, 10);
spiReleaseBus(&SPID2);
//TOUCHSCREEN_SPI_EPILOGUE();
}
/**
* @brief Read a value from touch controller
* @return The value read from the controller
*
* params[in] port The controller port to read.
*
* @notapi
*/
static inline uint16_t read_value(uint16_t port) {
static uint8_t txbuf[3] = {0};
static uint8_t rxbuf[3] = {0};
uint16_t ret;
txbuf[0] = port;
spiExchange(&SPID2, 3, txbuf, rxbuf);
ret = (rxbuf[1] << 5) | (rxbuf[2] >> 3);
return ret;
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */

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@ -4,148 +4,148 @@
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/ginput/touch/MCU/ginput_lld_mouse_board_olimex_stm32_lcd.h
* @brief GINPUT Touch low level driver source for the MCU on the example board.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
*
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
static const ADCConfig ADCC = {
.vref = ADC_VREF_CFG_AVDD_AVSS,
.stime = 15,
.irq = EIC_IRQ_ADC,
.base = _ADC10_BASE_ADDRESS,
};
static struct ADCDriver ADCD;
#define YNEG 13 // U
#define XNEG 15 // R
#define XPOS 12 // L
#define YPOS 11 // D
#define ADC_MAX 1023
#define TOUCH_THRESHOULD 50
static const ADCConversionGroup ADC_X_CG = {
.circular = FALSE,
.num_channels = 1,
.channels = 1 << XNEG,
};
static const ADCConversionGroup ADC_Y_CG = {
.circular = FALSE,
.num_channels = 1,
.channels = 1 << YPOS,
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
adcObjectInit(&ADCD);
adcStart(&ADCD, &ADCC);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
adcsample_t samples[2] = {0, };
// Set X+ to ground
palSetPadMode(IOPORTB, XPOS, PAL_MODE_OUTPUT);
palClearPad(IOPORTB, XPOS);
// Set Y- to VCC
palSetPadMode(IOPORTB, YNEG, PAL_MODE_OUTPUT);
palSetPad(IOPORTB, YNEG);
palSetPadMode(IOPORTB, XNEG, PAL_MODE_INPUT_ANALOG);
palSetPadMode(IOPORTB, YPOS, PAL_MODE_INPUT_ANALOG);
adcConvert(&ADCD, &ADC_X_CG, &samples[0], 1);
adcConvert(&ADCD, &ADC_Y_CG, &samples[1], 1);
return (ADC_MAX - (samples[1] - samples[0])) > TOUCH_THRESHOULD;
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
}
/**
* @brief Read an x value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_x_value(void) {
adcsample_t sample;
palSetPadMode(IOPORTB, XPOS, PAL_MODE_OUTPUT);
palSetPad(IOPORTB, XPOS);
palSetPadMode(IOPORTB, XNEG, PAL_MODE_OUTPUT);
palClearPad(IOPORTB, XNEG);
palSetPadMode(IOPORTB, YNEG, PAL_MODE_INPUT);
palSetPadMode(IOPORTB, YPOS, PAL_MODE_INPUT_ANALOG);
adcConvert(&ADCD, &ADC_Y_CG, &sample, 1);
return ADC_MAX - sample;
}
/**
* @brief Read an y value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_y_value(void) {
adcsample_t sample;
palSetPadMode(IOPORTB, YNEG, PAL_MODE_OUTPUT);
palClearPad(IOPORTB, YNEG);
palSetPadMode(IOPORTB, YPOS, PAL_MODE_OUTPUT);
palSetPad(IOPORTB, YPOS);
palSetPadMode(IOPORTB, XPOS, PAL_MODE_INPUT);
palSetPadMode(IOPORTB, XNEG, PAL_MODE_INPUT_ANALOG);
adcConvert(&ADCD, &ADC_X_CG, &sample, 1);
return ADC_MAX - sample;
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */
/**
* @file drivers/ginput/touch/MCU/ginput_lld_mouse_board_olimex_stm32_lcd.h
* @brief GINPUT Touch low level driver source for the MCU on the example board.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
*
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
static const ADCConfig ADCC = {
.vref = ADC_VREF_CFG_AVDD_AVSS,
.stime = 15,
.irq = EIC_IRQ_ADC,
.base = _ADC10_BASE_ADDRESS,
};
static struct ADCDriver ADCD;
#define YNEG 13 // U
#define XNEG 15 // R
#define XPOS 12 // L
#define YPOS 11 // D
#define ADC_MAX 1023
#define TOUCH_THRESHOULD 50
static const ADCConversionGroup ADC_X_CG = {
.circular = FALSE,
.num_channels = 1,
.channels = 1 << XNEG,
};
static const ADCConversionGroup ADC_Y_CG = {
.circular = FALSE,
.num_channels = 1,
.channels = 1 << YPOS,
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
adcObjectInit(&ADCD);
adcStart(&ADCD, &ADCC);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
adcsample_t samples[2] = {0, };
// Set X+ to ground
palSetPadMode(IOPORTB, XPOS, PAL_MODE_OUTPUT);
palClearPad(IOPORTB, XPOS);
// Set Y- to VCC
palSetPadMode(IOPORTB, YNEG, PAL_MODE_OUTPUT);
palSetPad(IOPORTB, YNEG);
palSetPadMode(IOPORTB, XNEG, PAL_MODE_INPUT_ANALOG);
palSetPadMode(IOPORTB, YPOS, PAL_MODE_INPUT_ANALOG);
adcConvert(&ADCD, &ADC_X_CG, &samples[0], 1);
adcConvert(&ADCD, &ADC_Y_CG, &samples[1], 1);
return (ADC_MAX - (samples[1] - samples[0])) > TOUCH_THRESHOULD;
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
}
/**
* @brief Read an x value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_x_value(void) {
adcsample_t sample;
palSetPadMode(IOPORTB, XPOS, PAL_MODE_OUTPUT);
palSetPad(IOPORTB, XPOS);
palSetPadMode(IOPORTB, XNEG, PAL_MODE_OUTPUT);
palClearPad(IOPORTB, XNEG);
palSetPadMode(IOPORTB, YNEG, PAL_MODE_INPUT);
palSetPadMode(IOPORTB, YPOS, PAL_MODE_INPUT_ANALOG);
adcConvert(&ADCD, &ADC_Y_CG, &sample, 1);
return ADC_MAX - sample;
}
/**
* @brief Read an y value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_y_value(void) {
adcsample_t sample;
palSetPadMode(IOPORTB, YNEG, PAL_MODE_OUTPUT);
palClearPad(IOPORTB, YNEG);
palSetPadMode(IOPORTB, YPOS, PAL_MODE_OUTPUT);
palSetPad(IOPORTB, YPOS);
palSetPadMode(IOPORTB, XPOS, PAL_MODE_INPUT);
palSetPadMode(IOPORTB, XNEG, PAL_MODE_INPUT_ANALOG);
adcConvert(&ADCD, &ADC_X_CG, &sample, 1);
return ADC_MAX - sample;
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */

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@ -1,152 +1,152 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/ginput/touch/MCU/ginput_lld_mouse_board_olimex_stm32_lcd.h
* @brief GINPUT Touch low level driver source for the MCU on the example board.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
*
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
#define ADC_NUM_CHANNELS 2
#define ADC_BUF_DEPTH 1
static const ADCConversionGroup adc_y_config = {
FALSE,
ADC_NUM_CHANNELS,
NULL,
NULL,
0, 0,
0, 0,
ADC_SQR1_NUM_CH(ADC_NUM_CHANNELS),
0,
ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN13)
};
static const ADCConversionGroup adc_x_config = {
FALSE,
ADC_NUM_CHANNELS,
NULL,
NULL,
0, 0,
0, 0,
ADC_SQR1_NUM_CH(ADC_NUM_CHANNELS),
0,
ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11)
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
adcStart(&ADCD1, NULL);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_PULLDOWN);
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT);
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT);
palSetPadMode(GPIOC, 3, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(GPIOC, 3);
return palReadPad(GPIOC, 0);
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
}
/**
* @brief Read an x value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_x_value(void) {
uint16_t val1, val2;
adcsample_t samples[ADC_NUM_CHANNELS * ADC_BUF_DEPTH];
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 2, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOC, 3, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(GPIOC, 2);
palClearPad(GPIOC, 3);
gfxSleepMilliseconds(1);
adcConvert(&ADCD1, &adc_x_config, samples, ADC_BUF_DEPTH);
val1 = ((samples[0] + samples[1])/2);
palClearPad(GPIOC, 2);
palSetPad(GPIOC, 3);
gfxSleepMilliseconds(1);
adcConvert(&ADCD1, &adc_x_config, samples, ADC_BUF_DEPTH);
val2 = ((samples[0] + samples[1])/2);
return ((val1+((1<<12)-val2))/4);
}
/**
* @brief Read an y value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_y_value(void) {
uint16_t val1, val2;
adcsample_t samples[ADC_NUM_CHANNELS * ADC_BUF_DEPTH];
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 0, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOC, 1, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(GPIOC, 1);
palClearPad(GPIOC, 0);
gfxSleepMilliseconds(1);
adcConvert(&ADCD1, &adc_y_config, samples, ADC_BUF_DEPTH);
val1 = ((samples[0] + samples[1])/2);
palClearPad(GPIOC, 1);
palSetPad(GPIOC, 0);
gfxSleepMilliseconds(1);
adcConvert(&ADCD1, &adc_y_config, samples, ADC_BUF_DEPTH);
val2 = ((samples[0] + samples[1])/2);
return ((val1+((1<<12)-val2))/4);
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/ginput/touch/MCU/ginput_lld_mouse_board_olimex_stm32_lcd.h
* @brief GINPUT Touch low level driver source for the MCU on the example board.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
*
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
#define ADC_NUM_CHANNELS 2
#define ADC_BUF_DEPTH 1
static const ADCConversionGroup adc_y_config = {
FALSE,
ADC_NUM_CHANNELS,
NULL,
NULL,
0, 0,
0, 0,
ADC_SQR1_NUM_CH(ADC_NUM_CHANNELS),
0,
ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN13)
};
static const ADCConversionGroup adc_x_config = {
FALSE,
ADC_NUM_CHANNELS,
NULL,
NULL,
0, 0,
0, 0,
ADC_SQR1_NUM_CH(ADC_NUM_CHANNELS),
0,
ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11)
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
adcStart(&ADCD1, NULL);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_PULLDOWN);
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT);
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT);
palSetPadMode(GPIOC, 3, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(GPIOC, 3);
return palReadPad(GPIOC, 0);
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
}
/**
* @brief Read an x value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_x_value(void) {
uint16_t val1, val2;
adcsample_t samples[ADC_NUM_CHANNELS * ADC_BUF_DEPTH];
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 2, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOC, 3, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(GPIOC, 2);
palClearPad(GPIOC, 3);
gfxSleepMilliseconds(1);
adcConvert(&ADCD1, &adc_x_config, samples, ADC_BUF_DEPTH);
val1 = ((samples[0] + samples[1])/2);
palClearPad(GPIOC, 2);
palSetPad(GPIOC, 3);
gfxSleepMilliseconds(1);
adcConvert(&ADCD1, &adc_x_config, samples, ADC_BUF_DEPTH);
val2 = ((samples[0] + samples[1])/2);
return ((val1+((1<<12)-val2))/4);
}
/**
* @brief Read an y value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_y_value(void) {
uint16_t val1, val2;
adcsample_t samples[ADC_NUM_CHANNELS * ADC_BUF_DEPTH];
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 0, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOC, 1, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(GPIOC, 1);
palClearPad(GPIOC, 0);
gfxSleepMilliseconds(1);
adcConvert(&ADCD1, &adc_y_config, samples, ADC_BUF_DEPTH);
val1 = ((samples[0] + samples[1])/2);
palClearPad(GPIOC, 1);
palSetPad(GPIOC, 0);
gfxSleepMilliseconds(1);
adcConvert(&ADCD1, &adc_y_config, samples, ADC_BUF_DEPTH);
val2 = ((samples[0] + samples[1])/2);
return ((val1+((1<<12)-val2))/4);
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */

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@ -4,123 +4,123 @@
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/ginput/touch/STMPE811/ginput_lld_mouse_board_embest_dmstf4bb.h
* @brief GINPUT Touch low level driver source for the STMPE811 on the Embest DM-STF4BB board.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
static const I2CConfig i2ccfg = {
OPMODE_I2C,
400000,
FAST_DUTY_CYCLE_2,
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static void init_board(void)
{
palSetPadMode(GPIOC, 13, PAL_MODE_INPUT | PAL_STM32_PUDR_FLOATING); /* TP IRQ */
palSetPadMode(GPIOB, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SCL */
palSetPadMode(GPIOB, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SDA */
i2cStart(&I2CD1, &i2ccfg);
}
/**
* @brief Check whether an interrupt is raised
* @return TRUE if there is an interrupt signal present
*
* @notapi
*/
static inline bool_t getpin_irq(void) {
return (!(palReadPad(GPIOC, 13)));
}
/**
* @brief Write a value into a certain register
*
* @param[in] reg The register address
* @param[in] n The amount of bytes (one or two)
* @param[in] val The value
*
* @notapi
*/
static void write_reg(uint8_t reg, uint8_t n, uint16_t val)
{
uint8_t txbuf[3];
i2cAcquireBus(&I2CD1);
txbuf[0] = reg;
if (n == 1) {
txbuf[1] = val;
i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, txbuf, 2, NULL, 0, MS2ST(STMPE811_TIMEOUT));
} else if (n == 2) {
txbuf[1] = ((val & 0xFF00) >> 8);
txbuf[2] = (val & 0x00FF);
i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, txbuf, 3, NULL, 0, MS2ST(STMPE811_TIMEOUT));
}
i2cReleaseBus(&I2CD1);
}
/**
* @brief Read the value of a certain register
*
* @param[in] reg The register address
* @param[in] n The amount of bytes (one or two)
*
* @return Data read from device (one byte or two depending on n param)
*
* @notapi
*/
static uint16_t read_reg(uint8_t reg, uint8_t n)
{
uint8_t txbuf[1], rxbuf[2];
uint16_t ret;
rxbuf[0] = 0;
rxbuf[1] = 0;
i2cAcquireBus(&I2CD1);
txbuf[0] = reg;
i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, txbuf, 1, rxbuf, n, MS2ST(STMPE811_TIMEOUT));
if (n == 1) {
ret = rxbuf[0];
} else if (n == 2) {
ret = ((rxbuf[0] << 8) | (rxbuf[1] & 0xFF));
}
i2cReleaseBus(&I2CD1);
return ret;
}
static void read_reg_n(uint8_t reg, uint8_t n, uint8_t *rxbuf)
{
uint8_t txbuf[1];
i2cAcquireBus(&I2CD1);
txbuf[0] = reg;
i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, txbuf, 1, rxbuf, n, MS2ST(STMPE811_TIMEOUT));
i2cReleaseBus(&I2CD1);
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */
/**
* @file drivers/ginput/touch/STMPE811/ginput_lld_mouse_board_embest_dmstf4bb.h
* @brief GINPUT Touch low level driver source for the STMPE811 on the Embest DM-STF4BB board.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
* @{
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
static const I2CConfig i2ccfg = {
OPMODE_I2C,
400000,
FAST_DUTY_CYCLE_2,
};
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static void init_board(void)
{
palSetPadMode(GPIOC, 13, PAL_MODE_INPUT | PAL_STM32_PUDR_FLOATING); /* TP IRQ */
palSetPadMode(GPIOB, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SCL */
palSetPadMode(GPIOB, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SDA */
i2cStart(&I2CD1, &i2ccfg);
}
/**
* @brief Check whether an interrupt is raised
* @return TRUE if there is an interrupt signal present
*
* @notapi
*/
static inline bool_t getpin_irq(void) {
return (!(palReadPad(GPIOC, 13)));
}
/**
* @brief Write a value into a certain register
*
* @param[in] reg The register address
* @param[in] n The amount of bytes (one or two)
* @param[in] val The value
*
* @notapi
*/
static void write_reg(uint8_t reg, uint8_t n, uint16_t val)
{
uint8_t txbuf[3];
i2cAcquireBus(&I2CD1);
txbuf[0] = reg;
if (n == 1) {
txbuf[1] = val;
i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, txbuf, 2, NULL, 0, MS2ST(STMPE811_TIMEOUT));
} else if (n == 2) {
txbuf[1] = ((val & 0xFF00) >> 8);
txbuf[2] = (val & 0x00FF);
i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, txbuf, 3, NULL, 0, MS2ST(STMPE811_TIMEOUT));
}
i2cReleaseBus(&I2CD1);
}
/**
* @brief Read the value of a certain register
*
* @param[in] reg The register address
* @param[in] n The amount of bytes (one or two)
*
* @return Data read from device (one byte or two depending on n param)
*
* @notapi
*/
static uint16_t read_reg(uint8_t reg, uint8_t n)
{
uint8_t txbuf[1], rxbuf[2];
uint16_t ret;
rxbuf[0] = 0;
rxbuf[1] = 0;
i2cAcquireBus(&I2CD1);
txbuf[0] = reg;
i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, txbuf, 1, rxbuf, n, MS2ST(STMPE811_TIMEOUT));
if (n == 1) {
ret = rxbuf[0];
} else if (n == 2) {
ret = ((rxbuf[0] << 8) | (rxbuf[1] & 0xFF));
}
i2cReleaseBus(&I2CD1);
return ret;
}
static void read_reg_n(uint8_t reg, uint8_t n, uint8_t *rxbuf)
{
uint8_t txbuf[1];
i2cAcquireBus(&I2CD1);
txbuf[0] = reg;
i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, txbuf, 1, rxbuf, n, MS2ST(STMPE811_TIMEOUT));
i2cReleaseBus(&I2CD1);
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
/** @} */

View File

@ -1,59 +1,59 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/tdisp/HD44780/tdisp_lld_board_olimex_e407.h
* @brief TDISP driver subsystem board interface for the HD44780 display
*
* @addtogroup TDISP
* @{
*/
#ifndef _TDISP_LLD_BOARD_H
#define _TDISP_LLD_BOARD_H
/* Configure these to match the hardware connections on your board */
#define BUS_4BITS FALSE
#define PORT_DATA GPIOG
#define PORT_CTRL GPIOE
#define PIN_RS 0
#define PIN_RW 1
#define PIN_EN 2
static void init_board(void) {
palSetGroupMode(PORT_CTRL, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
palSetGroupMode(PORT_DATA, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
palClearPad(PORT_CTRL, PIN_RW);
}
static void writeToLCD(uint8_t data) {
palWritePort(PORT_DATA, data);
palSetPad(PORT_CTRL, PIN_EN);
gfxSleepMicroseconds(1);
palClearPad(PORT_CTRL, PIN_EN);
gfxSleepMicroseconds(5);
}
static void write_cmd(uint8_t data) {
palClearPad(PORT_CTRL, PIN_RS);
#if BUS_4BITS
writeToLCD(data>>4);
#endif
writeToLCD(data);
}
static void write_data(uint8_t data) {
palSetPad(PORT_CTRL, PIN_RS);
#if BUS_4BITS
writeToLCD(data>>4);
#endif
writeToLCD(data);
}
#endif /* _TDISP_LLD_BOARD_H */
/** @} */
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/tdisp/HD44780/tdisp_lld_board_olimex_e407.h
* @brief TDISP driver subsystem board interface for the HD44780 display
*
* @addtogroup TDISP
* @{
*/
#ifndef _TDISP_LLD_BOARD_H
#define _TDISP_LLD_BOARD_H
/* Configure these to match the hardware connections on your board */
#define BUS_4BITS FALSE
#define PORT_DATA GPIOG
#define PORT_CTRL GPIOE
#define PIN_RS 0
#define PIN_RW 1
#define PIN_EN 2
static void init_board(void) {
palSetGroupMode(PORT_CTRL, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
palSetGroupMode(PORT_DATA, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
palClearPad(PORT_CTRL, PIN_RW);
}
static void writeToLCD(uint8_t data) {
palWritePort(PORT_DATA, data);
palSetPad(PORT_CTRL, PIN_EN);
gfxSleepMicroseconds(1);
palClearPad(PORT_CTRL, PIN_EN);
gfxSleepMicroseconds(5);
}
static void write_cmd(uint8_t data) {
palClearPad(PORT_CTRL, PIN_RS);
#if BUS_4BITS
writeToLCD(data>>4);
#endif
writeToLCD(data);
}
static void write_data(uint8_t data) {
palSetPad(PORT_CTRL, PIN_RS);
#if BUS_4BITS
writeToLCD(data>>4);
#endif
writeToLCD(data);
}
#endif /* _TDISP_LLD_BOARD_H */
/** @} */

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@ -1,122 +1,122 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/tdisp/HD44780/tdisp_lld_board_st_stm32f4_discovery.h
* @brief TDISP driver subsystem board interface for the HD44780 display
*
* @addtogroup TDISP
* @{
*/
#ifndef _TDISP_LLD_BOARD_H
#define _TDISP_LLD_BOARD_H
/* Configure these to match the hardware connections on your board */
#define BUS_4BITS TRUE
/* Configure the bitoffset in the dataport so they match with the
* hardware pins. An offset of 0 means bit0 stays at bit0 of the dataport.
* If the offset is set to 3, bit0 of the nibble will be positioned at
* P[A..G]3 of the hardware-port.
*/
#define hardware_offset 3
/* The port where the data is sent to. In the
* low-leveldriver het hardware_offset is taken
* into account. If for example the hardware_offset
* is set to 3, then de data will be sent to
* PE3, PE4, PE5 en PE6, if the dataport where GPIOE.
*/
#define PORT_DATA GPIOE
/* The port used to controle the controle lines of
* the display.
*/
#define PORT_CTRL GPIOD
/* Pin to controle the R/S-line of the display */
#define PIN_RS 0
/* Pin to controle the EN-line of the display */
#define PIN_EN 1
/* Pin to controle the R/W-pin of the display.
* If reading of the display is not used disable
* reading in the gfxconf.h and put a dummy value here
* as it will not be used.
*/
#define PIN_RW 7
static void init_board(void) {
/* Initialize the ports for data and controle-lines */
palSetGroupMode(PORT_CTRL, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
palSetGroupMode(PORT_DATA, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
/* Set alle controle pins to low */
palClearPad(PORT_CTRL, PIN_RS);
palClearPad(PORT_CTRL, PIN_EN);
#if TDISP_NEED_READ
palClearPad(PORT_CTRL, PIN_RW);
#endif
}
/* This is the low-level routine for sending the bits
* to the LCD-display. This routine shifts
* the bits so they match the hardware port.
*/
static void writeToLCD(uint8_t data) {
palWritePort(PORT_DATA, data<<hardware_offset);
palSetPad(PORT_CTRL, PIN_EN);
gfxSleepMicroseconds(1);
palClearPad(PORT_CTRL, PIN_EN);
/* wait a little while so that de display can process the data */
gfxSleepMicroseconds(5);
}
/* Writes a command to the display. The
* RS-line is pulled low and than the
* data is send.
*/
static void write_cmd(uint8_t data) {
palClearPad(PORT_CTRL, PIN_RS);
#if BUS_4BITS
/* first send the high-nibble */
writeToLCD(data>>4);
#endif
/* send the low-nibble */
#if BUS_4BITS
/* in 4-bit mode the high-nibble is zeroed out */
writeToLCD(data & 0x0F);
#else
writeToLCD(data);
#endif
}
// static void write_initcmd(uint8_t data) {
// write_cmd(data);
// }
/* Write data to the display. The
* RS-line is pulled high and than the
* data is send.
*/
static void write_data(uint8_t data) {
palSetPad(PORT_CTRL, PIN_RS);
#if BUS_4BITS
/* first send the high-nibble */
writeToLCD(data>>4);
#endif
/* send the low-nibble */
#if BUS_4BITS
/* in 4-bit mode the high-nibble is zeroed out */
writeToLCD(data & 0x0F);
#else
writeToLCD(data);
#endif
}
#endif /* _TDISP_LLD_BOARD_H */
/** @} */
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file drivers/tdisp/HD44780/tdisp_lld_board_st_stm32f4_discovery.h
* @brief TDISP driver subsystem board interface for the HD44780 display
*
* @addtogroup TDISP
* @{
*/
#ifndef _TDISP_LLD_BOARD_H
#define _TDISP_LLD_BOARD_H
/* Configure these to match the hardware connections on your board */
#define BUS_4BITS TRUE
/* Configure the bitoffset in the dataport so they match with the
* hardware pins. An offset of 0 means bit0 stays at bit0 of the dataport.
* If the offset is set to 3, bit0 of the nibble will be positioned at
* P[A..G]3 of the hardware-port.
*/
#define hardware_offset 3
/* The port where the data is sent to. In the
* low-leveldriver het hardware_offset is taken
* into account. If for example the hardware_offset
* is set to 3, then de data will be sent to
* PE3, PE4, PE5 en PE6, if the dataport where GPIOE.
*/
#define PORT_DATA GPIOE
/* The port used to controle the controle lines of
* the display.
*/
#define PORT_CTRL GPIOD
/* Pin to controle the R/S-line of the display */
#define PIN_RS 0
/* Pin to controle the EN-line of the display */
#define PIN_EN 1
/* Pin to controle the R/W-pin of the display.
* If reading of the display is not used disable
* reading in the gfxconf.h and put a dummy value here
* as it will not be used.
*/
#define PIN_RW 7
static void init_board(void) {
/* Initialize the ports for data and controle-lines */
palSetGroupMode(PORT_CTRL, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
palSetGroupMode(PORT_DATA, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
/* Set alle controle pins to low */
palClearPad(PORT_CTRL, PIN_RS);
palClearPad(PORT_CTRL, PIN_EN);
#if TDISP_NEED_READ
palClearPad(PORT_CTRL, PIN_RW);
#endif
}
/* This is the low-level routine for sending the bits
* to the LCD-display. This routine shifts
* the bits so they match the hardware port.
*/
static void writeToLCD(uint8_t data) {
palWritePort(PORT_DATA, data<<hardware_offset);
palSetPad(PORT_CTRL, PIN_EN);
gfxSleepMicroseconds(1);
palClearPad(PORT_CTRL, PIN_EN);
/* wait a little while so that de display can process the data */
gfxSleepMicroseconds(5);
}
/* Writes a command to the display. The
* RS-line is pulled low and than the
* data is send.
*/
static void write_cmd(uint8_t data) {
palClearPad(PORT_CTRL, PIN_RS);
#if BUS_4BITS
/* first send the high-nibble */
writeToLCD(data>>4);
#endif
/* send the low-nibble */
#if BUS_4BITS
/* in 4-bit mode the high-nibble is zeroed out */
writeToLCD(data & 0x0F);
#else
writeToLCD(data);
#endif
}
// static void write_initcmd(uint8_t data) {
// write_cmd(data);
// }
/* Write data to the display. The
* RS-line is pulled high and than the
* data is send.
*/
static void write_data(uint8_t data) {
palSetPad(PORT_CTRL, PIN_RS);
#if BUS_4BITS
/* first send the high-nibble */
writeToLCD(data>>4);
#endif
/* send the low-nibble */
#if BUS_4BITS
/* in 4-bit mode the high-nibble is zeroed out */
writeToLCD(data & 0x0F);
#else
writeToLCD(data);
#endif
}
#endif /* _TDISP_LLD_BOARD_H */
/** @} */

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GFXINC += $(GFXLIB)/boards/base/Linux
GFXSRC +=
GFXDEFS += -DGFX_USE_OS_LINUX=TRUE
include $(GFXLIB)/drivers/multiple/X/gdisp_lld.mk

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#
# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
#
##############################################################################################
#
# On command line:
#
# make all = Create project
#
# make clean = Clean project files.
#
# To rebuild project do "make clean" and "make all".
#
##############################################################################################
# Start of default section
#
TRGT =
CC = $(TRGT)gcc
AS = $(TRGT)gcc -x assembler-with-cpp
# List all default C defines here, like -D_DEBUG=1
DDEFS =
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS = -lX11 -pthread -lrt
#
# End of default section
##############################################################################################
##############################################################################################
# Start of user section
#
# Define project name here
PROJECT = ugfx
# Imported source files and paths for uGFX
GFXLIB = ../ugfx
include ${GFXLIB}/gfx.mk
include ${GFXLIB}/boards/base/Linux/board.mk
# Where is our source code - alter these for your project.
MYFILES = $(GFXLIB)/demos/modules/gdisp/basics
MYCSRC = $(MYFILES)/main.c
MYDEFS =
# List all user C define here, like -D_DEBUG=1
UDEFS = $(MYDEFS) $(GFXDEFS)
# Define ASM defines here
UADEFS =
# List C source files here
SRC = $(GFXSRC) \
$(MYCSRC)
# List ASM source files here
ASRC =
# List all user directories here
UINCDIR = $(MYFILES) $(GFXINC)
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
# Define optimisation level here
OPT = -ggdb -O0 -fomit-frame-pointer
#
# End of user defines
##############################################################################################
INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
DEFS = $(DDEFS) $(UDEFS)
ADEFS = $(DADEFS) $(UADEFS)
OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
LIBS = $(DLIBS) $(ULIBS)
ASFLAGS = -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
CPFLAGS = $(OPT) -Wall -Wextra -Wstrict-prototypes -fverbose-asm $(DEFS)
ifeq ($(HOST_OSX),yes)
ifeq ($(OSX_SDK),)
OSX_SDK = /Developer/SDKs/MacOSX10.7.sdk
endif
ifeq ($(OSX_ARCH),)
OSX_ARCH = -mmacosx-version-min=10.3 -arch i386
endif
CPFLAGS += -isysroot $(OSX_SDK) $(OSX_ARCH)
LDFLAGS = -Wl -Map=$(PROJECT).map,-syslibroot,$(OSX_SDK),$(LIBDIR)
LIBS += $(OSX_ARCH)
else
# Linux, or other
CPFLAGS += -m32 -Wa,-alms=$(<:.c=.lst)
LDFLAGS = -m32 -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
endif
# Generate dependency information
CPFLAGS += -MD -MP -MF .dep/$(@F).d
#
# makefile rules
#
all: $(OBJS) $(PROJECT)
%.o : %.c
$(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
%.o : %.s
$(AS) -c $(ASFLAGS) $< -o $@
$(PROJECT): $(OBJS)
$(CC) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
gcov:
-mkdir gcov
$(COV) -u $(subst /,\,$(SRC))
-mv *.gcov ./gcov
clean:
-rm -f $(OBJS)
-rm -f $(PROJECT)
-rm -f $(PROJECT).map
-rm -f $(SRC:.c=.c.bak)
-rm -f $(SRC:.c=.lst)
-rm -f $(ASRC:.s=.s.bak)
-rm -f $(ASRC:.s=.lst)
-rm -fR .dep
#
# Include the dependency files, should be the last of the makefile
#
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# *** EOF ***

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Copy these files into your own project directory and alter them to suite.
Notes:
1/ Look at the MYFILES definition and the MYCSRC definition.

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This directory contains the interface for Linux
running either native Linux.
On this board uGFX currently supports:
- GDISP via the X driver
- GINPUT-touch via the X driver
There is an example Makefile and project in the examples directory.

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#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
return !palReadPad(GPIOD, GPIOD_SD_CD);
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* Board has no write protection detection */
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

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# Required include directories
BOARDINC = $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board
# List of all the board related files.
BOARDSRC = $(BOARDINC)/board.c \
$(BOARDINC)/flash_memory.c

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#include "hal.h"
#include "flash_memory.h"
static const unsigned short _SERIAL_FLASH_CMD_RDID = 0x9F; // 25P80
static const unsigned short _SERIAL_FLASH_CMD_READ = 0x03;
static const unsigned short _SERIAL_FLASH_CMD_WRITE = 0x02;
static const unsigned short _SERIAL_FLASH_CMD_WREN = 0x06;
static const unsigned short _SERIAL_FLASH_CMD_RDSR = 0x05;
static const unsigned short _SERIAL_FLASH_CMD_ERASE = 0xC7; // 25P80
static const unsigned short _SERIAL_FLASH_CMD_EWSR = 0x06; // 25P80
static const unsigned short _SERIAL_FLASH_CMD_WRSR = 0x01;
static const unsigned short _SERIAL_FLASH_CMD_SER = 0xD8; //25P80
static const SPIConfig flash_spicfg = {
NULL,
GPIOD,
GPIOD_FLASH_CS,
0
};
bool flash_is_write_busy(void) {
static uint8_t is_write_busy_cmd[1];
is_write_busy_cmd[0] = _SERIAL_FLASH_CMD_RDSR;
uint8_t result[1];
spiAcquireBus(&SPID3);
spiStart(&SPID3, &flash_spicfg);
spiSelect(&SPID3);
spiSend(&SPID3, sizeof(is_write_busy_cmd), is_write_busy_cmd);
spiReceive(&SPID3, sizeof(result), result);
spiUnselect(&SPID3);
spiReleaseBus(&SPID3);
return result[0]&0x01;
}
void flash_write_enable(void) {
spiAcquireBus(&SPID3);
spiStart(&SPID3, &flash_spicfg);
spiSelect(&SPID3);
spiSend(&SPID3, 1, &_SERIAL_FLASH_CMD_WREN);
spiUnselect(&SPID3);
spiReleaseBus(&SPID3);
}
void flash_sector_erase(uint32_t sector) {
flash_write_enable();
static uint8_t sector_erase_cmd[4];
sector_erase_cmd[0] = _SERIAL_FLASH_CMD_SER;
sector_erase_cmd[1] = (sector >> 16) & 0xFF;
sector_erase_cmd[2] = (sector >> 8) & 0xFF;
sector_erase_cmd[3] = sector & 0xFF;
spiAcquireBus(&SPID3);
spiStart(&SPID3, &flash_spicfg);
spiSelect(&SPID3);
spiSend(&SPID3, sizeof(sector_erase_cmd), sector_erase_cmd);
spiUnselect(&SPID3);
spiReleaseBus(&SPID3);
/* wait for complete */
while(flash_is_write_busy());
}
void flash_read(uint32_t address, size_t bytes, uint8_t *out) {
static uint8_t sector_read_cmd[4];
sector_read_cmd[0] = _SERIAL_FLASH_CMD_READ;
sector_read_cmd[1] = (address >> 16) & 0xFF;
sector_read_cmd[2] = (address >> 8) & 0xFF;
sector_read_cmd[3] = address & 0xFF;
spiAcquireBus(&SPID3);
spiStart(&SPID3, &flash_spicfg);
spiSelect(&SPID3);
spiSend(&SPID3, sizeof(sector_read_cmd), sector_read_cmd);
spiReceive(&SPID3, bytes, out);
spiUnselect(&SPID3);
spiReleaseBus(&SPID3);
}
void flash_write(uint32_t address, size_t bytes, const uint8_t *data) {
static uint8_t flash_write_cmd[4];
flash_write_enable();
flash_write_cmd[0] = _SERIAL_FLASH_CMD_WRITE;
flash_write_cmd[1] = (address >> 16) & 0xFF;
flash_write_cmd[2] = (address >> 8) & 0xFF;
flash_write_cmd[3] = address & 0xFF;
spiAcquireBus(&SPID3);
spiStart(&SPID3, &flash_spicfg);
spiSelect(&SPID3);
spiSend(&SPID3, sizeof(flash_write_cmd), flash_write_cmd);
spiSend(&SPID3, bytes, data);
spiUnselect(&SPID3);
spiReleaseBus(&SPID3);
/* wait for complete */
while(flash_is_write_busy());
}
bool flash_tp_calibrated(void) {
uint8_t out[1];
flash_read(0x0F0000, 1, out);
return (out[0] == 0x01);
}
void flash_tp_calibration_save(uint16_t instance, const uint8_t *calbuf, size_t sz) {
if (instance) return;
flash_sector_erase(0x0F0000);
uint8_t calibrated = 0x01;
flash_write(0x0F0000, 1, &calibrated);
flash_write(0x0F0001, sz, calbuf);
}
const char *flash_tp_calibration_load(uint16_t instance) {
static uint8_t foo[24];
if (instance) return 0;
if (!flash_tp_calibrated()) return 0;
flash_read(0x0F0001, 24, foo);
return (char *)foo;
}

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void flash_sector_erase(uint32_t sector);
void flash_read(uint32_t address, size_t bytes, uint8_t *out);
void flash_write(uint32_t address, size_t bytes, const uint8_t *data);
bool flash_tp_calibrated(void);
void flash_tp_calibration_save(uint16_t instance, const uint8_t *calbuf, size_t sz);
const char *flash_tp_calibration_load(uint16_t instance);

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GFXINC += $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341
GFXSRC +=
GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE
include $(GFXLIB)/drivers/gdisp/ILI9341/gdisp_lld.mk
include $(GFXLIB)/drivers/ginput/touch/MCU/ginput_lld.mk

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file boards/base/Mikromedia-STM32-M4-ILI9341/board_ILI9341.h
* @brief GDISP Graphics Driver subsystem low level driver source for the ILI9341 display.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
#define SET_CS palSetPad(GPIOE, GPIOE_LCD_CS);
#define CLR_CS palClearPad(GPIOE, GPIOE_LCD_CS);
#define SET_RS palSetPad(GPIOE, GPIOE_LCD_RS);
#define CLR_RS palClearPad(GPIOE, GPIOE_LCD_RS);
#define SET_WR palSetPad(GPIOE, GPIOE_PMWR);
#define CLR_WR palClearPad(GPIOE, GPIOE_PMWR);
#define SET_RD palSetPad(GPIOE, GPIOE_PMRD);
#define CLR_RD palClearPad(GPIOE, GPIOE_PMRD);
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
/* Configure the pins to a well know state */
SET_RS;
SET_RD;
SET_WR;
CLR_CS;
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if(state) {
// reset lcd
palClearPad(GPIOE, GPIOE_LCD_RST);
} else {
palSetPad(GPIOE, GPIOE_LCD_RST);
}
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
// TODO: can probably pwm this
if(percent) {
// turn back light on
palSetPad(GPIOE, GPIOE_LCD_BLED);
} else {
// turn off
palClearPad(GPIOE, GPIOE_LCD_BLED);
}
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
/**
* @brief Short delay
*
* @param[in] dly Length of delay
*
* @notapi
*/
static inline void ili9341_delay(uint16_t dly) {
static uint16_t i;
for(i = 0; i < dly; i++)
asm("nop");
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
palWriteGroup(GPIOE, 0x00FF, 0, index);
CLR_RS; CLR_WR; ili9341_delay(1); SET_WR; ili9341_delay(1); SET_RS;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
palWriteGroup(GPIOE, 0x00FF, 0, data);
CLR_WR; ili9341_delay(1); SET_WR; ili9341_delay(1);
}
static inline void setreadmode(GDisplay *g) {
(void) g;
// change pin mode to digital input
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
}
static inline void setwritemode(GDisplay *g) {
(void) g;
// change pin mode back to digital output
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
}
static inline uint16_t read_data(GDisplay *g) {
uint16_t value;
(void) g;
CLR_RD;
value = palReadPort(GPIOE);
value = palReadPort(GPIOE);
SET_RD;
return value;
}
#endif /* _GDISP_LLD_BOARD_H */

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@ -0,0 +1,232 @@
##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
# Replace -O0 with -O2 for a production build. -O2 just messes with the debugger.
USE_OPT = -O0 -g -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
# Enables the use of FPU on Cortex-M4.
# Enable this if you really want to use the STM FWLib.
ifeq ($(USE_FPU),)
USE_FPU = no
endif
# Enable this if you really want to use the STM FWLib.
ifeq ($(USE_FWLIB),)
USE_FWLIB = no
endif
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, sources and paths
#
SW = ..
# Define project name here
PROJECT = ch
# Imported source files and paths
CHIBIOS = ../ChibiOS
#include $(CHIBIOS)/boards/MIKROMEDIA_STM32_M4/board.mk # Not a standard ChibiOS supported board
include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
LDSCRIPT= $(PORTLD)/STM32F407xG.ld
# Imported source files and paths for uGFX
GFXLIB = ../uGFX
include $(GFXLIB)/gfx.mk
include $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341/board.mk
include $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.mk # The replacement ChibiOS board files
# Where is our source code - alter these for your project.
MYFILES = $(GFXLIB)/demos/modules/gdisp/basics
MYCSRC = $(MYFILES)/main.c
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
$(KERNSRC) \
$(TESTSRC) \
$(HALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
$(GFXSRC) \
$(MYCSRC)
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
$(GFXINC) \
$(MYFILES)
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m4
#TRGT = arm-elf-
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra
#
# Compiler settings
##############################################################################
##############################################################################
# Start of default section
#
# List all default C defines here, like -D_DEBUG=1
DDEFS = $(GFXDEFS)
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS =
#
# End of default section
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
ifeq ($(USE_FPU),yes)
USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant
DDEFS += -DCORTEX_USE_FPU=TRUE
else
DDEFS += -DCORTEX_USE_FPU=FALSE
endif
ifeq ($(USE_FWLIB),yes)
include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
CSRC += $(STM32SRC)
INCDIR += $(STM32INC)
USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk

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@ -0,0 +1,531 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread automatically. The application has
* then the responsibility to do one of the following:
* - Spawn a custom idle thread at priority @p IDLEPRIO.
* - Change the main() thread priority to @p IDLEPRIO then enter
* an endless loop. In this scenario the @p main() thread acts as
* the idle thread.
* .
* @note Unless an idle thread is spawned the @p main() thread must not
* enter a sleep state.
*/
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
#define CH_NO_IDLE_THREAD FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM FALSE
#endif
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC TRUE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI TRUE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM TRUE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI TRUE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32F4xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 15...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
#define STM32F4xx_MCUCONF
/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED TRUE
#define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSI
#define STM32_PLLM_VALUE 16
#define STM32_PLLN_VALUE 336
#define STM32_PLLP_VALUE 2
#define STM32_PLLQ_VALUE 7
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV4
#define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_RTCSEL STM32_RTCSEL_LSI
#define STM32_RTCPRE_VALUE 8
#define STM32_MCO1SEL STM32_MCO1SEL_HSI
#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 FALSE
#define STM32_ADC_USE_ADC3 FALSE
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC2_DMA_PRIORITY 2
#define STM32_ADC_ADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 6
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
/*
* CAN driver system settings.
*/
#define STM32_CAN_USE_CAN1 FALSE
#define STM32_CAN_USE_CAN2 FALSE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_USE_TIM9 FALSE
#define STM32_GPT_USE_TIM11 FALSE
#define STM32_GPT_USE_TIM12 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
/*
* I2C driver system settings.
*/
#define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
#define STM32_I2C_I2C3_IRQ_PRIORITY 5
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt()
/*
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_USE_TIM9 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
/*
* MAC driver system settings.
*/
#define STM32_MAC_TRANSMIT_BUFFERS 2
#define STM32_MAC_RECEIVE_BUFFERS 4
#define STM32_MAC_BUFFERS_SIZE 1522
#define STM32_MAC_PHY_TIMEOUT 100
#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
#define STM32_MAC_ETH1_IRQ_PRIORITY 13
#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 TRUE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_USE_TIM9 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 TRUE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 TRUE
#define STM32_SPI_USE_SPI3 TRUE
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI3_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 FALSE
#define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USE_UART4 FALSE
#define STM32_UART_USE_UART5 FALSE
#define STM32_UART_USE_USART6 FALSE
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_UART4_IRQ_PRIORITY 12
#define STM32_UART_UART5_IRQ_PRIORITY 12
#define STM32_UART_USART6_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_UART4_DMA_PRIORITY 0
#define STM32_UART_UART5_DMA_PRIORITY 0
#define STM32_UART_USART6_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
/*
* USB driver system settings.
*/
#define STM32_USB_USE_OTG1 FALSE
#define STM32_USB_USE_OTG2 FALSE
#define STM32_USB_OTG1_IRQ_PRIORITY 14
#define STM32_USB_OTG2_IRQ_PRIORITY 14
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0

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@ -0,0 +1,81 @@
# This is a script file for OpenOCD 0.7.0
#
# It is set up for the Mikromedia-STM32M4 board using the ST-Link JTAG adaptor.
#
# Assuming the current directory is your project directory containing this openocd.cfg file...
#
# To program your device:
#
# openocd -f openocd.cfg -c "Burn yourfile.bin" -c shutdown
#
# To debug your device:
#
# openocd
# (This will run openocd in gdb server debug mode. Leave it running in the background)
#
# gdb yourfile.elf
# (To start gdb. Then run the following commands in gdb...)
#
# target remote 127.0.0.1:3333
# monitor Debug
# stepi
# (This last stepi resynchronizes gdb).
#
# If you want to reprogram from within gdb:
#
# monitor Burn yourfile.bin
#
echo ""
echo "##### Loading debugger..."
source [find interface/stlink-v2.cfg]
echo ""
echo "##### Loading CPU..."
source [find target/stm32f4x_stlink.cfg]
echo ""
echo "##### Configuring..."
reset_config srst_only srst_nogate
#cortex_m maskisr (auto|on|off)
#cortex_m vector_catch [all|none|list]
#cortex_m reset_config (srst|sysresetreq|vectreset)
#gdb_breakpoint_override hard
proc Debug { } {
echo ""
echo "##### Debug Session Connected..."
reset init
echo "Ready..."
}
proc Burn {file} {
echo ""
echo "##### Burning $file to device..."
halt
# Due to an issue with the combination of the ST-Link adapters and OpenOCD
# applying the stm32f2x unlock 0 command actaully applies read protection - VERY BAD!
# If this happens to you - use the ST-Link utility to set the option byte back to normal.
# If you are using a different debugger eg a FT2232 based adapter you can uncomment the line below.
#stm32f2x unlock 0
flash protect 0 0 last off
reset init
flash write_image erase $file 0x08000000
verify_image $file 0x0
#flash protect 0 0 last on
reset
echo "Burning Complete!"
}
echo ""
echo "##### Leaving Configuration Mode..."
init
reset init
flash probe 0
flash banks
#flash info 0
echo ""
echo "##### Waiting for debug connections..."

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file boards/base/Mikromedia-STM32-M4-ILI9341/ginput_lld_mouse_board.h
* @brief GINPUT Touch low level driver source for the MCU.
*/
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
#define _GINPUT_LLD_MOUSE_BOARD_H
/* read ADC if more than this many ticks since last read */
#define ADC_UPDATE_INTERVAL 3
#define ADC_NUM_CHANNELS 2
#define ADC_BUF_DEPTH 1
static const ADCConversionGroup adcgrpcfg = {
FALSE,
ADC_NUM_CHANNELS,
NULL,
NULL,
/* HW dependent part.*/
0,
ADC_CR2_SWSTART,
0,
0,
ADC_SQR1_NUM_CH(ADC_NUM_CHANNELS),
0,
ADC_SQR3_SQ2_N(ADC_CHANNEL_IN8) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN9)
};
static systime_t last_update;
static volatile uint16_t tpx, tpy, detect;
static inline void delay(uint16_t dly) {
static uint16_t i;
for(i = 0; i < dly; i++)
asm("nop");
}
void read_mikro_tp(void) {
systime_t now = chTimeNow();
adcsample_t samples[ADC_NUM_CHANNELS * ADC_BUF_DEPTH];
uint16_t _detect, _tpx, _tpy;
if(now < last_update || ((now - last_update) > ADC_UPDATE_INTERVAL)) {
// detect button press
// sample[0] will go from ~200 to ~4000 when pressed
adcConvert(&ADCD1, &adcgrpcfg, samples, ADC_BUF_DEPTH);
_detect = samples[0];
// read x channel
palSetPad(GPIOB, GPIOB_DRIVEA);
palClearPad(GPIOB, GPIOB_DRIVEB);
chThdSleepMilliseconds(1);
adcConvert(&ADCD1, &adcgrpcfg, samples, ADC_BUF_DEPTH);
_tpx = samples[1];
// read y channel (invert)
palClearPad(GPIOB, GPIOB_DRIVEA);
palSetPad(GPIOB, GPIOB_DRIVEB);
chThdSleepMilliseconds(1);
adcConvert(&ADCD1, &adcgrpcfg, samples, ADC_BUF_DEPTH);
_tpy = samples[0];
// ready for next read
palClearPad(GPIOB, GPIOB_DRIVEA);
palClearPad(GPIOB, GPIOB_DRIVEB);
chSysLock();
tpx = _tpx;
tpy = _tpy;
detect = _detect;
last_update = now;
chSysUnlock();
}
}
/**
* @brief Initialise the board for the touch.
*
* @notapi
*/
static inline void init_board(void) {
adcStart(&ADCD1, NULL);
last_update = chTimeNow();
// leave DRIVEA & DRIVEB ready for next read
palClearPad(GPIOB, GPIOB_DRIVEA);
palClearPad(GPIOB, GPIOB_DRIVEB);
chThdSleepMilliseconds(1);
}
/**
* @brief Check whether the surface is currently touched
* @return TRUE if the surface is currently touched
*
* @notapi
*/
static inline bool_t getpin_pressed(void) {
read_mikro_tp();
return (detect > 2000) ? true : false;
}
/**
* @brief Aquire the bus ready for readings
*
* @notapi
*/
static inline void aquire_bus(void) {
}
/**
* @brief Release the bus after readings
*
* @notapi
*/
static inline void release_bus(void) {
}
/**
* @brief Read an x value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_x_value(void) {
read_mikro_tp();
return tpx;
}
/**
* @brief Read an y value from touch controller
* @return The value read from the controller
*
* @notapi
*/
static inline uint16_t read_y_value(void) {
read_mikro_tp();
return tpy;
}
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file boards/base/Mikromedia-STM32-M4-ILI9341/ginput_lld_mouse_config.h
* @brief GINPUT LLD header file for touch driver.
*
* @defgroup Mouse Mouse
* @ingroup GINPUT
*
* @{
*/
#ifndef _LLD_GINPUT_MOUSE_CONFIG_H
#define _LLD_GINPUT_MOUSE_CONFIG_H
#define GINPUT_MOUSE_EVENT_TYPE GEVENT_TOUCH
#define GINPUT_MOUSE_NEED_CALIBRATION TRUE
#define GINPUT_MOUSE_LLD_CALIBRATION_LOADSAVE FALSE
#define GINPUT_MOUSE_MAX_CALIBRATION_ERROR 12
#define GINPUT_MOUSE_READ_CYCLES 4
#define GINPUT_MOUSE_POLL_PERIOD 3
#define GINPUT_MOUSE_MAX_CLICK_JITTER 2
#define GINPUT_MOUSE_MAX_MOVE_JITTER 2
#define GINPUT_MOUSE_CLICK_TIME 500
#endif /* _LLD_GINPUT_MOUSE_CONFIG_H */
/** @} */

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This directory contains the interface for the MikroMedia STM32 M4 board
running under ChibiOS with the ILI9341 display.
On this board uGFX currently supports:
- GDISP via the ILI9341 display
- GINPUT-touch via the MCU driver
Note there are two variants of this board - one with the ILI9341 display
and an older one with a different display. This one is for the ILI9341 display.
As this is not a standard ChibiOS supported board the necessary board files have also
been provided in the ChibiOS_Board directory.
There is an example Makefile and project in the examples directory.

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GFXINC += $(GFXLIB)/boards/base/Olimex-SAM7EX256-GE12 $(GFXLIB)/boards/base/Olimex-SAM7EX256-GE8
GFXSRC +=
GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE
include $(GFXLIB)/drivers/gdisp/Nokia6610GE12/gdisp_lld.mk
include $(GFXLIB)/drivers/gadc/AT91SAM7/gadc_lld.mk
include $(GFXLIB)/drivers/ginput/dial/GADC/ginput_lld.mk
include $(GFXLIB)/drivers/ginput/toggle/Pal/ginput_lld.mk
include $(GFXLIB)/drivers/gaudin/gadc/gaudin_lld.mk

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file boards/base/Olimex-SAM7EX256-GE12/board_Nokia6610GE12.h
* @brief GDISP Graphic Driver subsystem board interface for the Olimex SAM7-EX256 board.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
/*
* Set various display properties. These properties mostly depend on the exact controller chip you get.
* The defaults should work for most controllers.
*/
//#define GDISP_GE8_BROKEN_CONTROLLER FALSE // Uncomment this out if you have a controller thats not window wrap broken.
//#define GDISP_SCREEN_HEIGHT 130 // The visible display height
//#define GDISP_SCREEN_WIDTH 130 // The visible display width
//#define GDISP_RAM_X_OFFSET 0 // The x offset of the visible area
//#define GDISP_RAM_Y_OFFSET 2 // The y offset of the visible area
//#define GDISP_SLEEP_SIZE 32 // The size of the sleep mode partial display
//#define GDISP_SLEEP_POS 50 // The position of the sleep mode partial display
//#define GDISP_INITIAL_CONTRAST 38 // The initial contrast percentage
//#define GDISP_INITIAL_BACKLIGHT 100 // The initial backlight percentage
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
// ******************************************************
// Pointers to AT91SAM7X256 peripheral data structures
// ******************************************************
static volatile AT91PS_PIO pPIOA = AT91C_BASE_PIOA;
static volatile AT91PS_PIO pPIOB = AT91C_BASE_PIOB;
static volatile AT91PS_SPI pSPI = AT91C_BASE_SPI0;
static volatile AT91PS_PMC pPMC = AT91C_BASE_PMC;
static volatile AT91PS_PDC pPDC = AT91C_BASE_PDC_SPI0;
/* The PWM backlight control is non-linear on this board.
* We pick values here that make it look a bit more linear.
*/
#define PWM_TOP_VALUE 500
#define PWM_BOTTOM_VALUE 200
#define PWM_VALUE(x) (PWM_BOTTOM_VALUE+(PWM_TOP_VALUE-PWM_BOTTOM_VALUE)*(x)/100)
/* PWM configuration structure. The LCD Backlight is on PWM1/PB20 ie PWM2/PIN1 in ChibiOS speak */
static const PWMConfig pwmcfg = {
1000000, /* 1 MHz PWM clock frequency. Ignored as we are using PWM_MCK_DIV_n */
1000, /* PWM period is 1000 cycles. */
NULL,
{
{PWM_MCK_DIV_1 | PWM_OUTPUT_ACTIVE_HIGH | PWM_OUTPUT_PIN1 | PWM_DISABLEPULLUP_PIN1, NULL},
},
};
static bool_t pwmRunning = FALSE;
/**
* @brief Initialise the board for the display.
* @notes Performs the following functions:
* 1. initialise the spi port used by your display
* 2. initialise the reset pin (initial state not-in-reset)
* 3. initialise the chip select pin (initial state not-active)
* 4. initialise the backlight pin (initial state back-light off)
*
* @notapi
*/
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
// *********************************************************************************************
// InitSpi( )
//
// Sets up SPI channel 0 for communications to Nokia 6610 LCD Display
//
// I/O ports used: PA2 = LCD Reset (set to low to reset)
// PA12 = LCD chip select (set to low to select the LCD chip)
// PA16 = SPI0_MISO Master In - Slave Out (not used in LCD interface)
// PA17 = SPI0_MOSI Master Out - Slave In pin (Serial Data to LCD slave)
// PA18 = SPI0_SPCK Serial Clock (to LCD slave)
// PB20 = backlight control (normally PWM control, 1 = full on)
//
// *********************************************************************************************}
/* This code should really use the ChibiOS driver for these functions */
// Pin for backlight
pPIOB->PIO_CODR = PIOB_LCD_BL_MASK; // Set PB20 to LOW
pPIOB->PIO_OER = PIOB_LCD_BL_MASK; // Configure PB20 as output
// Reset pin
pPIOA->PIO_SODR = PIOA_LCD_RESET_MASK; // Set PA2 to HIGH
pPIOA->PIO_OER = PIOA_LCD_RESET_MASK; // Configure PA2 as output
// CS pin - this seems to be ignored
// pPIOA->PIO_SODR = 1<<12; // Set PA2 to HIGH
// pPIOA->PIO_OER = 1<<12; // Configure PA2 as output
// Init SPI0
// Disable the following pins from PIO control (will be used instead by the SPI0 peripheral)
// BIT12 = PA12 -> SPI0_NPCS0 chip select
// BIT16 = PA16 -> SPI0_MISO Master In - Slave Out (not used in LCD interface)
// BIT17 = PA17 -> SPI0_MOSI Master Out - Slave In pin (Serial Data to LCD slave)
// BIT18 = PA18 -> SPI0_SPCK Serial Clock (to LCD slave)
pPIOA->PIO_PDR = (1<<12) | (1<<16) | (1<<17) | (1<<18);
pPIOA->PIO_ASR = (1<<12) | (1<<16) | (1<<17) | (1<<18);
pPIOA->PIO_BSR = 0;
//enable the clock of SPI
pPMC->PMC_PCER = 1 << AT91C_ID_SPI0;
// Fixed mode
pSPI->SPI_CR = 0x81; //SPI Enable, Software reset
pSPI->SPI_CR = 0x01; //SPI Enable
pSPI->SPI_MR = 0xE0011; //Master mode, fixed select, disable decoder, PCS=1110
pSPI->SPI_CSR[0] = 0x01010311; //9bit, CPOL=1, ClockPhase=0, SCLK = 48Mhz/3 = 16MHz
/* Display backlight control at 100% */
pwmRunning = FALSE;
palSetPad(IOPORT2, PIOB_LCD_BL);
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if (state)
palClearPad(IOPORT1, PIOA_LCD_RESET);
else
palSetPad(IOPORT1, PIOA_LCD_RESET);
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
if (percent == 100) {
/* Turn the pin on - No PWM */
if (pwmRunning) {
pwmStop(&PWMD2);
pwmRunning = FALSE;
}
palSetPad(IOPORT2, PIOB_LCD_BL);
} else if (percent == 0) {
/* Turn the pin off - No PWM */
if (pwmRunning) {
pwmStop(&PWMD2);
pwmRunning = FALSE;
}
palClearPad(IOPORT2, PIOB_LCD_BL);
} else {
/* Use the PWM */
if (!pwmRunning) {
pwmStart(&PWMD2, &pwmcfg);
pwmRunning = TRUE;
}
pwmEnableChannel(&PWMD2, 0, PWM_VALUE(percent));
}
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
// wait for the previous transfer to complete
while((pSPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0);
// send the command
pSPI->SPI_TDR = index & 0xFF;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
// wait for the previous transfer to complete
while((pSPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0);
// send the data
pSPI->SPI_TDR = data | 0x0100;
}
#endif /* _GDISP_LLD_BOARD_H */

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This directory contains the interface for the Olimex SAM7EX256 board
running under ChibiOS.
On this board uGFX currently supports:
- GDISP via the Nokia6610GE12 display
- GADC via the AT91SAM7 driver
- GINPUT-dials via the GADC driver
- GINPUT-toggles via the Pal driver
- GAUDIN via the GADC driver
Note there are two variants of this board - one with the GE8 display
and one with the GE12 display. This one is for the GE12 display.
See the Olimex-SAM7EX256-GE8 board file directory for example Makefiles etc.
Don't forget to change the example Makefile to point the GFX board file to the GE12 instead of the GE8.

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GFXINC += $(GFXLIB)/boards/base/Olimex-SAM7EX256-GE8
GFXSRC +=
GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE
include $(GFXLIB)/drivers/gdisp/Nokia6610GE8/gdisp_lld.mk
include $(GFXLIB)/drivers/gadc/AT91SAM7/gadc_lld.mk
include $(GFXLIB)/drivers/ginput/dial/GADC/ginput_lld.mk
include $(GFXLIB)/drivers/ginput/toggle/Pal/ginput_lld.mk
include $(GFXLIB)/drivers/gaudin/gadc/gaudin_lld.mk

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/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file boards/base/Olimex-SAM7EX256-GE8/board_Nokia6610GE8.h
* @brief GDISP Graphic Driver subsystem board interface for the Olimex SAM7-EX256 board.
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
/*
* Set various display properties. These properties mostly depend on the exact controller chip you get.
* The defaults should work for most controllers.
*/
//#define GDISP_GE8_BROKEN_CONTROLLER FALSE // Uncomment this out if you have a controller thats not window wrap broken.
//#define GDISP_SCREEN_HEIGHT 130 // The visible display height
//#define GDISP_SCREEN_WIDTH 130 // The visible display width
//#define GDISP_RAM_X_OFFSET 0 // The x offset of the visible area
//#define GDISP_RAM_Y_OFFSET 2 // The y offset of the visible area
//#define GDISP_SLEEP_SIZE 32 // The size of the sleep mode partial display
//#define GDISP_SLEEP_POS 50 // The position of the sleep mode partial display
//#define GDISP_INITIAL_CONTRAST 38 // The initial contrast percentage
//#define GDISP_INITIAL_BACKLIGHT 100 // The initial backlight percentage
// For a multiple display configuration we would put all this in a structure and then
// set g->board to that structure.
// ******************************************************
// Pointers to AT91SAM7X256 peripheral data structures
// ******************************************************
static volatile AT91PS_PIO pPIOA = AT91C_BASE_PIOA;
static volatile AT91PS_PIO pPIOB = AT91C_BASE_PIOB;
static volatile AT91PS_SPI pSPI = AT91C_BASE_SPI0;
static volatile AT91PS_PMC pPMC = AT91C_BASE_PMC;
static volatile AT91PS_PDC pPDC = AT91C_BASE_PDC_SPI0;
/* The PWM backlight control is non-linear on this board.
* We pick values here that make it look a bit more linear.
*/
#define PWM_TOP_VALUE 500
#define PWM_BOTTOM_VALUE 200
#define PWM_VALUE(x) (PWM_BOTTOM_VALUE+(PWM_TOP_VALUE-PWM_BOTTOM_VALUE)*(x)/100)
/* PWM configuration structure. The LCD Backlight is on PWM1/PB20 ie PWM2/PIN1 in ChibiOS speak */
static const PWMConfig pwmcfg = {
1000000, /* 1 MHz PWM clock frequency. Ignored as we are using PWM_MCK_DIV_n */
1000, /* PWM period is 1000 cycles. */
NULL,
{
{PWM_MCK_DIV_1 | PWM_OUTPUT_ACTIVE_HIGH | PWM_OUTPUT_PIN1 | PWM_DISABLEPULLUP_PIN1, NULL},
},
};
static bool_t pwmRunning = FALSE;
/**
* @brief Initialise the board for the display.
* @notes Performs the following functions:
* 1. initialise the spi port used by your display
* 2. initialise the reset pin (initial state not-in-reset)
* 3. initialise the chip select pin (initial state not-active)
* 4. initialise the backlight pin (initial state back-light off)
*
* @notapi
*/
static inline void init_board(GDisplay *g) {
// As we are not using multiple displays we set g->board to NULL as we don't use it.
g->board = 0;
switch(g->controllerdisplay) {
case 0: // Set up for Display 0
// *********************************************************************************************
// InitSpi( )
//
// Sets up SPI channel 0 for communications to Nokia 6610 LCD Display
//
// I/O ports used: PA2 = LCD Reset (set to low to reset)
// PA12 = LCD chip select (set to low to select the LCD chip)
// PA16 = SPI0_MISO Master In - Slave Out (not used in LCD interface)
// PA17 = SPI0_MOSI Master Out - Slave In pin (Serial Data to LCD slave)
// PA18 = SPI0_SPCK Serial Clock (to LCD slave)
// PB20 = backlight control (normally PWM control, 1 = full on)
//
// *********************************************************************************************}
/* This code should really use the ChibiOS driver for these functions */
// Pin for backlight
pPIOB->PIO_CODR = PIOB_LCD_BL_MASK; // Set PB20 to LOW
pPIOB->PIO_OER = PIOB_LCD_BL_MASK; // Configure PB20 as output
// Reset pin
pPIOA->PIO_SODR = PIOA_LCD_RESET_MASK; // Set PA2 to HIGH
pPIOA->PIO_OER = PIOA_LCD_RESET_MASK; // Configure PA2 as output
// CS pin - this seems to be ignored
// pPIOA->PIO_SODR = 1<<12; // Set PA2 to HIGH
// pPIOA->PIO_OER = 1<<12; // Configure PA2 as output
// Init SPI0
// Disable the following pins from PIO control (will be used instead by the SPI0 peripheral)
// BIT12 = PA12 -> SPI0_NPCS0 chip select
// BIT16 = PA16 -> SPI0_MISO Master In - Slave Out (not used in LCD interface)
// BIT17 = PA17 -> SPI0_MOSI Master Out - Slave In pin (Serial Data to LCD slave)
// BIT18 = PA18 -> SPI0_SPCK Serial Clock (to LCD slave)
pPIOA->PIO_PDR = (1<<12) | (1<<16) | (1<<17) | (1<<18);
pPIOA->PIO_ASR = (1<<12) | (1<<16) | (1<<17) | (1<<18);
pPIOA->PIO_BSR = 0;
//enable the clock of SPI
pPMC->PMC_PCER = 1 << AT91C_ID_SPI0;
// Fixed mode
pSPI->SPI_CR = 0x81; //SPI Enable, Software reset
pSPI->SPI_CR = 0x01; //SPI Enable
pSPI->SPI_MR = 0xE0011; //Master mode, fixed select, disable decoder, PCS=1110
pSPI->SPI_CSR[0] = 0x01010311; //9bit, CPOL=1, ClockPhase=0, SCLK = 48Mhz/3 = 16MHz
/* Display backlight control at 100% */
pwmRunning = FALSE;
palSetPad(IOPORT2, PIOB_LCD_BL);
break;
}
}
static inline void post_init_board(GDisplay *g) {
(void) g;
}
static inline void setpin_reset(GDisplay *g, bool_t state) {
(void) g;
if (state)
palClearPad(IOPORT1, PIOA_LCD_RESET);
else
palSetPad(IOPORT1, PIOA_LCD_RESET);
}
static inline void set_backlight(GDisplay *g, uint8_t percent) {
(void) g;
if (percent == 100) {
/* Turn the pin on - No PWM */
if (pwmRunning) {
pwmStop(&PWMD2);
pwmRunning = FALSE;
}
palSetPad(IOPORT2, PIOB_LCD_BL);
} else if (percent == 0) {
/* Turn the pin off - No PWM */
if (pwmRunning) {
pwmStop(&PWMD2);
pwmRunning = FALSE;
}
palClearPad(IOPORT2, PIOB_LCD_BL);
} else {
/* Use the PWM */
if (!pwmRunning) {
pwmStart(&PWMD2, &pwmcfg);
pwmRunning = TRUE;
}
pwmEnableChannel(&PWMD2, 0, PWM_VALUE(percent));
}
}
static inline void acquire_bus(GDisplay *g) {
(void) g;
}
static inline void release_bus(GDisplay *g) {
(void) g;
}
static inline void write_index(GDisplay *g, uint16_t index) {
(void) g;
// wait for the previous transfer to complete
while((pSPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0);
// send the command
pSPI->SPI_TDR = index & 0xFF;
}
static inline void write_data(GDisplay *g, uint16_t data) {
(void) g;
// wait for the previous transfer to complete
while((pSPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0);
// send the data
pSPI->SPI_TDR = data | 0x0100;
}
#endif /* _GDISP_LLD_BOARD_H */

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##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
# If you are using gcc V4.5.1 or older then replace -g with -ggdb -gstabs+
# For debugging you probably want -O0 rather than -O2
USE_OPT = -O0 -g -fomit-frame-pointer -mabi=apcs-gnu
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#
# Build global options
##############################################################################
##############################################################################
# Project, sources and paths
#
# Define project name here
PROJECT = ch
# Imported source files and paths for ChibiOS
CHIBIOS = ../ChibiOS
include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
# We define a non standard linker script here just to give us some more stack space
# LDSCRIPT= $(PORTLD)/AT91SAM7X256.ld
LDSCRIPT= linker.ld
# Imported source files and paths for uGFX
GFXLIB = ../uGFX
include $(GFXLIB)/gfx.mk
include $(GFXLIB)/boards/base/Olimex-SAM7EX256-GE8/board.mk
# Where is our source code - alter these for your project.
MYFILES = $(GFXLIB)/demos/modules/gdisp/basics
MYCSRC = $(MYFILES)/main.c
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
$(KERNSRC) \
$(TESTSRC) \
$(HALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
$(GFXSRC) \
$(MYCSRC)
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
$(GFXINC) \
$(MYFILES)
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = arm7tdmi
#TRGT = arm-elf-
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
# If you are using gcc V4.5.1 or older then add -ggdb -gstabs+ to the LD line
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra
#
# Compiler settings
##############################################################################
##############################################################################
# Start of default section
#
# List all default C defines here, like -D_DEBUG=1
DDEFS = $(GFXDEFS)
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS =
#
# End of default section
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
---
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes ChibiOS/RT, without being obliged to provide
the source code for any proprietary components. See the file exception.txt
for full details of how and when the exception can be applied.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread automatically. The application has
* then the responsibility to do one of the following:
* - Spawn a custom idle thread at priority @p IDLEPRIO.
* - Change the main() thread priority to @p IDLEPRIO then enter
* an endless loop. In this scenario the @p main() thread acts as
* the idle thread.
* .
* @note Unless an idle thread is spawned the @p main() thread must not
* enter a sleep state.
*/
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
#define CH_NO_IDLE_THREAD FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

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@ -0,0 +1,360 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
---
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes ChibiOS/RT, without being obliged to provide
the source code for any proprietary components. See the file exception.txt
for full details of how and when the exception can be applied.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM FALSE
#endif
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC TRUE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM TRUE
#define PWM_USE_PWM1 FALSE
#define PWM_USE_PWM2 TRUE
#define PWM_USE_PWM3 FALSE
#define PWM_USE_PWM4 FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI TRUE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Block size for MMC transfers.
*/
#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
#define MMC_SECTOR_SIZE 512
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/**
* @brief Number of positive insertion queries before generating the
* insertion event.
*/
#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
#define MMC_POLLING_INTERVAL 10
#endif
/**
* @brief Interval, in milliseconds, between insertion queries.
*/
#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
#define MMC_POLLING_DELAY 10
#endif
/**
* @brief Uses the SPI polled API for small data transfers.
* @details Polled transfers usually improve performance because it
* saves two context switches and interrupt servicing. Note
* that this option has no effect on large transfers which
* are always performed using DMAs/IRQs.
*/
#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

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@ -0,0 +1,105 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* AT91SAM7X256 memory setup.
*/
__und_stack_size__ = 0x0004;
__abt_stack_size__ = 0x0004;
__fiq_stack_size__ = 0x0010;
__irq_stack_size__ = 0x0080;
__svc_stack_size__ = 0x0004;
__sys_stack_size__ = 0x0400;
__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
MEMORY
{
flash : org = 0x100000, len = 256k
ram : org = 0x200020, len = 64k - 0x20
}
__ram_start__ = ORIGIN(ram);
__ram_size__ = LENGTH(ram);
__ram_end__ = __ram_start__ + __ram_size__;
SECTIONS
{
. = 0;
.text : ALIGN(16) SUBALIGN(16)
{
_text = .;
KEEP(*(vectors))
*(.text)
*(.text.*)
*(.rodata)
*(.rodata.*)
*(.glue_7t)
*(.glue_7)
*(.gcc*)
*(.ctors)
*(.dtors)
} > flash
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
__exidx_start = .;
.ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
__exidx_end = .;
.eh_frame_hdr : {*(.eh_frame_hdr)}
.eh_frame : ONLY_IF_RO {*(.eh_frame)}
. = ALIGN(4);
_etext = .;
_textdata = _etext;
.data :
{
_data = .;
*(.data)
. = ALIGN(4);
*(.data.*)
. = ALIGN(4);
*(.ramtext)
. = ALIGN(4);
_edata = .;
} > ram AT > flash
.bss :
{
_bss_start = .;
*(.bss)
. = ALIGN(4);
*(.bss.*)
. = ALIGN(4);
*(COMMON)
. = ALIGN(4);
_bss_end = .;
} > ram
}
PROVIDE(end = .);
_end = .;
__heap_base__ = _end;
__heap_end__ = __ram_end__ - __stacks_total_size__;
__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;

View File

@ -0,0 +1,71 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
---
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes ChibiOS/RT, without being obliged to provide
the source code for any proprietary components. See the file exception.txt
for full details of how and when the exception can be applied.
*/
/*
* AT91SAM7 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the driver
* is enabled in halconf.h.
*/
/*
* ADC driver system settings.
*/
/*
* CAN driver system settings.
*/
/*
* MAC driver system settings.
*/
#define MAC_TRANSMIT_BUFFERS 2
#define MAC_RECEIVE_BUFFERS 2
#define MAC_BUFFERS_SIZE 1518
#define EMAC_INTERRUPT_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 3)
/*
* PWM driver system settings.
*/
/*
* SERIAL driver system settings.
*/
#define USE_SAM7_USART0 TRUE
#define USE_SAM7_USART1 TRUE
#define SAM7_USART0_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
#define SAM7_USART1_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
/*
* SPI driver system settings.
*/
#define USE_AT91SAM7_SPI FALSE
#define AT91SAM7_SPI_USE_SPI0 TRUE
#define AT91SAM7_SPI_USE_SPI1 FALSE
#define AT91SAM7_SPI0_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 1)
#define AT91SAM7_SPI1_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 1)

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@ -0,0 +1,75 @@
# This is a script file for OpenOCD 0.7.0
#
# It is set up for the Olimex SAM7EX256 board using the Olimex Tiny-H JTAG adaptor.
#
# Assuming the current directory is your project directory containing this openocd.cfg file...
#
# To program your device:
#
# openocd -f openocd.cfg -c "Burn yourfile.bin" -c shutdown
#
# To debug your device:
#
# openocd
# (This will run openocd in gdb server debug mode. Leave it running in the background)
#
# gdb yourfile.elf
# (To start gdb. Then run the following commands in gdb...)
#
# target remote 127.0.0.1:3333
# monitor Debug
# stepi
# (This last stepi resynchronizes gdb).
#
# If you want to reprogram from within gdb:
#
# monitor Burn yourfile.bin
#
echo ""
echo "##### Loading debugger..."
source [find interface/olimex-arm-usb-tiny-h.cfg]
#source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
echo ""
echo "##### Loading CPU..."
source [find target/at91sam7x256.cfg]
echo ""
echo "##### Configuring..."
jtag_rclk 3000
arm7_9 dcc_downloads enable
arm7_9 fast_memory_access enable
# flash protect 0 0 1 off
#gdb_breakpoint_override hard
arm7_9 dbgrq enable
proc Debug { } {
echo ""
echo "##### Debug Session Connected..."
soft_reset_halt
reg pc 0x00100000
echo "Ready..."
}
proc Burn {file} {
echo ""
echo "##### Burning $file to device..."
halt
flash write_image erase unlock $file 0x00100000
reset
echo "Burning Complete!"
}
echo ""
echo "##### Leaving Configuration Mode..."
init
soft_reset_halt
$_TARGETNAME invoke-event reset-init
flash probe 0
flash banks
echo ""
echo "##### Waiting for debug connections..."

View File

@ -0,0 +1,3 @@
Copy these files into your own project directory and alter them to suite.
In particular look at the MYFILES definition and the MYCSRC definition.

View File

@ -6,15 +6,12 @@
*/
/**
* @file drivers/gadc/AT91SAM7/gadc_lld_board_olimexsam7ex256.h
* @file boards/base/Olimex-SAM7EX256-GE8/gadc_lld_board.h
* @brief GADC Driver config file.
*
* @addtogroup GADC
* @{
*/
#ifndef _GADC_LLD_BOARD_OLIMEXSAM7EX256_H
#define _GADC_LLD_BOARD_OLIMEXSAM7EX256_H
#ifndef _GADC_LLD_BOARD_H
#define _GADC_LLD_BOARD_H
#if GFX_USE_GADC
@ -28,6 +25,5 @@
#endif /* GFX_USE_GADC */
#endif /* _GADC_LLD_BOARD_OLIMEXSAM7EX256_H */
/** @} */
#endif /* _GADC_LLD_BOARD_H */

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@ -0,0 +1,33 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file boards/base/Olimex-SAM7EX256-GE8/gaudin_lld_board.h
* @brief GAUDIN Driver board config file for the Olimex SAM7EX256 board
*/
#ifndef _GAUDIN_LLD_BOARD_H
#define _GAUDIN_LLD_BOARD_H
/*===========================================================================*/
/* Audio inputs on this board */
/*===========================================================================*/
#define GAUDIN_NUM_CHANNELS 1
/**
* The list of audio channels and their uses
*/
#define GAUDIN_MICROPHONE 0
#ifdef GAUDIN_LLD_IMPLEMENTATION
static uint32_t gaudin_lld_physdevs[GAUDIN_NUM_CHANNELS] = {
GADC_PHYSDEV_MICROPHONE,
};
#endif
#endif /* _GAUDIN_LLD_BOARD_H */

View File

@ -0,0 +1,30 @@
/*
* This file is subject to the terms of the GFX License. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://ugfx.org/license.html
*/
/**
* @file boards/base/Olimex-SAM7EX256-GE8/ginput_lld_dial_board.h
* @brief GINPUT Dial Driver config file.
*/
#ifndef _GINPUT_LLD_DIAL_BOARD_H
#define _GINPUT_LLD_DIAL_BOARD_H
#if GFX_USE_GINPUT && GINPUT_NEED_DIAL
/*===========================================================================*/
/* Analogue devices on this board */
/*===========================================================================*/
#define GINPUT_DIAL_NUM_PORTS 1
#define GINPUT_DIAL_DEVICE0 GADC_PHYSDEV_DIAL
#define GINPUT_DIAL_POLL_PERIOD 200
#define GINPUT_DIAL_CYCLE_POLL FALSE
#endif /* GFX_USE_GINPUT && GINPUT_NEED_DIAL */
#endif /* _GINPUT_LLD_DIAL_BOARD_H */

View File

@ -6,12 +6,8 @@
*/
/**
* @file drivers/ginput/toggle/Pal/ginput_lld_toggle_board_olimexsam7ex256.h
* @file boards/base/Olimex-SAM7EX256-GE8/ginput_lld_toggle_board.h
* @brief GINPUT Toggle low level driver source for the ChibiOS PAL hardware on the Olimex SAM7EX256 board.
*
* @defgroup Toggle Toggle
* @ingroup GINPUT
* @{
*/
#ifndef _GDISP_LLD_TOGGLE_BOARD_H
@ -41,4 +37,4 @@
}
#endif /* _GDISP_LLD_TOGGLE_BOARD_H */
/** @} */

View File

@ -0,0 +1,14 @@
This directory contains the interface for the Olimex SAM7EX256 board
running under ChibiOS.
On this board uGFX currently supports:
- GDISP via the Nokia6610GE8 display
- GADC via the AT91SAM7 driver
- GINPUT-dials via the GADC driver
- GINPUT-toggles via the Pal driver
- GAUDIN via the GADC driver
Note there are two variants of this board - one with the GE8 display
and one with the GE12 display. This one is for the GE8 display.
There is an example Makefile and project in the examples directory.

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@ -0,0 +1,3 @@
GFXINC += $(GFXLIB)/boards/base/Win32
GFXSRC +=
include $(GFXLIB)/drivers/multiple/Win32/gdisp_lld.mk

View File

@ -0,0 +1,195 @@
#
# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
#
##############################################################################################
#
# On command line:
#
# make all = Create project
#
# make clean = Clean project files.
#
# To rebuild project do "make clean" and "make all".
#
##############################################################################################
# Start of default section
#
CC = i686-pc-mingw32-gcc -g
# Turn ChibiOS simimulator on or off - uGFX doesn't need it but you might for other purposes.
USE_CHIBIOS=no
# List all default C defines here, like -D_DEBUG=1
DDEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS = -lws2_32 -lgdi32
# Make sure this empty for now
SRC =
#
# End of default section
##############################################################################################
##############################################################################################
# Start of user section
#
# Define project name here
PROJECT = uGFX
# Imported source files and paths for uGFX
GFXLIB = ../uGFX
include $(GFXLIB)/gfx.mk
include $(GFXLIB)/boards/base/Win32/board.mk
# Imported source files and paths for ChibiOS
ifeq ($(USE_CHIBIOS),yes)
CHIBIOS = ../ChibiOS
include $(CHIBIOS)/boards/simulator/board.mk
include ${CHIBIOS}/os/hal/hal.mk
include ${CHIBIOS}/os/hal/platforms/Win32/platform.mk
include ${CHIBIOS}/os/ports/GCC/SIMIA32/port.mk
include ${CHIBIOS}/os/kernel/kernel.mk
DDEFS += -DSIMULATOR -DSHELL_USE_IPRINTF=FALSE
UINCDIR += $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC)
# ${CHIBIOS}/os/various
SRC += ${PORTSRC} \
${KERNSRC} \
${TESTSRC} \
${HALSRC} \
${PLATFORMSRC} \
$(BOARDSRC)
GFXDEFS += -DGFX_USE_OS_CHIBIOS=TRUE
else
GFXDEFS += -DGFX_USE_OS_WIN32=TRUE
endif
# Where is our source code - alter these for your project.
MYFILES = $(GFXLIB)/demos/modules/gdisp/basics
MYCSRC = $(MYFILES)/main.c
# List C source files here
SRC += ${GFXSRC} \
${MYCSRC}
# List all user C define here, like -D_DEBUG=1
UDEFS = ${GFXDEFS}
# List all user directories here
UINCDIR = ${GFXINC} \
${MYFILES}
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
# Define optimisation level here
#OPT = -ggdb -O2 -fomit-frame-pointer
OPT = -ggdb -O0 -fomit-frame-pointer
#
# End of user defines
##############################################################################################
# Output directory and files
ifeq ($(BUILDDIR),)
BUILDDIR = .build
endif
ifeq ($(BUILDDIR),.)
BUILDDIR = .build
endif
OBJDIR = $(BUILDDIR)/obj
LSTDIR = $(BUILDDIR)/lst
MAPDIR = $(BUILDDIR)/map
INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
DEFS = $(DDEFS) $(UDEFS)
ADEFS = $(DADEFS) $(UADEFS)
COBJ = $(addprefix $(OBJDIR)/, $(SRC:.c=.o))
AOBJ = $(addprefix $(OBJDIR)/, $(ASRC:.s=.o))
OBJS = $(AOBJ) $(COBJ)
LIBS = $(DLIBS) $(ULIBS)
LDFLAGS = -Wl,-Map=$(MAPDIR)/$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
CPFLAGS = $(OPT) -Wall -Wextra -Wstrict-prototypes -fverbose-asm -Wa,-alms=$(LSTDIR)/$(<:.c=.lst) $(DEFS)
# Generate dependency information
CPFLAGS += -MD -MP -MF .dep/$(@F).d
#
# makefile rules
#
all: $(BUILDDIR) $(OBJS) $(BUILDDIR)/$(PROJECT).exe MAKE_ALL_RULE_HOOK
MAKE_ALL_RULE_HOOK:
$(BUILDDIR) $(OBJDIR) $(LSTDIR):
mkdir -p $(OBJDIR)
mkdir -p $(LSTDIR)
mkdir -p $(MAPDIR)
ifneq ($(USE_VERBOSE_COMPILE),yes)
@echo Compiler Options - $(CC) -c $(CPFLAGS) -I. $(INCDIR) main.c -o $(OBJDIR)/main.o
@echo
endif
$(OBJDIR)/%.o : %.c
@mkdir -p $(dir $@)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
$(CC) -c $(CPFLAGS) -I. $(INCDIR) $< -o $@
else
@echo Compiling $<
@$(CC) -c $(CPFLAGS) -I. $(INCDIR) $< -o $@
endif
$(OBJDIR)/%.o : %.s
@mkdir -p $(dir $@)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
$(AS) -c $(ASFLAGS) -I. $(INCDIR) $< -o $@
else
@echo Compiling $<
@$(AS) -c $(ASFLAGS) -I. $(INCDIR) $< -o $@
endif
%.exe: $(OBJS)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
$(CC) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
else
@echo Linking $@
@$(CC) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
endif
gcov:
-mkdir gcov
$(COV) -u $(subst /,\,$(SRC))
-mv *.gcov ./gcov
clean:
-rm -fR .build
-rm -fR .dep
#
# Include the dependency files, should be the last of the makefile
#
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# *** EOF ***

View File

@ -0,0 +1,536 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0x20000
#endif
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread automatically. The application has
* then the responsibility to do one of the following:
* - Spawn a custom idle thread at priority @p IDLEPRIO.
* - Change the main() thread priority to @p IDLEPRIO then enter
* an endless loop. In this scenario the @p main() thread acts as
* the idle thread.
* .
* @note Unless an idle thread is spawned the @p main() thread must not
* enter a sleep state.
*/
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
#define CH_NO_IDLE_THREAD FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

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@ -0,0 +1,342 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
/*#include "mcuconf.h"*/
/**
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM FALSE
#endif
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Block size for MMC transfers.
*/
#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
#define MMC_SECTOR_SIZE 512
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/**
* @brief Number of positive insertion queries before generating the
* insertion event.
*/
#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
#define MMC_POLLING_INTERVAL 10
#endif
/**
* @brief Interval, in milliseconds, between insertion queries.
*/
#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
#define MMC_POLLING_DELAY 10
#endif
/**
* @brief Uses the SPI polled API for small data transfers.
* @details Polled transfers usually improve performance because it
* saves two context switches and interrupt servicing. Note
* that this option has no effect on large transfers which
* are always performed using DMAs/IRQs.
*/
#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

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@ -0,0 +1,9 @@
Copy these files into your own project directory and alter them to suite.
Notes:
1/ This makefile uses the MINGW compiler tool chain and was run using the cygwin make.
2/ At the top of the Makefile is the define USE_CHIBIOS. Win32 can build uGFX for either
native Win32 (the default) or for the ChibiOS simulator.
3/ The files chconf.h and halconf.h are only needed if compiling for the ChibiOS simulator.
4/ Look at the MYFILES definition and the MYCSRC definition.

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@ -0,0 +1,9 @@
This directory contains the interface for Win32
running either native Win32 or under the ChibiOS simulator.
On this board uGFX currently supports:
- GDISP via the Win32 driver
- GINPUT-touch via the Win32 driver
- GINPUT-toggles via the Win32 driver
There is an example Makefile and project in the examples directory.

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@ -1,41 +0,0 @@
/**
* This file has a different license to the rest of the GFX system.
* You can copy, modify and distribute this file as you see fit.
* You do not need to publish your source modifications to this file.
* The only thing you are not permitted to do is to relicense it
* under a different license.
*/
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
#define GFX_USE_OS_CHIBIOS TRUE
#define GFX_USE_OS_WIN32 FALSE
#define GFX_USE_OS_POSIX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
/* Features for the GDISP sub-system. */
#define GDISP_NEED_VALIDATION FALSE
#define GDISP_NEED_CLIP FALSE
#define GDISP_NEED_TEXT FALSE
#define GDISP_NEED_CIRCLE FALSE
#define GDISP_NEED_ELLIPSE FALSE
#define GDISP_NEED_ARC FALSE
#define GDISP_NEED_SCROLL FALSE
#define GDISP_NEED_PIXELREAD FALSE
#define GDISP_NEED_CONTROL FALSE
#define GDISP_NEED_MULTITHREAD FALSE
#define GDISP_NEED_ASYNC FALSE
#define GDISP_NEED_MSGAPI FALSE
/* Builtin Fonts */
#define GDISP_INCLUDE_FONT_SMALL FALSE
#define GDISP_INCLUDE_FONT_LARGER FALSE
#define GDISP_INCLUDE_FONT_UI1 FALSE
#define GDISP_INCLUDE_FONT_UI2 FALSE
#define GDISP_INCLUDE_FONT_LARGENUMBERS FALSE
#endif /* _GFXCONF_H */

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@ -1,109 +0,0 @@
/* Derived from the 2011 IOCCC submission by peter.eastman@gmail.com
* http://www.ioccc.org/2011/eastman/eastman.c
* --
* Public Domain -- but you're looking at this for ideas of techniques
* and methods, not trying to cut&paste an entire application, anyway.
* --
* When you need to blit an entire screenfull of data to an LCD
* display, the basic idea is to exploit the auto-increment feature of
* the display controller when it writes to screen memory. You start
* by resetting the 'cursor' to the 0,0 position, and then stream
* width*height pixels out.
* --
* Chris Baird,, <cjb@brushtail.apana.org.au> April 2013
*
* Modified Andrew Hannam (inmarket) 2013-04-29 New GFX support
*/
#include <math.h>
#include "gfx.h"
#include "ssd2119.h"
#define Lightgrey (HTML2COLOR(0xC0C0C0))
#define Midgrey (HTML2COLOR(0x606060))
#define Darkgrey (HTML2COLOR(0x303030))
/* ---------------------------------------------------------------------- */
/* As of early April 2013, the /gfx extension tries to keep the low-level
* stuff away from our filthy paws. So Code Duplication.
* (Possibly to be replaced with gdispStartStream(), gdispWriteStream()
* and gdispStopStream() in the future.)
*/
#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* DC = 0 */
#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* DC = 1 */
inline void write_index (uint16_t index) { GDISP_REG = index; }
inline void write_data (uint16_t data) { GDISP_RAM = data; }
#define write_reg(reg, data) { write_index(reg); write_data(data); }
void reset_cursor (void)
{
write_reg (SSD2119_REG_X_RAM_ADDR, 0);
write_reg (SSD2119_REG_Y_RAM_ADDR, 0);
}
#define StartStream() { write_index (SSD2119_REG_RAM_DATA); }
#define WriteStream(x) { write_data (x); }
#define StopStream() /* NOP */
/* ---------------------------------------------------------------------- */
void main (void)
{
uint16_t xx, yy, colour;
gfxInit();
uint16_t width = (uint16_t)gdispGetWidth();
uint16_t height = (uint16_t)gdispGetHeight();
float i=height/5+height%2+1, floorstart=height/5-1, spherespin=0.0,
l=width/2, m=height/4, n=.01*width, o=0.0, rotspeed=0.1, h, f, g;
while (TRUE)
{
reset_cursor ();
StartStream ();
for (xx=yy=0;
h = (m-yy)/i, f=-.3*(g=(l-xx)/i)+.954*h, yy<height;
yy += (xx = ++xx%width)==0 )
{
if (g*g < 1-h*h) /* if inside the ball */
if (((int)(9-spherespin+(.954*g+.3*h)/sqrtf(1-f*f))+(int)(2+f*2))%2==0)
colour = Red;
else
colour = White;
else
{
if (xx<floorstart || xx>width-floorstart)
colour = Darkgrey; /* side wall */
else
colour = Lightgrey; /* back wall */
if (yy > height-floorstart)
if (xx < height-yy || height-yy > width-xx) /* floor */
colour = Darkgrey;
else
colour = Midgrey;
if (g*(g+.6)+.09+h*h < 1)
colour >>= 1; /* ball shadow; make it darker */
}
WriteStream (colour); /* pixel to the LCD */
}
StopStream();
spherespin += rotspeed;
m += o;
o = m > height-1.75*floorstart ? -.04*height : o+.002*height;
n = (l+=n)<i || l>width-i ? rotspeed=-rotspeed,-n : n;
}
}
/* ---------------------------------------------------------------------- */

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@ -9,10 +9,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
#define GFX_USE_OS_CHIBIOS TRUE
#define GFX_USE_OS_WIN32 FALSE
#define GFX_USE_OS_POSIX FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

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@ -9,10 +9,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* GFX operating system to use */
#define GFX_USE_OS_CHIBIOS TRUE
//#define GFX_USE_OS_WIN32 TRUE
//#define GFX_USE_OS_POSIX TRUE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

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@ -14,6 +14,12 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX subsystems to turn on */
#define GFX_USE_GDISP FALSE
#define GFX_USE_TDISP TRUE
@ -130,7 +136,6 @@
/* Optional Low Level Driver Definitions */
/*
#define GDISP_USE_CUSTOM_BOARD FALSE
#define GDISP_SCREEN_WIDTH 320
#define GDISP_SCREEN_HEIGHT 240
#define GDISP_USE_FSMC

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@ -30,26 +30,16 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
#define GFX_USE_OS_CHIBIOS TRUE
#define GFX_USE_OS_WIN32 FALSE
#define GFX_USE_OS_POSIX FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
/* Features for the GDISP sub-system. */
#define GDISP_NEED_VALIDATION TRUE
#define GDISP_NEED_CLIP FALSE
#define GDISP_NEED_TEXT FALSE
#define GDISP_NEED_CIRCLE FALSE
#define GDISP_NEED_ELLIPSE FALSE
#define GDISP_NEED_ARC FALSE
#define GDISP_NEED_SCROLL FALSE
#define GDISP_NEED_PIXELREAD FALSE
#define GDISP_NEED_CONTROL FALSE
#define GDISP_NEED_MULTITHREAD FALSE
#define GDISP_NEED_ASYNC FALSE
#define GDISP_NEED_MSGAPI FALSE
#endif /* _GFXCONF_H */

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@ -30,14 +30,14 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
//#define GFX_USE_OS_CHIBIOS TRUE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_POSIX FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
#define GFX_USE_GWIN FALSE
#define GFX_USE_GEVENT TRUE
#define GFX_USE_GTIMER TRUE
#define GFX_USE_GINPUT TRUE
@ -47,14 +47,8 @@
#define GDISP_NEED_CLIP TRUE
#define GDISP_NEED_TEXT TRUE
#define GDISP_NEED_CIRCLE TRUE
#define GDISP_NEED_ELLIPSE FALSE
#define GDISP_NEED_ARC FALSE
#define GDISP_NEED_SCROLL FALSE
#define GDISP_NEED_PIXELREAD FALSE
#define GDISP_NEED_CONTROL TRUE
#define GDISP_NEED_MULTITHREAD TRUE
#define GDISP_NEED_ASYNC FALSE
#define GDISP_NEED_MSGAPI FALSE
/* Builtin Fonts */
#define GDISP_INCLUDE_FONT_DEJAVUSANS12_AA TRUE

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@ -30,10 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
#define GFX_USE_OS_CHIBIOS TRUE
#define GFX_USE_OS_WIN32 FALSE
#define GFX_USE_OS_POSIX FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
@ -42,22 +43,10 @@
#define GDISP_NEED_VALIDATION FALSE
#define GDISP_NEED_CLIP FALSE
#define GDISP_NEED_TEXT TRUE
#define GDISP_NEED_CIRCLE FALSE
#define GDISP_NEED_ELLIPSE FALSE
#define GDISP_NEED_ARC FALSE
#define GDISP_NEED_SCROLL FALSE
#define GDISP_NEED_PIXELREAD FALSE
#define GDISP_NEED_CONTROL TRUE
#define GDISP_NEED_MULTITHREAD FALSE
#define GDISP_NEED_ASYNC FALSE
#define GDISP_NEED_MSGAPI FALSE
/* Builtin Fonts */
#define GDISP_INCLUDE_FONT_SMALL FALSE
#define GDISP_INCLUDE_FONT_LARGER FALSE
#define GDISP_INCLUDE_FONT_UI1 FALSE
#define GDISP_INCLUDE_FONT_UI2 TRUE
#define GDISP_INCLUDE_FONT_LARGENUMBERS FALSE
#endif /* _GFXCONF_H */

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@ -35,96 +35,29 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
#define GFX_USE_OS_CHIBIOS TRUE
#define GFX_USE_OS_WIN32 FALSE
#define GFX_USE_OS_POSIX FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
#define GFX_USE_TDISP FALSE
#define GFX_USE_GWIN TRUE
#define GFX_USE_GEVENT FALSE
#define GFX_USE_GTIMER TRUE
#define GFX_USE_GINPUT FALSE
#define GFX_USE_GADC TRUE
#define GFX_USE_GAUDIN FALSE
#define GFX_USE_GAUDOUT FALSE
#define GFX_USE_GMISC FALSE
/* Features for the GDISP sub-system. */
#define GDISP_NEED_VALIDATION TRUE
#define GDISP_NEED_CLIP TRUE
#define GDISP_NEED_TEXT TRUE
#define GDISP_NEED_CIRCLE FALSE
#define GDISP_NEED_ELLIPSE FALSE
#define GDISP_NEED_ARC FALSE
#define GDISP_NEED_SCROLL FALSE
#define GDISP_NEED_PIXELREAD FALSE
#define GDISP_NEED_CONTROL TRUE
#define GDISP_NEED_MULTITHREAD TRUE
#define GDISP_NEED_ASYNC FALSE
#define GDISP_NEED_MSGAPI FALSE
/* GDISP - builtin fonts */
#define GDISP_INCLUDE_FONT_SMALL FALSE
#define GDISP_INCLUDE_FONT_LARGER FALSE
#define GDISP_INCLUDE_FONT_UI1 FALSE
#define GDISP_INCLUDE_FONT_UI2 TRUE
#define GDISP_INCLUDE_FONT_LARGENUMBERS FALSE
/* Features for the TDISP subsystem. */
#define TDISP_NEED_MULTITHREAD FALSE
/* Features for the GWIN sub-system. */
#define GWIN_NEED_BUTTON FALSE
#define GWIN_NEED_CONSOLE TRUE
#define GWIN_NEED_GRAPH FALSE
/* Features for the GEVENT sub-system. */
#define GEVENT_ASSERT_NO_RESOURCE FALSE
/* Features for the GTIMER sub-system. */
/* NONE */
/* Features for the GINPUT sub-system. */
#define GINPUT_NEED_MOUSE FALSE
#define GINPUT_NEED_KEYBOARD FALSE
#define GINPUT_NEED_TOGGLE FALSE
#define GINPUT_NEED_DIAL FALSE
/* Features for the GADC sub-system. */
/* NONE */
/* Features for the GAUDIN sub-system. */
/* NONE */
/* Features for the GAUDOUT sub-system. */
/* NONE */
/* Features for the GMISC sub-system. */
#define GMISC_NEED_ARRAYOPS FALSE
/* Optional Parameters for various sub-systems */
/*
#define GDISP_MAX_FONT_HEIGHT 16
#define GEVENT_MAXIMUM_SIZE 32
#define GEVENT_MAX_SOURCE_LISTENERS 32
#define GTIMER_THREAD_WORKAREA_SIZE 512
#define GADC_MAX_LOWSPEED_DEVICES 4
*/
/* Optional Low Level Driver Definitions */
/*
#define GDISP_USE_CUSTOM_BOARD FALSE
#define GDISP_SCREEN_WIDTH 320
#define GDISP_SCREEN_HEIGHT 240
#define GDISP_USE_FSMC
#define GDISP_USE_GPIO
#define GDISP_VMT_NAME1(x) x##YourDriver1
#define GDISP_VMT_NAME2(x) x##YourDriver2
#define TDISP_COLUMNS 16
#define TDISP_ROWS 2
*/
#endif /* _GFXCONF_H */

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@ -35,96 +35,22 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
#define GFX_USE_OS_CHIBIOS TRUE
#define GFX_USE_OS_WIN32 FALSE
#define GFX_USE_OS_POSIX FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
#define GFX_USE_TDISP FALSE
#define GFX_USE_GWIN TRUE
#define GFX_USE_GEVENT FALSE
#define GFX_USE_GTIMER TRUE
#define GFX_USE_GINPUT FALSE
#define GFX_USE_GADC TRUE
#define GFX_USE_GAUDIN TRUE
#define GFX_USE_GAUDOUT FALSE
#define GFX_USE_GMISC FALSE
/* Features for the GDISP sub-system. */
#define GDISP_NEED_VALIDATION TRUE
#define GDISP_NEED_CLIP TRUE
#define GDISP_NEED_TEXT FALSE
#define GDISP_NEED_CIRCLE FALSE
#define GDISP_NEED_ELLIPSE FALSE
#define GDISP_NEED_ARC FALSE
#define GDISP_NEED_SCROLL FALSE
#define GDISP_NEED_PIXELREAD FALSE
#define GDISP_NEED_CONTROL FALSE
#define GDISP_NEED_MULTITHREAD TRUE
#define GDISP_NEED_ASYNC FALSE
#define GDISP_NEED_MSGAPI FALSE
/* GDISP - builtin fonts */
#define GDISP_INCLUDE_FONT_SMALL FALSE
#define GDISP_INCLUDE_FONT_LARGER FALSE
#define GDISP_INCLUDE_FONT_UI1 FALSE
#define GDISP_INCLUDE_FONT_UI2 FALSE
#define GDISP_INCLUDE_FONT_LARGENUMBERS FALSE
/* Features for the TDISP subsystem. */
#define TDISP_NEED_MULTITHREAD FALSE
/* Features for the GWIN sub-system. */
#define GWIN_NEED_BUTTON FALSE
#define GWIN_NEED_CONSOLE FALSE
#define GWIN_NEED_GRAPH FALSE
/* Features for the GEVENT sub-system. */
#define GEVENT_ASSERT_NO_RESOURCE FALSE
/* Features for the GTIMER sub-system. */
/* NONE */
/* Features for the GINPUT sub-system. */
#define GINPUT_NEED_MOUSE FALSE
#define GINPUT_NEED_KEYBOARD FALSE
#define GINPUT_NEED_TOGGLE FALSE
#define GINPUT_NEED_DIAL FALSE
/* Features for the GADC sub-system. */
/* NONE */
/* Features for the GAUDIN sub-system. */
/* NONE */
/* Features for the GAUDOUT sub-system. */
/* NONE */
/* Features for the GMISC sub-system. */
#define GMISC_NEED_ARRAYOPS FALSE
/* Optional Parameters for various sub-systems */
/*
#define GDISP_MAX_FONT_HEIGHT 16
#define GEVENT_MAXIMUM_SIZE 32
#define GEVENT_MAX_SOURCE_LISTENERS 32
#define GTIMER_THREAD_WORKAREA_SIZE 512
#define GADC_MAX_LOWSPEED_DEVICES 4
*/
/* Optional Low Level Driver Definitions */
/*
#define GDISP_USE_CUSTOM_BOARD FALSE
#define GDISP_SCREEN_WIDTH 320
#define GDISP_SCREEN_HEIGHT 240
#define GDISP_USE_FSMC
#define GDISP_USE_GPIO
#define GDISP_VMT_NAME1(x) x##YourDriver1
#define GDISP_VMT_NAME2(x) x##YourDriver2
#define TDISP_COLUMNS 16
#define TDISP_ROWS 2
*/
#endif /* _GFXCONF_H */

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@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

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@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

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@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
@ -43,18 +43,13 @@
#define GDISP_NEED_VALIDATION TRUE
#define GDISP_NEED_CLIP TRUE
#define GDISP_NEED_TEXT TRUE
#define GDISP_NEED_CIRCLE FALSE
#define GDISP_NEED_ELLIPSE FALSE
#define GDISP_NEED_ARC FALSE
#define GDISP_NEED_SCROLL FALSE
#define GDISP_NEED_PIXELREAD FALSE
#define GDISP_NEED_CONTROL FALSE
#define GDISP_NEED_MULTITHREAD FALSE
#define GDISP_NEED_ASYNC FALSE
#define GDISP_NEED_MSGAPI FALSE
#define GDISP_NEED_ANTIALIAS TRUE
/* GDISP - fonts to include */
#define GDISP_INCLUDE_USER_FONTS TRUE
#define GDISP_INCLUDE_FONT_UI1 FALSE
#define GDISP_INCLUDE_FONT_UI2 TRUE
#define GDISP_INCLUDE_FONT_LARGENUMBERS FALSE
#define GDISP_INCLUDE_FONT_DEJAVUSANS10 TRUE
#define GDISP_INCLUDE_FONT_DEJAVUSANS12 FALSE
#define GDISP_INCLUDE_FONT_DEJAVUSANS16 FALSE
@ -70,9 +65,6 @@
#define GDISP_INCLUDE_FONT_DEJAVUSANS32_AA FALSE
#define GDISP_INCLUDE_FONT_DEJAVUSANSBOLD12_AA FALSE
#define GDISP_INCLUDE_FONT_UI1 FALSE
#define GDISP_INCLUDE_FONT_UI2 TRUE
#define GDISP_INCLUDE_FONT_LARGENUMBERS FALSE
#endif /* _GFXCONF_H */

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@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX subsystems to turn on */
#define GFX_USE_GDISP TRUE

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@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

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@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

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@ -0,0 +1,80 @@
/*
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the <organization> nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _GFXCONF_H
#define _GFXCONF_H
//* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
/* Features for the GDISP sub-system. */
#define GDISP_NEED_VALIDATION TRUE
#define GDISP_NEED_CLIP TRUE
#define GDISP_NEED_TEXT TRUE
#define GDISP_INCLUDE_FONT_UI2 TRUE
#define GDISP_TOTAL_DISPLAYS 2
/* Uncomment the following lines if you want to use multiple displays on
* different controllers.
*
* Change the definitions to suit your hardware.
* Currently all controllers must use the same pixel format.
*
* Remember that GDISP_TOTAL_DISPLAYS above must match the **Total**
* number of displays in your system across all controllers.
*
* Optionally, you can also specify hardware characteristics that are common to
* all your controllers. This significantly improves code and speed efficiency
* as the program doesn't have to detect the hardware method to use on each call.
*
* Hardware definitions can be set to:
* - TRUE - all controllers support this routine
* - FALSE - no controllers support this routine
* - if not specified then the code auto-detects the hardware.
*
* e.g
* #define GDISP_HARDWARE_STREAM_WRITE FALSE
* #define GDISP_HARDWARE_STREAM_READ FALSE
* #define GDISP_HARDWARE_DRAWPIXEL TRUE
* #define GDISP_HARDWARE_FILLS TRUE
*/
//#define GDISP_TOTAL_CONTROLLERS 2
//#define GDISP_CONTROLLER_LIST GDISPVMT_Win32, GDISPVMT_Win32
//#define GDISP_CONTROLLER_DISPLAYS 1, 1
//#define GDISP_PIXELFORMAT GDISP_PIXELFORMAT_RGB888
#endif /* _GFXCONF_H */

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@ -0,0 +1,122 @@
/*
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the <organization> nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "gfx.h"
#include <stdio.h>
/*
* This demo demonstrates two ways to talk to multiple displays.
*
* Method 1 is the preferred way however Method 1 would be useful
* when quickly converting existing single display applications.
*
* Note you can combine the methods using method 2 for the first display
* and method 1 for any extra displays.
*/
#define USE_METHOD_1 FALSE
#if USE_METHOD_1
int main(void) {
coord_t width, height;
coord_t display, i, j;
font_t f;
GDisplay *g;
char buf[16];
/* Initialize and clear the display */
gfxInit();
/* Get a font to write with */
f = gdispOpenFont("*");
/* Cycle through each display */
for(display = 0; display < GDISP_TOTAL_DISPLAYS; display++) {
// Get the specified display
g = gdispGetDisplay(display);
// Get the screen size
width = gdispGGetWidth(g);
height = gdispGGetHeight(g);
/* Draw draw draw */
gdispGDrawBox(g, 10, 10, width/2, height/2, Yellow);
sprintf(buf, "Display %u", display);
gdispGFillStringBox(g, width/2, height/2, width/2-10, height/2-10, buf, f, White, Blue, justifyCenter);
gdispGDrawLine(g, 5, 30, width-50, height-40, Red);
for(i = 5, j = 0; i < width && j < height; i += 7, j += i/20)
gdispGDrawPixel(g, i, j, White);
}
while(TRUE) {
gfxSleepMilliseconds(500);
}
}
#else
int main(void) {
coord_t width, height;
coord_t display, i, j;
font_t f;
char buf[16];
/* Initialize and clear the display */
gfxInit();
/* Get a font to write with */
f = gdispOpenFont("*");
/* Cycle through each display */
for(display = 0; display < GDISP_TOTAL_DISPLAYS; display++) {
// Set the default display to the specified display
gdispSetDisplay(gdispGetDisplay(display));
// Get the screen size
width = gdispGetWidth();
height = gdispGetHeight();
/* Draw draw draw */
gdispDrawBox(10, 10, width/2, height/2, Yellow);
sprintf(buf, "Display %u", display);
gdispFillStringBox(width/2, height/2, width/2-10, height/2-10, buf, f, White, Blue, justifyCenter);
gdispDrawLine(5, 30, width-50, height-40, Red);
for(i = 5, j = 0; i < width && j < height; i += 7, j += i/20)
gdispDrawPixel(i, j, White);
}
while(TRUE) {
gfxSleepMilliseconds(500);
}
}
#endif

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@ -0,0 +1,31 @@
/**
* This file has a different license to the rest of the GFX system.
* You can copy, modify and distribute this file as you see fit.
* You do not need to publish your source modifications to this file.
* The only thing you are not permitted to do is to relicense it
* under a different license.
*/
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
#define GFX_USE_GMISC TRUE
/* Features for the GDISP sub-system. */
#define GDISP_NEED_VALIDATION TRUE
#define GDISP_NEED_STREAMING TRUE
#define GFX_USE_GMISC TRUE
#define GMISC_NEED_INVSQRT TRUE
//#define GMISC_INVSQRT_MIXED_ENDIAN TRUE
//#define GMISC_INVSQRT_REAL_SLOW TRUE
#endif /* _GFXCONF_H */

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@ -0,0 +1,142 @@
/*
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
* Derived from the 2011 IOCCC submission by peter.eastman@gmail.com
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the <organization> nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "gfx.h"
#include <math.h>
/**
* NOTE:
*
* This demo uses floating point operations. Don't expect it to work with any
* speed unless your processor has an FPU.
*
* If you see garbage inside the ball as it is running rather than the red and yellow
* checkerboard pattern then the fast invsqrt() function in GMISC does not work on
* your processor.
*
* You can modify the implementation of invsqrt() by firstly defining
* #define GMISC_INVSQRT_MIXED_ENDIAN TRUE
* in your gfxconf.h file.
*
* If it still doesn't work then instead define
* #define GMISC_INVSQRT_REAL_SLOW TRUE
* in your gfxconf.h file. This should always work although it will probably be slow.
*/
#define BALLCOLOR1 Red
#define BALLCOLOR2 Yellow
#define WALLCOLOR HTML2COLOR(0x303030)
#define BACKCOLOR HTML2COLOR(0xC0C0C0)
#define FLOORCOLOR HTML2COLOR(0x606060)
#define SHADOWALPHA (255-255*0.2)
int main(void) {
coord_t width, height, x, y, radius, ballx, bally, dx, floor;
coord_t minx, miny, maxx, maxy;
coord_t ballcx, ballcy;
color_t colour;
float ii, spin, dy, spinspeed, h, f, g;
gfxInit();
#if GDISP_NEED_CONTROL
gdispSetOrientation(GDISP_ROTATE_90);
#endif
width = gdispGetWidth();
height = gdispGetHeight();
radius=height/5+height%2+1; // The ball radius
ii = 1.0/radius; // radius as easy math
floor=height/5-1; // floor position
spin=0.0; // current spin angle on the ball
spinspeed=0.1; // current spin speed of the ball
ballx=width/2; // ball x position (relative to the ball center)
bally=height/4; // ball y position (relative to the ball center)
dx=.01*width; // motion in the x axis
dy=0.0; // motion in the y axis
ballcx = 12*radius/5; // ball x diameter including the shadow
ballcy = 21*radius/10; // ball y diameter including the shadow
minx = miny = 0; maxx = width; maxy = height; // The clipping window for this frame.
while(1) {
// Draw one frame
gdispStreamStart(minx, miny, maxx-minx, maxy-miny);
for (y=miny; h = (bally-y)*ii, y<maxy; y++) {
for (x=minx; x < maxx; x++) {
g=(ballx-x)*ii;
f=-.3*g+.954*h;
if (g*g < 1-h*h) {
/* The inside of the ball */
if ((((int)(9-spin+(.954*g+.3*h)*invsqrt(1-f*f))+(int)(2+f*2))&1))
colour = BALLCOLOR1;
else
colour = BALLCOLOR2;
} else {
// The background (walls and floor)
if (y > height-floor) {
if (x < height-y || height-y > width-x)
colour = WALLCOLOR;
else
colour = FLOORCOLOR;
} else if (x<floor || x>width-floor)
colour = WALLCOLOR;
else
colour = BACKCOLOR;
// The ball shadow is darker
if (g*(g+.4)+h*(h+.1) < 1)
colour = gdispBlendColor(colour, Black, SHADOWALPHA);
}
gdispStreamColor(colour); /* pixel to the LCD */
}
}
gdispStreamStop();
// Force a display update if the controller supports it
gdispFlush();
// Calculate the new frame size (note this is a drawing optimisation only)
minx = ballx - radius; miny = bally - radius;
maxx = minx + ballcx; maxy = miny + ballcy;
if (dx > 0) maxx += dx; else minx += dx;
if (dy > 0) maxy += dy; else miny += dy;
if (minx < 0) minx = 0;
if (maxx > width) maxx = width;
if (miny < 0) miny = 0;
if (maxy > height) maxy = height;
// Motion
spin += spinspeed;
ballx += dx; bally += dy;
dx = ballx < radius || ballx > width-radius ? spinspeed=-spinspeed,-dx : dx;
dy = bally > height-1.75*floor ? -.04*height : dy+.002*height;
}
}

View File

@ -30,10 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
#define GFX_USE_OS_CHIBIOS TRUE
#define GFX_USE_OS_WIN32 FALSE
#define GFX_USE_OS_POSIX FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE
@ -46,22 +47,10 @@
#define GDISP_NEED_VALIDATION TRUE
#define GDISP_NEED_CLIP TRUE
#define GDISP_NEED_TEXT TRUE
#define GDISP_NEED_CIRCLE FALSE
#define GDISP_NEED_ELLIPSE FALSE
#define GDISP_NEED_ARC FALSE
#define GDISP_NEED_SCROLL FALSE
#define GDISP_NEED_PIXELREAD FALSE
#define GDISP_NEED_CONTROL FALSE
#define GDISP_NEED_MULTITHREAD TRUE
#define GDISP_NEED_ASYNC FALSE
#define GDISP_NEED_MSGAPI FALSE
/* Builtin Fonts */
#define GDISP_INCLUDE_FONT_SMALL FALSE
#define GDISP_INCLUDE_FONT_LARGER FALSE
#define GDISP_INCLUDE_FONT_UI1 FALSE
#define GDISP_INCLUDE_FONT_UI2 TRUE
#define GDISP_INCLUDE_FONT_LARGENUMBERS FALSE
/* Features for the GWIN sub-system. */
#define GWIN_NEED_BUTTON TRUE

View File

@ -30,10 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use - one of these must be defined */
#define GFX_USE_OS_CHIBIOS TRUE
#define GFX_USE_OS_WIN32 FALSE
#define GFX_USE_OS_POSIX FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GTIMER TRUE

View File

@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

View File

@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

View File

@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

View File

@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

View File

@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

View File

@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

View File

@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

View File

@ -30,11 +30,11 @@
#ifndef _GFXCONF_H
#define _GFXCONF_H
/* The operating system to use. One of these must be defined - perferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
/* The operating system to use. One of these must be defined - preferably in your Makefile */
//#define GFX_USE_OS_CHIBIOS FALSE
//#define GFX_USE_OS_WIN32 FALSE
//#define GFX_USE_OS_LINUX FALSE
//#define GFX_USE_OS_OSX FALSE
//#define GFX_USE_OS_OSX FALSE
/* GFX sub-systems to turn on */
#define GFX_USE_GDISP TRUE

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