SSD1289 driver updated for multiple display support
inmarket
parent
4c29822a75
commit
e1744e59ab
|
|
@ -0,0 +1,107 @@
|
|||
/*
|
||||
* This file is subject to the terms of the GFX License. If a copy of
|
||||
* the license was not distributed with this file, you can obtain one at:
|
||||
*
|
||||
* http://ugfx.org/license.html
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drivers/gdisp/SSD1289/board_SSD1289_firebullstm32f103.h
|
||||
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
|
||||
*/
|
||||
|
||||
#ifndef _GDISP_LLD_BOARD_H
|
||||
#define _GDISP_LLD_BOARD_H
|
||||
|
||||
// For a multiple display configuration we would put all this in a structure and then
|
||||
// set g->priv to that structure.
|
||||
#define SET_CS palSetPad(GPIOD, 12);
|
||||
#define CLR_CS palClearPad(GPIOD, 12);
|
||||
#define SET_RS palSetPad(GPIOD, 13);
|
||||
#define CLR_RS palClearPad(GPIOD, 13);
|
||||
#define SET_WR palSetPad(GPIOD, 14);
|
||||
#define CLR_WR palClearPad(GPIOD, 14);
|
||||
#define SET_RD palSetPad(GPIOD, 15);
|
||||
#define CLR_RD palClearPad(GPIOD, 15);
|
||||
|
||||
static inline void init_board(GDisplay *g, unsigned display) {
|
||||
|
||||
// As we are not using multiple displays we set g->priv to NULL as we don't use it.
|
||||
g->priv = 0;
|
||||
|
||||
if (display == 0) {
|
||||
|
||||
/**
|
||||
* Set up for Display 0
|
||||
*/
|
||||
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOD, 12, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOD, 15, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
// Configure the pins to a well know state
|
||||
SET_RS;
|
||||
SET_RD;
|
||||
SET_WR;
|
||||
CLR_CS;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void setpin_reset(GDisplay *g, bool_t state) {
|
||||
(void) g;
|
||||
(void) state;
|
||||
/* Nothing to do here - reset pin tied to Vcc */
|
||||
}
|
||||
|
||||
static inline void set_backlight(GDisplay *g, uint8_t percent) {
|
||||
(void) g;
|
||||
(void) percent;
|
||||
/* Nothing to do here - Backlight always on */
|
||||
}
|
||||
|
||||
static inline void acquire_bus(GDisplay *g) {
|
||||
(void) g;
|
||||
}
|
||||
|
||||
static inline void release_bus(GDisplay *g) {
|
||||
(void) g;
|
||||
}
|
||||
|
||||
static inline void write_index(GDisplay *g, uint16_t index) {
|
||||
(void) g;
|
||||
palWritePort(GPIOE, index);
|
||||
CLR_RS; CLR_WR; SET_WR; SET_RS;
|
||||
}
|
||||
|
||||
static inline void write_data(GDisplay *g, uint16_t data) {
|
||||
(void) g;
|
||||
palWritePort(GPIOE, data);
|
||||
CLR_WR; SET_WR;
|
||||
}
|
||||
|
||||
static inline void setreadmode(GDisplay *g) {
|
||||
(void) g;
|
||||
// change pin mode to digital input
|
||||
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
|
||||
CLR_RD;
|
||||
}
|
||||
|
||||
static inline void setwritemode(GDisplay *g) {
|
||||
(void) g;
|
||||
// change pin mode back to digital output
|
||||
SET_RD;
|
||||
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
}
|
||||
|
||||
static inline uint16_t read_data(GDisplay *g) {
|
||||
return palReadPort(GPIOE);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(GDISP_USE_DMA)
|
||||
#error "GDISP - SSD1289: The GPIO interface does not support DMA"
|
||||
#endif
|
||||
|
||||
#endif /* _GDISP_LLD_BOARD_H */
|
||||
|
||||
|
|
@ -0,0 +1,169 @@
|
|||
/*
|
||||
* This file is subject to the terms of the GFX License. If a copy of
|
||||
* the license was not distributed with this file, you can obtain one at:
|
||||
*
|
||||
* http://ugfx.org/license.html
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drivers/gdisp/SSD1289/board_SSD1289_stm32f4discovery.h
|
||||
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
|
||||
*/
|
||||
|
||||
#ifndef _GDISP_LLD_BOARD_H
|
||||
#define _GDISP_LLD_BOARD_H
|
||||
|
||||
// For a multiple display configuration we would put all this in a structure and then
|
||||
// set g->priv to that structure.
|
||||
#define GDISP_REG ((volatile uint16_t *) 0x60000000)[0] /* RS = 0 */
|
||||
#define GDISP_RAM ((volatile uint16_t *) 0x60020000)[0] /* RS = 1 */
|
||||
#define GDISP_DMA_STREAM STM32_DMA2_STREAM6
|
||||
#define FSMC_BANK 0
|
||||
|
||||
/* PWM configuration structure. We use timer 3 channel 3 */
|
||||
static const PWMConfig pwmcfg = {
|
||||
100000, /* 100 kHz PWM clock frequency. */
|
||||
100, /* PWM period is 100 cycles. */
|
||||
NULL,
|
||||
{
|
||||
{PWM_OUTPUT_DISABLED, NULL},
|
||||
{PWM_OUTPUT_DISABLED, NULL},
|
||||
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
|
||||
{PWM_OUTPUT_DISABLED, NULL}
|
||||
},
|
||||
0
|
||||
};
|
||||
|
||||
static inline void init_board(GDisplay *g, unsigned display) {
|
||||
|
||||
// As we are not using multiple displays we set g->priv to NULL as we don't use it.
|
||||
g->priv = 0;
|
||||
|
||||
if (display == 0) {
|
||||
|
||||
/**
|
||||
* Set up for Display 0
|
||||
*
|
||||
* Performs the following functions:
|
||||
* 1. initialise the io port used by the display
|
||||
* 2. initialise the reset pin (initial state not-in-reset)
|
||||
* 3. initialise the chip select pin (initial state not-active)
|
||||
* 4. initialise the backlight pin (initial state back-light off)
|
||||
*/
|
||||
|
||||
#if defined(STM32F1XX) || defined(STM32F3XX)
|
||||
/* FSMC setup for F1/F3 */
|
||||
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
|
||||
|
||||
#if defined(GDISP_USE_DMA)
|
||||
#error "GDISP: SSD1289 - DMA not implemented for F1/F3 Devices"
|
||||
#endif
|
||||
#elif defined(STM32F4XX) || defined(STM32F2XX)
|
||||
/* STM32F2-F4 FSMC init */
|
||||
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
|
||||
|
||||
#if defined(GDISP_USE_DMA)
|
||||
if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) gfxExit();
|
||||
dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
|
||||
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
|
||||
#else
|
||||
#warning "GDISP: SSD1289 - DMA is supported for F2/F4 Devices. Define GDISP_USE_DMA in your gfxconf.h to turn this on for better performance."
|
||||
#endif
|
||||
#else
|
||||
#error "GDISP: SSD1289 - FSMC not implemented for this device"
|
||||
#endif
|
||||
|
||||
/* set pins to FSMC mode */
|
||||
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
|
||||
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
|
||||
|
||||
IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
|
||||
(1 << 13) | (1 << 14) | (1 << 15), 0};
|
||||
|
||||
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
|
||||
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
|
||||
|
||||
/* FSMC timing */
|
||||
FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
|
||||
|
||||
/* Bank1 NOR/SRAM control register configuration
|
||||
* This is actually not needed as already set by default after reset */
|
||||
FSMC_Bank1->BTCR[FSMC_BANK] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
|
||||
|
||||
/* Display backlight control */
|
||||
/* TIM3 is an alternate function 2 (AF2) */
|
||||
pwmStart(&PWMD3, &pwmcfg);
|
||||
palSetPadMode(GPIOB, 0, PAL_MODE_ALTERNATE(2));
|
||||
pwmEnableChannel(&PWMD3, 2, 100);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void setpin_reset(GDisplay *g, bool_t state) {
|
||||
(void) g;
|
||||
(void) state;
|
||||
}
|
||||
|
||||
static inline void set_backlight(GDisplay *g, uint8_t percent) {
|
||||
(void) g;
|
||||
pwmEnableChannel(&PWMD3, 2, percent);
|
||||
}
|
||||
|
||||
static inline void acquire_bus(GDisplay *g) {
|
||||
(void) g;
|
||||
}
|
||||
|
||||
static inline void release_bus(GDisplay *g) {
|
||||
(void) g;
|
||||
}
|
||||
|
||||
static inline void write_index(GDisplay *g, uint16_t index) {
|
||||
(void) g;
|
||||
GDISP_REG = index;
|
||||
}
|
||||
|
||||
static inline void write_data(GDisplay *g, uint16_t data) {
|
||||
(void) g;
|
||||
GDISP_RAM = data;
|
||||
}
|
||||
|
||||
static inline void setreadmode(GDisplay *g) {
|
||||
(void) g;
|
||||
FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_3 | FSMC_BTR1_DATAST_3 | FSMC_BTR1_BUSTURN_0; /* FSMC timing */
|
||||
}
|
||||
|
||||
static inline void setwritemode(GDisplay *g) {
|
||||
(void) g;
|
||||
FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0; /* FSMC timing */
|
||||
}
|
||||
|
||||
static inline uint16_t read_data(GDisplay *g) {
|
||||
(void) g;
|
||||
return GDISP_RAM;
|
||||
}
|
||||
|
||||
#if defined(GDISP_USE_DMA) || defined(__DOXYGEN__)
|
||||
static inline void dma_with_noinc(GDisplay *g, color_t *buffer, int area) {
|
||||
(void) g;
|
||||
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
|
||||
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
|
||||
for (; area > 0; area -= 65535) {
|
||||
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area > 65535 ? 65535 : area);
|
||||
dmaStreamEnable(GDISP_DMA_STREAM);
|
||||
dmaWaitCompletion(GDISP_DMA_STREAM);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void dma_with_inc(GDisplay *g, color_t *buffer, int area) {
|
||||
(void) g;
|
||||
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
|
||||
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PINC | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
|
||||
for (; area > 0; area -= 65535) {
|
||||
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area > 65535 ? 65535 : area);
|
||||
dmaStreamEnable(GDISP_DMA_STREAM);
|
||||
dmaWaitCompletion(GDISP_DMA_STREAM);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _GDISP_LLD_BOARD_H */
|
||||
|
||||
|
|
@ -0,0 +1,172 @@
|
|||
/*
|
||||
* This file is subject to the terms of the GFX License. If a copy of
|
||||
* the license was not distributed with this file, you can obtain one at:
|
||||
*
|
||||
* http://ugfx.org/license.html
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drivers/gdisp/SSD1289/board_SSD1289_template.h
|
||||
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
|
||||
*
|
||||
* @addtogroup GDISP
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _GDISP_LLD_BOARD_H
|
||||
#define _GDISP_LLD_BOARD_H
|
||||
|
||||
/**
|
||||
* @brief Initialise the board for the display.
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
* @param[in] display The display number on this controller (0..n)
|
||||
*
|
||||
* @note Set the g->priv member to whatever is appropriate. For multiple
|
||||
* displays this might be a pointer to the appropriate register set.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void init_board(GDisplay *g, unsigned display) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set or clear the lcd reset pin.
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setpin_reset(GDisplay *g, bool_t state) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the lcd back-light level.
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
* @param[in] percent 0 to 100%
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void set_backlight(GDisplay *g, uint8_t percent) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Take exclusive control of the bus
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void acquire_bus(GDisplay *g) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Release exclusive control of the bus
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void release_bus(GDisplay *g) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the index register.
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
* @param[in] index The index register to set
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void write_index(GDisplay *g, uint16_t index) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the lcd.
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
* @param[in] data The data to send
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void write_data(GDisplay *g, uint16_t data) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the bus in read mode
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setreadmode(GDisplay *g) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the bus back into write mode
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setwritemode(GDisplay *g) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read data from the lcd.
|
||||
* @return The data from the lcd
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
*
|
||||
* @note The chip select may need to be asserted/de-asserted
|
||||
* around the actual spi read
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline uint16_t read_data(GDisplay *g) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* The below section you can replace with #error if your interface doesn't support DMA
|
||||
*/
|
||||
#if defined(GDISP_USE_DMA) || defined(__DOXYGEN__)
|
||||
//#error "GDISP - SSD1289: This interface does not support DMA"
|
||||
|
||||
/**
|
||||
* @brief Transfer data using DMA but don't increment the source address
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
* @param[in] buffer The source buffer location
|
||||
* @param[in] area The number of pixels to transfer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void dma_with_noinc(GDisplay *g, color_t *buffer, int area) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transfer data using DMA incrementing the source address
|
||||
*
|
||||
* @param[in] g The GDisplay structure
|
||||
* @param[in] buffer The source buffer location
|
||||
* @param[in] area The number of pixels to transfer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void dma_with_inc(GDisplay *g, color_t *buffer, int area) {
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _GDISP_LLD_BOARD_H */
|
||||
/** @} */
|
||||
|
|
@ -14,9 +14,11 @@
|
|||
|
||||
#if GFX_USE_GDISP
|
||||
|
||||
#define GDISP_LLD_DECLARATIONS
|
||||
#define GDISP_DRIVER_VMT GDISPVMT_SSD1289
|
||||
#include "../drivers/gdisp/SSD1289/gdisp_lld_config.h"
|
||||
#include "gdisp/lld/gdisp_lld.h"
|
||||
#include "gdisp_lld_board.h"
|
||||
|
||||
#include "board_SSD1289.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
|
|
@ -40,32 +42,37 @@
|
|||
/*===========================================================================*/
|
||||
|
||||
// Some common routines and macros
|
||||
#define dummy_read() { volatile uint16_t dummy; dummy = read_data(); (void) dummy; }
|
||||
#define write_reg(reg, data) { write_index(reg); write_data(data); }
|
||||
#define dummy_read(g) { volatile uint16_t dummy; dummy = read_data(g); (void) dummy; }
|
||||
#define write_reg(g, reg, data) { write_index(g, reg); write_data(g, data); }
|
||||
|
||||
static void set_cursor(GDISPDriver *g) {
|
||||
static void set_cursor(GDisplay *g) {
|
||||
/*
|
||||
* Reg 0x004E is an 8 bit value - start x position
|
||||
* Reg 0x004F is 9 bit - start y position
|
||||
* Use a bit mask to make sure they are not set too high
|
||||
*/
|
||||
switch(g->g.Orientation) {
|
||||
case GDISP_ROTATE_0:
|
||||
write_reg(0x004e, g->p.x & 0x00FF);
|
||||
write_reg(0x004f, g->p.y & 0x01FF);
|
||||
write_reg(g, 0x4e, g->p.x & 0x00FF);
|
||||
write_reg(g, 0x4f, g->p.y & 0x01FF);
|
||||
break;
|
||||
case GDISP_ROTATE_90:
|
||||
write_reg(0x004e, g->p.y & 0x00FF);
|
||||
write_reg(0x004f, (GDISP_SCREEN_HEIGHT-1-g->p.x) & 0x01FF);
|
||||
write_reg(g, 0x4e, g->p.y & 0x00FF);
|
||||
write_reg(g, 0x4f, (GDISP_SCREEN_HEIGHT-1-g->p.x) & 0x01FF);
|
||||
break;
|
||||
case GDISP_ROTATE_180:
|
||||
write_reg(0x004e, (GDISP_SCREEN_WIDTH-1-g->p.x) & 0x00FF);
|
||||
write_reg(0x004f, (GDISP_SCREEN_HEIGHT-1-g->p.y) & 0x01FF);
|
||||
write_reg(g, 0x4e, (GDISP_SCREEN_WIDTH-1-g->p.x) & 0x00FF);
|
||||
write_reg(g, 0x4f, (GDISP_SCREEN_HEIGHT-1-g->p.y) & 0x01FF);
|
||||
break;
|
||||
case GDISP_ROTATE_270:
|
||||
write_reg(0x004e, (GDISP_SCREEN_WIDTH-1-g->p.y) & 0x00FF);
|
||||
write_reg(0x004f, g->p.x & 0x01FF);
|
||||
write_reg(g, 0x4e, (GDISP_SCREEN_WIDTH-1-g->p.y) & 0x00FF);
|
||||
write_reg(g, 0x4f, g->p.x & 0x01FF);
|
||||
break;
|
||||
}
|
||||
write_index(0x0022);
|
||||
write_index(g, 0x22);
|
||||
}
|
||||
|
||||
static void set_viewport(GDISPDriver* g) {
|
||||
static void set_viewport(GDisplay* g) {
|
||||
/* Reg 0x44 - Horizontal RAM address position
|
||||
* Upper Byte - HEA
|
||||
* Lower Byte - HSA
|
||||
|
|
@ -73,31 +80,28 @@ static void set_viewport(GDISPDriver* g) {
|
|||
* Reg 0x45,0x46 - Vertical RAM address position
|
||||
* Lower 9 bits gives 0-511 range in each value
|
||||
* 0 <= Reg(0x45) <= Reg(0x46) <= 0x13F
|
||||
* Reg 0x004E is an 8 bit value - start x position
|
||||
* Reg 0x004F is 9 bit - start y position
|
||||
* Use a bit mask to make sure they are not set too high
|
||||
*/
|
||||
switch(g->g.Orientation) {
|
||||
case GDISP_ROTATE_0:
|
||||
write_reg(0x44, (((g->p.x+g->p.cx-1) << 8) & 0xFF00 ) | (g->p.x & 0x00FF));
|
||||
write_reg(0x45, g->p.y & 0x01FF);
|
||||
write_reg(0x46, (g->p.y+g->p.cy-1) & 0x01FF);
|
||||
write_reg(g, 0x44, (((g->p.x+g->p.cx-1) << 8) & 0xFF00 ) | (g->p.x & 0x00FF));
|
||||
write_reg(g, 0x45, g->p.y & 0x01FF);
|
||||
write_reg(g, 0x46, (g->p.y+g->p.cy-1) & 0x01FF);
|
||||
break;
|
||||
case GDISP_ROTATE_90:
|
||||
write_reg(0x44, (((g->p.y+g->p.cy-1) << 8) & 0xFF00 ) | (g->p.y & 0x00FF));
|
||||
write_reg(0x45, (GDISP_SCREEN_HEIGHT-(g->p.x+g->p.cx)) & 0x01FF);
|
||||
write_reg(0x46, (GDISP_SCREEN_HEIGHT-1-g->p.x) & 0x01FF);
|
||||
write_reg(g, 0x44, (((g->p.y+g->p.cy-1) << 8) & 0xFF00 ) | (g->p.y & 0x00FF));
|
||||
write_reg(g, 0x45, (GDISP_SCREEN_HEIGHT-(g->p.x+g->p.cx)) & 0x01FF);
|
||||
write_reg(g, 0x46, (GDISP_SCREEN_HEIGHT-1-g->p.x) & 0x01FF);
|
||||
break;
|
||||
case GDISP_ROTATE_180:
|
||||
write_reg(0x44, (((GDISP_SCREEN_WIDTH-1-g->p.x) & 0x00FF) << 8) | ((GDISP_SCREEN_WIDTH - (g->p.x+g->p.cx)) & 0x00FF));
|
||||
write_reg(0x45, (GDISP_SCREEN_HEIGHT-(g->p.y+g->p.cy)) & 0x01FF);
|
||||
write_reg(0x46, (GDISP_SCREEN_HEIGHT-1-g->p.y) & 0x01FF);
|
||||
write_reg(g, 0x44, (((GDISP_SCREEN_WIDTH-1-g->p.x) & 0x00FF) << 8) | ((GDISP_SCREEN_WIDTH - (g->p.x+g->p.cx)) & 0x00FF));
|
||||
write_reg(g, 0x45, (GDISP_SCREEN_HEIGHT-(g->p.y+g->p.cy)) & 0x01FF);
|
||||
write_reg(g, 0x46, (GDISP_SCREEN_HEIGHT-1-g->p.y) & 0x01FF);
|
||||
break;
|
||||
case GDISP_ROTATE_270:
|
||||
write_cmd2(PASET, GDISP_RAM_Y_OFFSET+g->p.x, GDISP_RAM_Y_OFFSET+g->p.x+g->p.cx-1);
|
||||
write_reg(0x44, (((GDISP_SCREEN_WIDTH-1-g->p.y) & 0x00FF) << 8) | ((GDISP_SCREEN_WIDTH-(g->p.y+g->p.cy)) & 0x00FF));
|
||||
write_reg(0x45, g->p.x & 0x01FF);
|
||||
write_reg(0x46, (g->p.x+g->p.cx-1) & 0x01FF);
|
||||
write_reg(g, 0x44, (((GDISP_SCREEN_WIDTH-1-g->p.y) & 0x00FF) << 8) | ((GDISP_SCREEN_WIDTH-(g->p.y+g->p.cy)) & 0x00FF));
|
||||
write_reg(g, 0x45, g->p.x & 0x01FF);
|
||||
write_reg(g, 0x46, (g->p.x+g->p.cx-1) & 0x01FF);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -110,66 +114,66 @@ static void set_viewport(GDISPDriver* g) {
|
|||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
|
||||
LLDSPEC bool_t gdisp_lld_init(GDisplay *g, unsigned display) {
|
||||
/* Initialise your display */
|
||||
init_board();
|
||||
init_board(g, display);
|
||||
|
||||
// Hardware reset
|
||||
setpin_reset(TRUE);
|
||||
setpin_reset(g, TRUE);
|
||||
gfxSleepMilliseconds(20);
|
||||
setpin_reset(FALSE);
|
||||
setpin_reset(g, FALSE);
|
||||
gfxSleepMilliseconds(20);
|
||||
|
||||
// Get the bus for the following initialisation commands
|
||||
acquire_bus();
|
||||
acquire_bus(g);
|
||||
|
||||
write_reg(0x0000,0x0001); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0003,0xA8A4); gfxSleepMicroseconds(5);
|
||||
write_reg(0x000C,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x000D,0x080C); gfxSleepMicroseconds(5);
|
||||
write_reg(0x000E,0x2B00); gfxSleepMicroseconds(5);
|
||||
write_reg(0x001E,0x00B0); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0001,0x2B3F); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0002,0x0600); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0010,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0011,0x6070); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0005,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0006,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0016,0xEF1C); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0017,0x0003); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0007,0x0133); gfxSleepMicroseconds(5);
|
||||
write_reg(0x000B,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x000F,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0041,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0042,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0048,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0049,0x013F); gfxSleepMicroseconds(5);
|
||||
write_reg(0x004A,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x004B,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0044,0xEF00); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0045,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0046,0x013F); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0030,0x0707); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0031,0x0204); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0032,0x0204); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0033,0x0502); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0034,0x0507); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0035,0x0204); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0036,0x0204); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0037,0x0502); gfxSleepMicroseconds(5);
|
||||
write_reg(0x003A,0x0302); gfxSleepMicroseconds(5);
|
||||
write_reg(0x003B,0x0302); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0023,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0024,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x0025,0x8000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x004f,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(0x004e,0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x00, 0x0001); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x03, 0xA8A4); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x0C, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x0D, 0x080C); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x0E, 0x2B00); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x1E, 0x00B0); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x01, 0x2B3F); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x02, 0x0600); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x10, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x11, 0x6070); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x05, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x06, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x16, 0xEF1C); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x17, 0x0003); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x07, 0x0133); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x0B, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x0F, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x41, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x42, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x48, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x49, 0x013F); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x4A, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x4B, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x44, 0xEF00); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x45, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x46, 0x013F); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x30, 0x0707); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x31, 0x0204); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x32, 0x0204); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x33, 0x0502); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x34, 0x0507); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x35, 0x0204); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x36, 0x0204); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x37, 0x0502); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x3A, 0x0302); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x3B, 0x0302); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x23, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x24, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x25, 0x8000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x4f, 0x0000); gfxSleepMicroseconds(5);
|
||||
write_reg(g, 0x4e, 0x0000); gfxSleepMicroseconds(5);
|
||||
|
||||
// Release the bus
|
||||
release_bus();
|
||||
release_bus(g);
|
||||
|
||||
/* Turn on the back-light */
|
||||
set_backlight(GDISP_INITIAL_BACKLIGHT);
|
||||
set_backlight(g, GDISP_INITIAL_BACKLIGHT);
|
||||
|
||||
/* Initialise the GDISP structure */
|
||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||
|
|
@ -182,94 +186,94 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
|
|||
}
|
||||
|
||||
#if GDISP_HARDWARE_STREAM_WRITE
|
||||
LLDSPEC void gdisp_lld_write_start(GDISPDriver *g) {
|
||||
acquire_bus();
|
||||
LLDSPEC void gdisp_lld_write_start(GDisplay *g) {
|
||||
acquire_bus(g);
|
||||
set_viewport(g);
|
||||
}
|
||||
LLDSPEC void gdisp_lld_write_color(GDISPDriver *g) {
|
||||
write_data(g->p.color);
|
||||
LLDSPEC void gdisp_lld_write_color(GDisplay *g) {
|
||||
write_data(g, g->p.color);
|
||||
}
|
||||
LLDSPEC void gdisp_lld_write_stop(GDISPDriver *g) {
|
||||
release_bus();
|
||||
LLDSPEC void gdisp_lld_write_stop(GDisplay *g) {
|
||||
release_bus(g);
|
||||
}
|
||||
LLDSPEC void gdisp_lld_stream_pos(GDISPDriver *g) {
|
||||
LLDSPEC void gdisp_lld_write_pos(GDisplay *g) {
|
||||
set_cursor(g);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if GDISP_HARDWARE_STREAM_READ
|
||||
LLDSPEC void gdisp_lld_read_start(GDISPDriver *g) {
|
||||
acquire_bus();
|
||||
LLDSPEC void gdisp_lld_read_start(GDisplay *g) {
|
||||
acquire_bus(g);
|
||||
set_viewport(g);
|
||||
set_cursor(g);
|
||||
setreadmode();
|
||||
dummy_read();
|
||||
setreadmode(g);
|
||||
dummy_read(g);
|
||||
}
|
||||
LLDSPEC color_t gdisp_lld_read_color(GDISPDriver *g) {
|
||||
return read_data();
|
||||
LLDSPEC color_t gdisp_lld_read_color(GDisplay *g) {
|
||||
return read_data(g);
|
||||
}
|
||||
LLDSPEC void gdisp_lld_read_stop(GDISPDriver *g) {
|
||||
setwritemode();
|
||||
release_bus();
|
||||
LLDSPEC void gdisp_lld_read_stop(GDisplay *g) {
|
||||
setwritemode(g);
|
||||
release_bus(g);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if GDISP_HARDWARE_FILLS && defined(GDISP_USE_DMA)
|
||||
LLDSPEC void gdisp_lld_fill_area(GDISPDriver *g) {
|
||||
acquire_bus();
|
||||
LLDSPEC void gdisp_lld_fill_area(GDisplay *g) {
|
||||
acquire_bus(g);
|
||||
set_viewport(g);
|
||||
set_cursor(g);
|
||||
dma_with_noinc(&color, g->p.cx*g->p.cy)
|
||||
release_bus();
|
||||
dma_with_noinc(g, &color, g->p.cx*g->p.cy)
|
||||
release_bus(g);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if GDISP_HARDWARE_BITFILLS && defined(GDISP_USE_DMA)
|
||||
LLDSPEC void gdisp_lld_blit_area(GDISPDriver *g) {
|
||||
LLDSPEC void gdisp_lld_blit_area(GDisplay *g) {
|
||||
pixel_t *buffer;
|
||||
coord_t ycnt;
|
||||
|
||||
buffer = (pixel_t *)g->p.ptr + g->p.x1 + g->p.y1 * g->p.x2;
|
||||
|
||||
acquire_bus();
|
||||
acquire_bus(g);
|
||||
set_viewport(g);
|
||||
set_cursor(g);
|
||||
if (g->p.x2 == g->p.cx) {
|
||||
dma_with_inc(buffer, g->p.cx*g->p.cy);
|
||||
dma_with_inc(g, buffer, g->p.cx*g->p.cy);
|
||||
} else {
|
||||
for (ycnt = g->p.cy; ycnt; ycnt--, buffer += g->p.x2)
|
||||
dma_with_inc(buffer, g->p.cy);
|
||||
dma_with_inc(g, buffer, g->p.cy);
|
||||
}
|
||||
release_bus();
|
||||
release_bus(g);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
|
||||
LLDSPEC void gdisp_lld_control(GDISPDriver *g) {
|
||||
LLDSPEC void gdisp_lld_control(GDisplay *g) {
|
||||
switch(g->p.x) {
|
||||
case GDISP_CONTROL_POWER:
|
||||
if (g->g.Powermode == (powermode_t)g->p.ptr)
|
||||
return;
|
||||
switch((powermode_t)g->p.ptr) {
|
||||
case powerOff:
|
||||
acquire_bus();
|
||||
write_reg(0x0010, 0x0000); // leave sleep mode
|
||||
write_reg(0x0007, 0x0000); // halt operation
|
||||
write_reg(0x0000, 0x0000); // turn off oscillator
|
||||
write_reg(0x0010, 0x0001); // enter sleep mode
|
||||
release_bus();
|
||||
acquire_bus(g);
|
||||
write_reg(g, 0x10, 0x0000); // leave sleep mode
|
||||
write_reg(g, 0x07, 0x0000); // halt operation
|
||||
write_reg(g, 0x00, 0x0000); // turn off oscillator
|
||||
write_reg(g, 0x10, 0x0001); // enter sleep mode
|
||||
release_bus(g);
|
||||
break;
|
||||
case powerOn:
|
||||
acquire_bus();
|
||||
write_reg(0x0010, 0x0000); // leave sleep mode
|
||||
release_bus();
|
||||
if (g->g.Powermode != powerSleep)
|
||||
gdisp_lld_init();
|
||||
acquire_bus(g);
|
||||
write_reg(g, 0x10, 0x0000); // leave sleep mode
|
||||
write_reg(g, 0x00, 0x0001); // turn on oscillator
|
||||
gfxSleepMicroseconds(5);
|
||||
release_bus(g);
|
||||
break;
|
||||
case powerSleep:
|
||||
acquire_bus();
|
||||
write_reg(0x0010, 0x0001); // enter sleep mode
|
||||
release_bus();
|
||||
acquire_bus(g);
|
||||
write_reg(g, 0x10, 0x0001); // enter sleep mode
|
||||
release_bus(g);
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
|
|
@ -282,34 +286,34 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
|
|||
return;
|
||||
switch((orientation_t)g->p.ptr) {
|
||||
case GDISP_ROTATE_0:
|
||||
acquire_bus();
|
||||
acquire_bus(g);
|
||||
/* ID = 11 AM = 0 */
|
||||
write_reg(0x0011, 0x6070);
|
||||
release_bus();
|
||||
write_reg(g, 0x11, 0x6070);
|
||||
release_bus(g);
|
||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||
break;
|
||||
case GDISP_ROTATE_90:
|
||||
acquire_bus();
|
||||
acquire_bus(g);
|
||||
/* ID = 01 AM = 1 */
|
||||
write_reg(0x0011, 0x6058);
|
||||
release_bus();
|
||||
write_reg(0x11, 0x6058);
|
||||
release_bus(g);
|
||||
g->g.Height = GDISP_SCREEN_WIDTH;
|
||||
g->g.Width = GDISP_SCREEN_HEIGHT;
|
||||
break;
|
||||
case GDISP_ROTATE_180:
|
||||
acquire_bus();
|
||||
acquire_bus(g);
|
||||
/* ID = 00 AM = 0 */
|
||||
write_reg(0x0011, 0x6040);
|
||||
release_bus();
|
||||
write_reg(0x11, 0x6040);
|
||||
release_bus(g);
|
||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||
break;
|
||||
case GDISP_ROTATE_270:
|
||||
acquire_bus();
|
||||
acquire_bus(g);
|
||||
/* ID = 10 AM = 1 */
|
||||
write_reg(0x0011, 0x6068);
|
||||
release_bus();
|
||||
write_reg(g, 0x11, 0x6068);
|
||||
release_bus(g);
|
||||
g->g.Height = GDISP_SCREEN_WIDTH;
|
||||
g->g.Width = GDISP_SCREEN_HEIGHT;
|
||||
break;
|
||||
|
|
@ -322,7 +326,7 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
|
|||
case GDISP_CONTROL_BACKLIGHT:
|
||||
if ((unsigned)g->p.ptr > 100)
|
||||
g->p.ptr = (void *)100;
|
||||
set_backlight((unsigned)g->p.ptr);
|
||||
set_backlight(g, (unsigned)g->p.ptr);
|
||||
g->g.Backlight = (unsigned)g->p.ptr;
|
||||
return;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,2 @@
|
|||
# List the required driver.
|
||||
GFXSRC += $(GFXLIB)/drivers/gdisp/SSD1289/gdisp_lld.c
|
||||
|
||||
# Required include directories
|
||||
GFXINC += $(GFXLIB)/drivers/gdisp/SSD1289
|
||||
GFXSRC += $(GFXLIB)/drivers/gdisp/SSD1289/gdisp_lld.c
|
||||
|
|
|
|||
|
|
@ -1,156 +0,0 @@
|
|||
/*
|
||||
* This file is subject to the terms of the GFX License. If a copy of
|
||||
* the license was not distributed with this file, you can obtain one at:
|
||||
*
|
||||
* http://ugfx.org/license.html
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drivers/gdisp/SSD1289/gdisp_lld_board_firebullstm32f103.h
|
||||
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
|
||||
*
|
||||
* @addtogroup GDISP
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _GDISP_LLD_BOARD_H
|
||||
#define _GDISP_LLD_BOARD_H
|
||||
|
||||
#define SET_CS palSetPad(GPIOD, 12);
|
||||
#define CLR_CS palClearPad(GPIOD, 12);
|
||||
#define SET_RS palSetPad(GPIOD, 13);
|
||||
#define CLR_RS palClearPad(GPIOD, 13);
|
||||
#define SET_WR palSetPad(GPIOD, 14);
|
||||
#define CLR_WR palClearPad(GPIOD, 14);
|
||||
#define SET_RD palSetPad(GPIOD, 15);
|
||||
#define CLR_RD palClearPad(GPIOD, 15);
|
||||
|
||||
/**
|
||||
* @brief Initialise the board for the display.
|
||||
* @notes This board definition uses GPIO and assumes exclusive access to these GPIO pins
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void init_board(void) {
|
||||
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOD, 12, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOD, 15, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
// Configure the pins to a well know state
|
||||
SET_RS;
|
||||
SET_RD;
|
||||
SET_WR;
|
||||
CLR_CS;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Set or clear the lcd reset pin.
|
||||
*
|
||||
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setpin_reset(bool_t state) {
|
||||
(void) state;
|
||||
/* Nothing to do here - reset pin tied to Vcc */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the lcd back-light level.
|
||||
*
|
||||
* @param[in] percent 0 to 100%
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void set_backlight(uint8_t percent) {
|
||||
(void) percent;
|
||||
/* Nothing to do here - Backlight always on */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Take exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void acquire_bus(void) {
|
||||
/* Nothing to do here since LCD is the only device on that bus */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Release exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void release_bus(void) {
|
||||
/* Nothing to do here since LCD is the only device on that bus */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the index register.
|
||||
*
|
||||
* @param[in] index The index register to set
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void write_index(uint16_t index) {
|
||||
palWritePort(GPIOE, index);
|
||||
CLR_RS; CLR_WR; SET_WR; SET_RS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the lcd.
|
||||
*
|
||||
* @param[in] data The data to send
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void write_data(uint16_t data) {
|
||||
palWritePort(GPIOE, data);
|
||||
CLR_WR; SET_WR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the bus in read mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setreadmode(void) {
|
||||
// change pin mode to digital input
|
||||
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
|
||||
CLR_RD;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the bus back into write mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setwritemode(void) {
|
||||
// change pin mode back to digital output
|
||||
SET_RD;
|
||||
palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read data from the lcd.
|
||||
*
|
||||
* @return The data from the lcd
|
||||
* @note The chip select may need to be asserted/de-asserted
|
||||
* around the actual spi read
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline uint16_t read_data(void) {
|
||||
return palReadPort(GPIOE);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(GDISP_USE_DMA)
|
||||
#error "GDISP - SSD1289: The GPIO interface does not support DMA"
|
||||
#endif
|
||||
|
||||
#endif /* _GDISP_LLD_BOARD_H */
|
||||
/** @} */
|
||||
|
|
@ -1,215 +0,0 @@
|
|||
/*
|
||||
* This file is subject to the terms of the GFX License. If a copy of
|
||||
* the license was not distributed with this file, you can obtain one at:
|
||||
*
|
||||
* http://ugfx.org/license.html
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drivers/gdisp/SSD1289/gdisp_lld_board_st_stm32f4_discovery.h
|
||||
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
|
||||
*
|
||||
* @addtogroup GDISP
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _GDISP_LLD_BOARD_H
|
||||
#define _GDISP_LLD_BOARD_H
|
||||
|
||||
#define GDISP_REG ((volatile uint16_t *) 0x60000000)[0] /* RS = 0 */
|
||||
#define GDISP_RAM ((volatile uint16_t *) 0x60020000)[0] /* RS = 1 */
|
||||
#define GDISP_DMA_STREAM STM32_DMA2_STREAM6
|
||||
|
||||
const unsigned char FSMC_Bank = 0;
|
||||
|
||||
/* PWM configuration structure. We use timer 3 channel 3 */
|
||||
static const PWMConfig pwmcfg = {
|
||||
100000, /* 100 kHz PWM clock frequency. */
|
||||
100, /* PWM period is 100 cycles. */
|
||||
NULL,
|
||||
{
|
||||
{PWM_OUTPUT_DISABLED, NULL},
|
||||
{PWM_OUTPUT_DISABLED, NULL},
|
||||
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
|
||||
{PWM_OUTPUT_DISABLED, NULL}
|
||||
},
|
||||
0
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Initialise the board for the display.
|
||||
* @notes Performs the following functions:
|
||||
* 1. initialise the io port used by your display
|
||||
* 2. initialise the reset pin (initial state not-in-reset)
|
||||
* 3. initialise the chip select pin (initial state not-active)
|
||||
* 4. initialise the backlight pin (initial state back-light off)
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void init_board(void) {
|
||||
|
||||
#if defined(STM32F1XX) || defined(STM32F3XX)
|
||||
/* FSMC setup for F1/F3 */
|
||||
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
|
||||
|
||||
#if defined(GDISP_USE_DMA)
|
||||
#error "GDISP: SSD1289 - DMA not implemented for F1/F3 Devices"
|
||||
#endif
|
||||
#elif defined(STM32F4XX) || defined(STM32F2XX)
|
||||
/* STM32F2-F4 FSMC init */
|
||||
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
|
||||
|
||||
#if defined(GDISP_USE_DMA)
|
||||
if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) gfxExit();
|
||||
dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
|
||||
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
|
||||
#else
|
||||
#warning "GDISP: SSD1289 - DMA is supported for F2/F4 Devices. Define GDISP_USE_DMA in your gfxconf.h to turn this on for better performance."
|
||||
#endif
|
||||
#else
|
||||
#error "GDISP: SSD1289 - FSMC not implemented for this device"
|
||||
#endif
|
||||
|
||||
/* set pins to FSMC mode */
|
||||
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
|
||||
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
|
||||
|
||||
IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
|
||||
(1 << 13) | (1 << 14) | (1 << 15), 0};
|
||||
|
||||
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
|
||||
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
|
||||
|
||||
/* FSMC timing */
|
||||
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
|
||||
|
||||
/* Bank1 NOR/SRAM control register configuration
|
||||
* This is actually not needed as already set by default after reset */
|
||||
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
|
||||
|
||||
/* Display backlight control */
|
||||
/* TIM3 is an alternate function 2 (AF2) */
|
||||
pwmStart(&PWMD3, &pwmcfg);
|
||||
palSetPadMode(GPIOB, 0, PAL_MODE_ALTERNATE(2));
|
||||
pwmEnableChannel(&PWMD3, 2, 100);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set or clear the lcd reset pin.
|
||||
*
|
||||
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setpin_reset(bool_t state) {
|
||||
(void) state;
|
||||
/* Nothing to do here */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the lcd back-light level.
|
||||
*
|
||||
* @param[in] percent 0 to 100%
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void set_backlight(uint8_t percent) {
|
||||
pwmEnableChannel(&PWMD3, 2, percent);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Take exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void acquire_bus(void) {
|
||||
/* Nothing to do here */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Release exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void release_bus(void) {
|
||||
/* Nothing to do here */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the index register.
|
||||
*
|
||||
* @param[in] index The index register to set
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void write_index(uint16_t index) { GDISP_REG = index; }
|
||||
|
||||
/**
|
||||
* @brief Send data to the lcd.
|
||||
*
|
||||
* @param[in] data The data to send
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void write_data(uint16_t data) { GDISP_RAM = data; }
|
||||
|
||||
/**
|
||||
* @brief Set the bus in read mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setreadmode(void) {
|
||||
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_3 | FSMC_BTR1_DATAST_3 | FSMC_BTR1_BUSTURN_0; /* FSMC timing */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the bus back into write mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setwritemode(void) {
|
||||
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0; /* FSMC timing */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read data from the lcd.
|
||||
*
|
||||
* @return The data from the lcd
|
||||
* @note The chip select may need to be asserted/de-asserted
|
||||
* around the actual spi read
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline uint16_t read_data(void) { return GDISP_RAM; }
|
||||
|
||||
#if defined(GDISP_USE_DMA) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Transfer data using DMA but don't increment the source address
|
||||
*/
|
||||
static inline dma_with_noinc(color_t *buffer, int area) {
|
||||
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
|
||||
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
|
||||
for (; area > 0; area -= 65535) {
|
||||
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area > 65535 ? 65535 : area);
|
||||
dmaStreamEnable(GDISP_DMA_STREAM);
|
||||
dmaWaitCompletion(GDISP_DMA_STREAM);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transfer data using DMA incrementing the source address
|
||||
*/
|
||||
static inline dma_with_inc(color_t *buffer, int area) {
|
||||
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
|
||||
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PINC | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
|
||||
for (; area > 0; area -= 65535) {
|
||||
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area > 65535 ? 65535 : area);
|
||||
dmaStreamEnable(GDISP_DMA_STREAM);
|
||||
dmaWaitCompletion(GDISP_DMA_STREAM);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _GDISP_LLD_BOARD_H */
|
||||
/** @} */
|
||||
|
|
@ -1,141 +0,0 @@
|
|||
/*
|
||||
* This file is subject to the terms of the GFX License. If a copy of
|
||||
* the license was not distributed with this file, you can obtain one at:
|
||||
*
|
||||
* http://ugfx.org/license.html
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drivers/gdisp/SSD1289/gdisp_lld_board_template.h
|
||||
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
|
||||
*
|
||||
* @addtogroup GDISP
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _GDISP_LLD_BOARD_H
|
||||
#define _GDISP_LLD_BOARD_H
|
||||
|
||||
/**
|
||||
* @brief Initialise the board for the display.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void init_board(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set or clear the lcd reset pin.
|
||||
*
|
||||
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setpin_reset(bool_t state) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the lcd back-light level.
|
||||
*
|
||||
* @param[in] percent 0 to 100%
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void set_backlight(uint8_t percent) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Take exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void acquire_bus(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Release exclusive control of the bus
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void release_bus(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the index register.
|
||||
*
|
||||
* @param[in] index The index register to set
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void write_index(uint16_t index) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Send data to the lcd.
|
||||
*
|
||||
* @param[in] data The data to send
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void write_data(uint16_t data) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the bus in read mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setreadmode(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the bus back into write mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void setwritemode(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read data from the lcd.
|
||||
*
|
||||
* @return The data from the lcd
|
||||
* @note The chip select may need to be asserted/de-asserted
|
||||
* around the actual spi read
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline uint16_t read_data(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* The below section you can replace with #error if your interface doesn't support DMA
|
||||
*/
|
||||
#if defined(GDISP_USE_DMA) || defined(__DOXYGEN__)
|
||||
//#error "GDISP - SSD1289: This interface does not support DMA"
|
||||
|
||||
/**
|
||||
* @brief Transfer data using DMA but don't increment the source address
|
||||
*/
|
||||
static inline dma_with_noinc(color_t *buffer, int area) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transfer data using DMA incrementing the source address
|
||||
*/
|
||||
static inline dma_with_inc(color_t *buffer, int area) {
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _GDISP_LLD_BOARD_H */
|
||||
/** @} */
|
||||
|
|
@ -22,9 +22,6 @@
|
|||
/* Driver hardware support. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define GDISP_DRIVER_NAME "SSD1289"
|
||||
#define GDISP_DRIVER_STRUCT GDISP_SSD1289
|
||||
|
||||
#define GDISP_HARDWARE_STREAM_WRITE TRUE
|
||||
#define GDISP_HARDWARE_STREAM_READ TRUE
|
||||
#define GDISP_HARDWARE_STREAM_POS TRUE
|
||||
|
|
|
|||
Loading…
Reference in New Issue