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S6D1121 FSMC timing cleanup

ugfx_release_2.6
Joel Bodenmann 2012-10-23 17:59:31 +02:00
parent c51096f8f2
commit e46b6b6024
1 changed files with 1 additions and 1 deletions
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2
drivers/gdisp/S6D1121/gdisp_lld.c
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@ -105,7 +105,7 @@ bool_t GDISP_LLD(init)(void) {
int FSMC_Bank = 0;
/* FSMC timing */
FSMC_Bank1->BTCR[FSMC_Bank+1] = (10) | (10 << 8) | (10 << 16);
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_1 | FSMC_BTR1_DATAST_1;
/* Bank1 NOR/SRAM control register configuration */
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;