310 lines
11 KiB
C
310 lines
11 KiB
C
/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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/* Avoid naming collisions with CubeHAL. */
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#undef Red
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#undef Green
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#undef Blue
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/* HAL drivers needed for configuration. */
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#include "stm32f4xx_hal.h"
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#include "stm32f4xx_hal_rcc.h"
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#include "stm32f4xx_hal_gpio.h"
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#include "stm32f4xx_hal_dsi.h"
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/* sdram driver provided by ST. */
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#include "stm32f469i_discovery_sdram.h"
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/* OTM8009A driver provided by ST. */
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#include "otm8009a.h"
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/** Manually set the LTDC timing. */
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#ifndef GFX_LTDC_TIMING_SET
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#define GFX_LTDC_TIMING_SET
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#endif
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/** Most boards will be revision A. */
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#ifndef USE_STM32469I_DISCO_REVA
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#define USE_STM32469I_DISCO_REVA
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#endif
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/** @brief Panel parameters
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*
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* This panel is a KoD KM-040TMP-02-0621 DSI LCD Display.
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*/
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static const ltdcConfig driverCfg = {
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800, 480, // Width, Height (pixels)
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1, 2, // Horizontal, Vertical sync (pixels)
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15, 34, // Horizontal, Vertical back porch (pixels)
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16, 34, // Horizontal, Vertical front porch (pixels)
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0, // Sync flags
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0x000000, // Clear color (RGB888)
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{ // Background layer config
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(LLDCOLOR_TYPE *)SDRAM_DEVICE_ADDR, // Frame buffer address
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800, 480, // Width, Height (pixels)
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800 * LTDC_PIXELBYTES, // Line pitch (bytes)
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LTDC_PIXELFORMAT, // Pixel format
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0, 0, // Start pixel position (x, y)
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800, 480, // Size of virtual layer (cx, cy)
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LTDC_COLOR_FUCHSIA, // Default color (ARGB8888)
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0x980088, // Color key (RGB888)
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LTDC_BLEND_FIX1_FIX2, // Blending factors
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0, // Palette (RGB888, can be NULL)
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0, // Palette length
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0xFF, // Constant alpha factor
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LTDC_LEF_ENABLE // Layer configuration flags
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},
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LTDC_UNUSED_LAYER_CONFIG // Foreground layer config
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};
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/** Display timing setting */
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#define KoD_FREQUENCY_DIVIDER 7
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/** Global DSI handle to hold DSI parameters. */
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DSI_HandleTypeDef dsiHandle;
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static GFXINLINE void reset_lcd(GDisplay* g);
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/**
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* @brief Function to intialize the STM32F46i-DISCO board.
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*
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* @param g: Structure holding display parameters.
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*/
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static GFXINLINE void init_board(GDisplay *g) {
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// As we are not using multiple displays we set g->board to NULL as we don't use it
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g->board = 0;
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#ifdef GFX_LTDC_TIMING_SET
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// KoD LCD clock configuration
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// PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz
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// PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 384 Mhz
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// PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 384/7 = 54.857 Mhz
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// LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_2 = 54.857/2 = 27.429Mhz
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#define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */
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#define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */
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#define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */
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#define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */
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#define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */
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#define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */
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#define STM32_PLLSAIN_VALUE 384
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#define STM32_PLLSAIQ_VALUE 4
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#define STM32_PLLSAIR_VALUE KoD_FREQUENCY_DIVIDER
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#define STM32_PLLSAIR_POST STM32_SAIR_DIV2
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RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24);
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RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST;
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RCC->CR |= RCC_CR_PLLSAION;
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#endif
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__HAL_RCC_DSI_CLK_ENABLE();
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DSI_PLLInitTypeDef dsiPllInit;
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DSI_CmdCfgTypeDef dsiCmdMode;
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DSI_LPCmdTypeDef dsiAPBCmd;
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/* Filling the DSI intialization struct. */
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dsiHandle.Instance = DSI; // There is only one DSI interface
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dsiHandle.Init.AutomaticClockLaneControl = DSI_AUTO_CLK_LANE_CTRL_ENABLE; // Automatic clock lane control: powers down the clock lane when not in use
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/* Highest speed = 500MHz. */
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uint16_t laneByteClk_kHz = 62500; /* 500 MHz / 8 = 62.5 MHz = 62500 kHz */
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/* TXEscapeCkdiv = f(LaneByteClk)/15.62 = 4 -> 500MHz/4 = 25MHz datasheet says around 20MHz */
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dsiHandle.Init.TXEscapeCkdiv = laneByteClk_kHz/15620; // Low power clock relative to the laneByteClock
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dsiHandle.Init.NumberOfLanes = DSI_TWO_DATA_LANES; // Two data lines for the fastest transfer speed
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/* Fill in the command mode struct. */
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dsiCmdMode.VirtualChannelID = 0; // The first virtual channel
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/* Select the appropriate color coding. */
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#ifdef GDISP_PIXELFORMAT_RGB565
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dsiCmdMode.ColorCoding = DSI_RGB565;
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#else
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dsiCmdMode.ColorCoding = DSI_RGB888;
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#endif
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dsiCmdMode.CommandSize = driverCfg.width; // Amount of pixels sent at once -> one line at a time
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dsiCmdMode.TearingEffectSource = DSI_TE_EXTERNAL; // Use pin PJ2
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dsiCmdMode.TearingEffectPolarity = DSI_TE_RISING_EDGE;
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dsiCmdMode.HSPolarity = DSI_HSYNC_ACTIVE_HIGH;
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dsiCmdMode.VSPolarity = DSI_VSYNC_ACTIVE_HIGH;
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dsiCmdMode.DEPolarity = DSI_DATA_ENABLE_ACTIVE_HIGH;
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dsiCmdMode.VSyncPol = DSI_VSYNC_FALLING;
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dsiCmdMode.AutomaticRefresh = DSI_AR_ENABLE; // Use the automatic refresh mode
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dsiCmdMode.TEAcknowledgeRequest = DSI_TE_ACKNOWLEDGE_DISABLE; // Not needed when using TE through GPIO
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/* GPIO configuration. */
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GPIO_InitTypeDef gpioInit;
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/* PH7 LCD_RESET */
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__HAL_RCC_GPIOH_CLK_ENABLE();
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gpioInit.Pin = GPIO_PIN_7;
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gpioInit.Mode = GPIO_MODE_OUTPUT_OD;
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gpioInit.Pull = GPIO_NOPULL;
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gpioInit.Speed = GPIO_SPEED_HIGH;
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HAL_GPIO_Init(GPIOH, &gpioInit);
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/* PJ2 DSIHOST_TE */
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__HAL_RCC_GPIOJ_CLK_ENABLE();
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gpioInit.Pin = GPIO_PIN_2;
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gpioInit.Mode = GPIO_MODE_AF_PP;
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gpioInit.Alternate = GPIO_AF13_DSI;
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HAL_GPIO_Init(GPIOJ, &gpioInit);
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/* PA3 LCD_BL_CTRL This pin is not physically connected. */
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__HAL_RCC_GPIOA_CLK_ENABLE();
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gpioInit.Pin = GPIO_PIN_3;
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gpioInit.Mode = GPIO_MODE_OUTPUT_OD;
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HAL_GPIO_Init(GPIOA, &gpioInit);
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/* Fvco = f(CLKin/IDF) * 2 * NDIV; fPHI = Fvco/(2*ODF) */
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#if !defined(USE_STM32469I_DISCO_REVA)
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/* fPHI = CLKin*62.5; Fvco = CLKin*125 */
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dsiPllInit.PLLNDIV = 125;
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dsiPllInit.PLLIDF = DSI_PLL_IN_DIV2;
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#else
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/* fPHI = CLKin*20; Fvco = CLKin*40 */
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dsiPllInit.PLLNDIV = 100;
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dsiPllInit.PLLIDF = DSI_PLL_IN_DIV5;
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#endif
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dsiPllInit.PLLODF = DSI_PLL_OUT_DIV1;
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/* Initialize the DSI peripheral. */
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HAL_DSI_Init(&dsiHandle, &dsiPllInit);
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DSI_PHY_TimerTypeDef PhyTimings;
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/* Configure DSI PHY HS2LP and LP2HS timings. Datasheet says 95ns max */
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PhyTimings.ClockLaneHS2LPTime = 35;
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PhyTimings.ClockLaneLP2HSTime = 35;
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PhyTimings.DataLaneHS2LPTime = 35;
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PhyTimings.DataLaneLP2HSTime = 35;
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PhyTimings.DataLaneMaxReadTime = 0;
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PhyTimings.StopWaitTime = 10;
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HAL_DSI_ConfigPhyTimer(&dsiHandle, &PhyTimings);
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/* Configure adapted command mode. */
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HAL_DSI_ConfigAdaptedCommandMode(&dsiHandle, &dsiCmdMode);
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/* Hardware reset LCD */
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reset_lcd(g);
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/* Initialize the SDRAM */
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BSP_SDRAM_Init();
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}
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static GFXINLINE void set_backlight(GDisplay* g, uint8_t percent)
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{
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(void)g;
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(void)percent;
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}
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/**
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* @brief Perform a hardware reset on the LCD.
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*
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* @param g: Display parameter structure.
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*/
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static GFXINLINE void reset_lcd(GDisplay* g)
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{
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(void)g;
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/* Hardware display reset. */
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HAL_GPIO_WritePin(GPIOH, GPIO_PIN_7, GPIO_PIN_RESET);
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gfxSleepMilliseconds(20);
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HAL_GPIO_WritePin(GPIOH, GPIO_PIN_7, GPIO_PIN_SET);
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gfxSleepMilliseconds(10);
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/* Turn on backlight. */
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HAL_GPIO_WritePin(GPIOA, GPIO_PIN_3, GPIO_PIN_RESET);
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}
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/**
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* @brief Extra initialization that is performed after the LTDC intialization.
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*
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* @param g: Display paramter structure.
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*/
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static GFXINLINE void post_init_board(GDisplay* g)
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{
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(void)g;
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DSI_LPCmdTypeDef dsiAPBCmd;
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/* Enable the DSI host and wrapper after the LTDC initialization
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To avoid any synchronization issue, the DSI shall be started after enabling the LTDC */
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HAL_DSI_Start(&dsiHandle);
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/* The configuration commands for the LCD have to be send through the dsiAPBCmd
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* interface as the adapted command mode only supports DCS, WMS and WMC commands. */
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dsiAPBCmd.LPGenShortWriteNoP = DSI_LP_GSW0P_ENABLE; // Put everything in low power mode
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dsiAPBCmd.LPGenShortWriteOneP = DSI_LP_GSW1P_ENABLE;
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dsiAPBCmd.LPGenShortWriteTwoP = DSI_LP_GSW2P_ENABLE;
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dsiAPBCmd.LPGenShortReadNoP = DSI_LP_GSR0P_ENABLE;
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dsiAPBCmd.LPGenShortReadOneP = DSI_LP_GSR1P_ENABLE;
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dsiAPBCmd.LPGenShortReadTwoP = DSI_LP_GSR2P_ENABLE;
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dsiAPBCmd.LPGenLongWrite = DSI_LP_GLW_ENABLE;
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dsiAPBCmd.LPDcsShortWriteNoP = DSI_LP_DSW0P_ENABLE;
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dsiAPBCmd.LPDcsShortWriteOneP = DSI_LP_DSW1P_ENABLE;
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dsiAPBCmd.LPDcsShortReadNoP = DSI_LP_DSR0P_ENABLE;
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dsiAPBCmd.LPDcsLongWrite = DSI_LP_DLW_ENABLE;
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HAL_DSI_ConfigCommand(&dsiHandle, &dsiAPBCmd);
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/* Configure the LCD. */
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#ifdef GDISP_PIXELFORMAT_RGB565
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OTM8009A_Init(OTM8009A_FORMAT_RBG565, 1);
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#else
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OTM8009A_Init(OTM8009A_FORMAT_RGB888, 1);
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#endif
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/* Enable the tearing effect line. */
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HAL_DSI_ShortWrite(&dsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, DSI_SET_TEAR_ON, 0); // Only V-Blanking info
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/* Disable the APB command mode again to go into adapted command mode. (going into high speed mode) */
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dsiAPBCmd.LPGenShortWriteNoP = DSI_LP_GSW0P_DISABLE;
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dsiAPBCmd.LPGenShortWriteOneP = DSI_LP_GSW1P_DISABLE;
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dsiAPBCmd.LPGenShortWriteTwoP = DSI_LP_GSW2P_DISABLE;
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dsiAPBCmd.LPGenShortReadNoP = DSI_LP_GSR0P_DISABLE;
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dsiAPBCmd.LPGenShortReadOneP = DSI_LP_GSR1P_DISABLE;
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dsiAPBCmd.LPGenShortReadTwoP = DSI_LP_GSR2P_DISABLE;
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dsiAPBCmd.LPGenLongWrite = DSI_LP_GLW_DISABLE;
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dsiAPBCmd.LPDcsShortWriteNoP = DSI_LP_DSW0P_DISABLE;
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dsiAPBCmd.LPDcsShortWriteOneP = DSI_LP_DSW1P_DISABLE;
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dsiAPBCmd.LPDcsShortReadNoP = DSI_LP_DSR0P_DISABLE;
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dsiAPBCmd.LPDcsLongWrite = DSI_LP_DLW_DISABLE;
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HAL_DSI_ConfigCommand(&dsiHandle, &dsiAPBCmd);
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HAL_DSI_Refresh(&dsiHandle);
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}
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/**
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* @brief DCS or Generic short/long write command
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* @param NbrParams: Number of parameters. It indicates the write command mode:
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* If inferior to 2, a long write command is performed else short.
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* @param pParams: Pointer to parameter values table.
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* @retval HAL status
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*/
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void DSI_IO_WriteCmd(uint32_t NbrParams, uint8_t *pParams)
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{
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if(NbrParams <= 1)
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{
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HAL_DSI_ShortWrite(&dsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, pParams[0], pParams[1]);
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}
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else
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{
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HAL_DSI_LongWrite(&dsiHandle, 0, DSI_DCS_LONG_PKT_WRITE, NbrParams, pParams[NbrParams], pParams);
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}
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}
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/**
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* @brief Delay function for the OTM8009A driver.
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*
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* @param Delay: The requested delay in ms.
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*/
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void OTM8009A_IO_Delay(uint32_t Delay)
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{
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gfxSleepMilliseconds(Delay);
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}
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#endif /* _GDISP_LLD_BOARD_H */
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