97 lines
2.9 KiB
C
97 lines
2.9 KiB
C
/*
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ChibiOS/GFX - Copyright (C) 2012
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Joel Bodenmann aka Tectu <joel@unormal.org>
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This file is part of ChibiOS/GFX.
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ChibiOS/GFX is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/GFX is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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driver quickly hacked together from a chinese sourcecode that came
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with the board and existing ili9320 code by Chris van Dongen (sjaak)
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(sjaak2002 at msn.com)
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Also added rotation for 180 and 270 degrees and minor tweaks to
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setcursor
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Added code comes without warranty and free bugs. Feel free to use
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or misuse the added code :D
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*/
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/**
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* @file drivers/gdisp/ILI9325/gdisp_lld_board_hy_stm32_100p.h
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* @brief GDISP Graphic Driver subsystem board interface for the ILI9325 display.
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*
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* @addtogroup GDISP
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* @{
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*/
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#ifndef GDISP_LLD_BOARD_H
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#define GDISP_LLD_BOARD_H
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#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
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#define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
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static __inline void lld_gdisp_init_board(void) {
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/* FSMC setup for F1 */
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rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
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/* set pin modes */
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/* IOBus busD = {GPIOD, PAL_WHOLE_PORT, 0};
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IOBus busE = {GPIOE, PAL_WHOLE_PORT, 0};
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palSetBusMode(&busD, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetBusMode(&busE, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetPadMode(GPIOE, GPIOE_TFT_RST, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, GPIOD_TFT_LIGHT, PAL_MODE_OUTPUT_PUSHPULL); */
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const unsigned char FSMC_Bank = 0;
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/* FSMC timing */
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FSMC_Bank1->BTCR[FSMC_Bank+1] = (6) | (10 << 8) | (10 << 16);
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/* Bank1 NOR/SRAM control register configuration
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* This is actually not needed as already set by default after reset */
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FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
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}
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static __inline void lld_gdisp_reset_pin(bool_t state) {
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if(state)
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palClearPad(GPIOE, GPIOE_TFT_RST);
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else
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palSetPad(GPIOE, GPIOE_TFT_RST);
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}
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static __inline void lld_gdisp_write_index(uint16_t reg) {
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GDISP_REG = reg;
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}
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static __inline void lld_gdisp_write_data(uint16_t data) {
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GDISP_RAM = data;
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}
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static __inline uint16_t lld_gdisp_read_data(void) {
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return GDISP_RAM;
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}
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static __inline void lld_gdisp_backlight(uint8_t percent) {
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percent=percent; // avoid a warning
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}
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#endif /* GDISP_LLD_BOARD_H */
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/** @} */
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