166 lines
6.0 KiB
C
166 lines
6.0 KiB
C
/**
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******************************************************************************
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* @file stm32746g_discovery_sdram.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 25-June-2015
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* @brief This file contains the common defines and functions prototypes for
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* the stm32746g_discovery_sdram.c driver.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32746G_DISCOVERY_SDRAM_H
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#define __STM32746G_DISCOVERY_SDRAM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f7xx_hal.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup STM32746G_DISCOVERY
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* @{
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*/
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/** @addtogroup STM32746G_DISCOVERY_SDRAM
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* @{
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*/
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/** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Types STM32746G_DISCOVERY_SDRAM Exported Types
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* @{
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*/
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/**
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* @brief SDRAM status structure definition
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*/
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#define SDRAM_OK ((uint8_t)0x00)
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#define SDRAM_ERROR ((uint8_t)0x01)
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/** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Constants STM32746G_DISCOVERY_SDRAM Exported Constants
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* @{
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*/
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#define SDRAM_DEVICE_ADDR ((uint32_t)0xC0000000)
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#define SDRAM_DEVICE_SIZE ((uint32_t)0x800000) /* SDRAM device size in MBytes */
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/* #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_8 */
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#define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_16
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#define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_2
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/* #define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_3 */
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#define REFRESH_COUNT ((uint32_t)0x0603) /* SDRAM refresh counter (100Mhz SD clock) */
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#define SDRAM_TIMEOUT ((uint32_t)0xFFFF)
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/* DMA definitions for SDRAM DMA transfer */
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#define __DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
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#define __DMAx_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
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#define SDRAM_DMAx_CHANNEL DMA_CHANNEL_0
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#define SDRAM_DMAx_STREAM DMA2_Stream0
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#define SDRAM_DMAx_IRQn DMA2_Stream0_IRQn
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#define SDRAM_DMAx_IRQHandler DMA2_Stream0_IRQHandler
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/**
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* @}
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*/
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/**
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* @brief FMC SDRAM Mode definition register defines
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*/
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#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
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#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
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#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
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#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
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#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
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#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
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#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
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#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
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#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
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#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
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#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
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/**
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* @}
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*/
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/** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Macro STM32746G_DISCOVERY_SDRAM Exported Macro
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32746G_DISCOVERY_SDRAM_Exported_Functions
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* @{
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*/
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uint8_t BSP_SDRAM_Init(void);
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uint8_t BSP_SDRAM_DeInit(void);
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void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount);
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uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
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uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
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uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
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uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
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uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd);
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void BSP_SDRAM_DMA_IRQHandler(void);
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/* These functions can be modified in case the current settings (e.g. DMA stream)
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need to be changed for specific application needs */
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void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params);
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void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32746G_DISCOVERY_SDRAM_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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