147 lines
4.5 KiB
C
147 lines
4.5 KiB
C
/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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// Avoid naming collisions with CubeHAL
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#undef Red
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#undef Green
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#undef Blue
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// Include CubeHAL
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#include "stm32f4xx_hal.h"
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#include "stm324x9i_eval_sdram.h"
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// Panel parameters
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// This panel is a AMPIRE640480 panel.
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static const ltdcConfig driverCfg = {
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640, 480, // Width, Height (pixels)
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30, 3, // Horizontal, Vertical sync (pixels)
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114, 32, // Horizontal, Vertical back porch (pixels)
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16, 10, // Horizontal, Vertical front porch (pixels)
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0, // Sync flags
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0x000000, // Clear color (RGB888)
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{ // Background layer config
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(LLDCOLOR_TYPE *)SDRAM_DEVICE_ADDR, // Frame buffer address
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640, 480, // Width, Height (pixels)
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640 * LTDC_PIXELBYTES, // Line pitch (bytes)
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LTDC_PIXELFORMAT, // Pixel format
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0, 0, // Start pixel position (x, y)
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640, 480, // Size of virtual layer (cx, cy)
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LTDC_COLOR_FUCHSIA, // Default color (ARGB8888)
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0x980088, // Color key (RGB888)
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LTDC_BLEND_FIX1_FIX2, // Blending factors
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0, // Palette (RGB888, can be NULL)
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0, // Palette length
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0xFF, // Constant alpha factor
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LTDC_LEF_ENABLE // Layer configuration flags
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},
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LTDC_UNUSED_LAYER_CONFIG // Foreground layer config
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};
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// LCD Clock values
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#define LCD_PLLSAIN_VALUE 192 // 151
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#define LCD_PLLSAIR_VALUE 2 // 3
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#define LCD_PLLSAIDIVR_VALUE RCC_PLLSAIDIVR_4 // RCC_PLLSAIDIVR_2
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static void configureLcdClock(void)
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{
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#if 1
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RCC_PeriphCLKInitTypeDef periph_clk_init_struct;
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periph_clk_init_struct.PLLSAI.PLLSAIN = LCD_PLLSAIN_VALUE;
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periph_clk_init_struct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
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periph_clk_init_struct.PLLSAI.PLLSAIR = LCD_PLLSAIR_VALUE;
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periph_clk_init_struct.PLLSAIDivR = LCD_PLLSAIDIVR_VALUE;
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HAL_RCCEx_PeriphCLKConfig(&periph_clk_init_struct);
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#else
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#define LCD_PLLSAIQ_VALUE 7
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/* PLLSAI activation.*/
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RCC->PLLSAICFGR = (LCD_PLLSAIN_VALUE << 6) | (LCD_PLLSAIR_VALUE << 28) | (LCD_PLLSAIQ_VALUE << 24);
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RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | LCD_PLLSAIDIVR_VALUE;
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RCC->CR |= RCC_CR_PLLSAION;
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#endif
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}
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static void configureLcdPins(void)
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{
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GPIO_InitTypeDef GPIO_Init_Structure;
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// Enable peripheral clocks
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__GPIOI_CLK_ENABLE();
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__GPIOJ_CLK_ENABLE();
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__GPIOK_CLK_ENABLE();
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/*** LTDC Pins configuration ***/
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// GPIOI
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GPIO_Init_Structure.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
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GPIO_Init_Structure.Mode = GPIO_MODE_AF_PP;
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GPIO_Init_Structure.Pull = GPIO_NOPULL;
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GPIO_Init_Structure.Speed = GPIO_SPEED_FAST;
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GPIO_Init_Structure.Alternate = GPIO_AF14_LTDC;
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HAL_GPIO_Init(GPIOI, &GPIO_Init_Structure);
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// GPIOJ
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GPIO_Init_Structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | \
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GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | \
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GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | \
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GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
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GPIO_Init_Structure.Mode = GPIO_MODE_AF_PP;
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GPIO_Init_Structure.Pull = GPIO_NOPULL;
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GPIO_Init_Structure.Speed = GPIO_SPEED_FAST;
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GPIO_Init_Structure.Alternate = GPIO_AF14_LTDC;
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HAL_GPIO_Init(GPIOJ, &GPIO_Init_Structure);
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// GPIOK configuration
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GPIO_Init_Structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | \
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GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
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GPIO_Init_Structure.Mode = GPIO_MODE_AF_PP;
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GPIO_Init_Structure.Pull = GPIO_NOPULL;
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GPIO_Init_Structure.Speed = GPIO_SPEED_FAST;
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GPIO_Init_Structure.Alternate = GPIO_AF14_LTDC;
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HAL_GPIO_Init(GPIOK, &GPIO_Init_Structure);
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}
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static GFXINLINE void init_board(GDisplay* g)
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{
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// As we are not using multiple displays we set g->board to NULL as we don't use it
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g->board = 0;
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switch(g->controllerdisplay) {
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case 0:
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// Set LCD pixel clock rate
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configureLcdClock();
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// Set pin directions
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configureLcdPins();
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// Initialise the SDRAM
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BSP_SDRAM_Init();
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break;
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}
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}
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static GFXINLINE void post_init_board(GDisplay* g)
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{
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(void) g;
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}
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static GFXINLINE void set_backlight(GDisplay* g, uint8_t percent)
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{
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(void) g;
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(void) percent;
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}
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#endif /* _GDISP_LLD_BOARD_H */
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