182 lines
5.3 KiB
C
182 lines
5.3 KiB
C
/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://chibios-gfx.com/license.html
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*/
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/**
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* @file drivers/gdisp/SSD1289/gdisp_lld_board_example_fsmc.h
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* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
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*
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* @addtogroup GDISP
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* @{
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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#if defined(GDISP_USE_GPIO)
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#define Set_CS palSetPad(GDISP_CMD_PORT, GDISP_CS);
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#define Clr_CS palClearPad(GDISP_CMD_PORT, GDISP_CS);
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#define Set_RS palSetPad(GDISP_CMD_PORT, GDISP_RS);
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#define Clr_RS palClearPad(GDISP_CMD_PORT, GDISP_RS);
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#define Set_WR palSetPad(GDISP_CMD_PORT, GDISP_WR);
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#define Clr_WR palClearPad(GDISP_CMD_PORT, GDISP_WR);
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#define Set_RD palSetPad(GDISP_CMD_PORT, GDISP_RD);
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#define Clr_RD palClearPad(GDISP_CMD_PORT, GDISP_RD);
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#endif
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#if defined(GDISP_USE_FSMC)
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/* Using FSMC A16 as RS */
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#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
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#define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
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#endif
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/**
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* @brief Send data to the index register.
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*
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* @param[in] index The index register to set
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*
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* @notapi
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*/
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static inline void write_index(uint16_t index) { GDISP_REG = index; }
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/**
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* @brief Send data to the lcd.
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*
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* @param[in] data The data to send
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*
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* @notapi
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*/
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static inline void write_data(uint16_t data) { GDISP_RAM = data; }
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/**
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* @brief Initialise the board for the display.
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* @notes Performs the following functions:
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* 1. initialise the io port used by your display
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* 2. initialise the reset pin (initial state not-in-reset)
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* 3. initialise the chip select pin (initial state not-active)
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* 4. initialise the backlight pin (initial state back-light off)
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*
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* @notapi
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*/
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static inline void init_board(void) {
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const unsigned char FSMC_Bank = 0;
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#if defined(STM32F1XX) || defined(STM32F3XX)
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/* FSMC setup for F1/F3 */
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rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
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#if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
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#error "DMA not implemented for F1/F3 Devices"
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#endif
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#elif defined(STM32F4XX) || defined(STM32F2XX)
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/* STM32F2-F4 FSMC init */
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rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
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#if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
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if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) chSysHalt();
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dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
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dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
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#endif
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#else
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#error "FSMC not implemented for this device"
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#endif
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/* set pins to FSMC mode */
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IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
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(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
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IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
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(1 << 13) | (1 << 14) | (1 << 15), 0};
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palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
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palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
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/* FSMC timing */
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FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
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| (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
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| (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
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/* Bank1 NOR/SRAM control register configuration
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* This is actually not needed as already set by default after reset */
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FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
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}
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static inline void post_init_board(void) {
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const unsigned char FSMC_Bank = 0;
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/* FSMC delay reduced as the controller now runs at full speed */
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FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
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FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
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}
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/**
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* @brief Set or clear the lcd reset pin.
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*
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* @param[in] state TRUE = lcd in reset, FALSE = normal operation
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*
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* @notapi
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*/
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static inline void setpin_reset(bool_t state) {
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(void) state;
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/* Nothing to do here */
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}
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/**
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* @brief Set the lcd back-light level.
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*
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* @param[in] percent 0 to 100%
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*
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* @notapi
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*/
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static inline void set_backlight(uint8_t percent) {
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//duty_cycle is 00..FF
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//Work in progress: the SSD1963 has a built-in PWM, its output can
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//be used by a Dynamic Background Control or by a host (user)
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//Check your LCD's hardware, the PWM connection is default left open and instead
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//connected to a LED connection on the breakout board
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write_index(SSD1963_SET_PWM_CONF);//set PWM for BackLight
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write_data(0x0001);
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write_data(percent & 0x00FF);
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write_data(0x0001);//controlled by host (not DBC), enabled
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write_data(0x00FF);
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write_data(0x0060);//don't let it go too dark, avoid a useless LCD
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write_data(0x000F);//prescaler ???
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}
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/**
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* @brief Take exclusive control of the bus
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*
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* @notapi
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*/
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static inline void acquire_bus(void) {
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/* Nothing to do here */
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}
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/**
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* @brief Release exclusive control of the bus
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*
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* @notapi
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*/
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static inline void release_bus(void) {
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/* Nothing to do here */
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}
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#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
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/**
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* @brief Read data from the lcd.
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*
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* @return The data from the lcd
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* @note The chip select may need to be asserted/de-asserted
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* around the actual spi read
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*
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* @notapi
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*/
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static inline uint16_t read_data(void) { return GDISP_RAM; }
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#endif
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#endif /* _GDISP_LLD_BOARD_H */
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/** @} */
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