315 lines
10 KiB
C
315 lines
10 KiB
C
/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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#include "stm32f746g_discovery_sdram.h"
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#include "stm32f7xx_hal_rcc.h"
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#include "stm32f7xx_hal_gpio.h"
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#include <string.h>
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#if !GFX_USE_OS_CHIBIOS
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#define AFRL AFR[0]
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#define AFRH AFR[1]
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#endif
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static const ltdcConfig driverCfg = {
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480, 272, // Width, Height (pixels)
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41, 10, // Horizontal, Vertical sync (pixels)
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13, 2, // Horizontal, Vertical back porch (pixels)
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32, 2, // Horizontal, Vertical front porch (pixels)
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0, // Sync flags
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0x000000, // Clear color (RGB888)
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{ // Background layer config
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(LLDCOLOR_TYPE *)SDRAM_DEVICE_ADDR, // Frame buffer address
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480, 272, // Width, Height (pixels)
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480 * LTDC_PIXELBYTES, // Line pitch (bytes)
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LTDC_PIXELFORMAT, // Pixel format
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0, 0, // Start pixel position (x, y)
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480, 272, // Size of virtual layer (cx, cy)
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LTDC_COLOR_FUCHSIA, // Default color (ARGB8888)
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0x980088, // Color key (RGB888)
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LTDC_BLEND_FIX1_FIX2, // Blending factors
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0, // Palette (RGB888, can be NULL)
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0, // Palette length
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0xFF, // Constant alpha factor
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LTDC_LEF_ENABLE // Layer configuration flags
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},
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LTDC_UNUSED_LAYER_CONFIG // Foreground layer config
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};
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/* Display timing */
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#define RK043FN48H_FREQUENCY_DIVIDER 5
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static void configureLcdPins(void)
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{
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// Enable GPIOs clock
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN; // GPIOE
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOGEN; // GPIOG
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOIEN; // GPIOI
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOJEN; // GPIOJ
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOKEN; // GPIOK
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// PI15: LCD_R0
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GPIOI->MODER |= GPIO_MODER_MODER15_1;
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GPIOI->OTYPER &=~ GPIO_OTYPER_OT_15;
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GPIOI->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR15_0 | GPIO_OSPEEDER_OSPEEDR15_1;
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GPIOI->AFRH |= ((uint32_t)0xE << 4*7);
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// PJ0: LCD_R1
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GPIOJ->MODER |= GPIO_MODER_MODER0_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_0;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR0_0 | GPIO_OSPEEDER_OSPEEDR0_1;
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GPIOJ->AFRL |= ((uint32_t)0xE << 4*0);
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// PJ1: LCD_R2
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GPIOJ->MODER |= GPIO_MODER_MODER1_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_1;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR1_0 | GPIO_OSPEEDER_OSPEEDR1_1;
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GPIOJ->AFRL |= ((uint32_t)0xE << 4*1);
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// PJ2: LCD_R3
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GPIOJ->MODER |= GPIO_MODER_MODER2_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_2;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR2_0 | GPIO_OSPEEDER_OSPEEDR2_1;
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GPIOJ->AFRL |= ((uint32_t)0xE << 4*2);
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// PJ3: LCD_R4
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GPIOJ->MODER |= GPIO_MODER_MODER3_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_3;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR3_0 | GPIO_OSPEEDER_OSPEEDR3_1;
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GPIOJ->AFRL |= ((uint32_t)0xE << 4*3);
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// PJ4: LCD_R5
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GPIOJ->MODER |= GPIO_MODER_MODER4_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_4;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR4_0 | GPIO_OSPEEDER_OSPEEDR4_1;
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GPIOJ->AFRL |= ((uint32_t)0xE << 4*4);
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// PJ5: LCD_R6
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GPIOJ->MODER |= GPIO_MODER_MODER5_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_5;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR5_0 | GPIO_OSPEEDER_OSPEEDR5_1;
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GPIOJ->AFRL |= ((uint32_t)0xE << 4*5);
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// PJ6: LCD_R7
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GPIOJ->MODER |= GPIO_MODER_MODER6_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_6;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR6_0 | GPIO_OSPEEDER_OSPEEDR6_1;
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GPIOJ->AFRL |= ((uint32_t)0xE << 4*6);
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// PJ7: LCD_G0
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GPIOJ->MODER |= GPIO_MODER_MODER7_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_7;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR7_0 | GPIO_OSPEEDER_OSPEEDR7_1;
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GPIOJ->AFRL |= ((uint32_t)0xE << 4*7);
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// PJ8: LCD_G1
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GPIOJ->MODER |= GPIO_MODER_MODER8_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_8;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR8_0 | GPIO_OSPEEDER_OSPEEDR8_1;
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GPIOJ->AFRH |= ((uint32_t)0xE << 4*0);
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// PJ9: LCD_G2
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GPIOJ->MODER |= GPIO_MODER_MODER9_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_9;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR9_0 | GPIO_OSPEEDER_OSPEEDR9_1;
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GPIOJ->AFRH |= ((uint32_t)0xE << 4*1);
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// PJ10: LCD_G3
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GPIOJ->MODER |= GPIO_MODER_MODER10_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_10;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR10_0 | GPIO_OSPEEDER_OSPEEDR10_1;
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GPIOJ->AFRH |= ((uint32_t)0xE << 4*2);
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// PJ11: LCD_G4
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GPIOJ->MODER |= GPIO_MODER_MODER11_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_11;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR11_0 | GPIO_OSPEEDER_OSPEEDR11_1;
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GPIOJ->AFRH |= ((uint32_t)0xE << 4*3);
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// PK0: LCD_G5
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GPIOK->MODER |= GPIO_MODER_MODER0_0;
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GPIOK->OTYPER &=~ GPIO_OTYPER_OT_0;
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GPIOK->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR0_0 | GPIO_OSPEEDER_OSPEEDR0_1;
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GPIOK->AFRL |= ((uint32_t)0xE << 4*0);
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// PK1: LCD_G6
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GPIOK->MODER |= GPIO_MODER_MODER1_1;
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GPIOK->OTYPER &=~ GPIO_OTYPER_OT_1;
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GPIOK->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR1_0 | GPIO_OSPEEDER_OSPEEDR1_1;
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GPIOK->AFRL |= ((uint32_t)0xE << 4*1);
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// PK2: LCD_G7
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GPIOK->MODER |= GPIO_MODER_MODER2_1;
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GPIOK->OTYPER &=~ GPIO_OTYPER_OT_2;
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GPIOK->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR2_0 | GPIO_OSPEEDER_OSPEEDR2_1;
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GPIOK->AFRL |= ((uint32_t)0xE << 4*2);
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// PE4: LCD_B0
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GPIOE->MODER |= GPIO_MODER_MODER4_1;
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GPIOE->OTYPER &=~ GPIO_OTYPER_OT_4;
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GPIOE->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR4_0 | GPIO_OSPEEDER_OSPEEDR4_1;
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GPIOE->AFRL |= ((uint32_t)0xE << 4*4);
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// PJ13: LCD_B1
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GPIOJ->MODER |= GPIO_MODER_MODER13_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_13;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR13_0 | GPIO_OSPEEDER_OSPEEDR13_1;
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GPIOJ->AFRH |= ((uint32_t)0xE << 4*5);
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// PJ14: LCD_B2
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GPIOJ->MODER |= GPIO_MODER_MODER14_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_14;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR14_0 | GPIO_OSPEEDER_OSPEEDR14_1;
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GPIOJ->AFRH |= ((uint32_t)0xE << 4*6);
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// PJ15: LCD_B3
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GPIOJ->MODER |= GPIO_MODER_MODER15_1;
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GPIOJ->OTYPER &=~ GPIO_OTYPER_OT_15;
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GPIOJ->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR15_0 | GPIO_OSPEEDER_OSPEEDR15_1;
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GPIOJ->AFRH |= ((uint32_t)0xE << 4*7);
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// PG12: LCD_B4
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GPIOG->MODER |= GPIO_MODER_MODER12_1;
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GPIOG->OTYPER &=~ GPIO_OTYPER_OT_12;
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GPIOG->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR12_0 | GPIO_OSPEEDER_OSPEEDR12_1;
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GPIOG->AFRH |= ((uint32_t)0xE << 4*4);
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// PK4: LCD_B5
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GPIOK->MODER |= GPIO_MODER_MODER4_1;
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GPIOK->OTYPER &=~ GPIO_OTYPER_OT_4;
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GPIOK->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR4_0 | GPIO_OSPEEDER_OSPEEDR4_1;
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GPIOK->AFRL |= ((uint32_t)0xE << 4*4);
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// PK5: LCD_B6
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GPIOK->MODER |= GPIO_MODER_MODER5_1;
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GPIOK->OTYPER &=~ GPIO_OTYPER_OT_5;
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GPIOK->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR5_0 | GPIO_OSPEEDER_OSPEEDR5_1;
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GPIOK->AFRL |= ((uint32_t)0xE << 4*5);
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// PK6: LCD_B7
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GPIOK->MODER |= GPIO_MODER_MODER6_1;
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GPIOK->OTYPER &=~ GPIO_OTYPER_OT_6;
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GPIOK->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR6_0 | GPIO_OSPEEDER_OSPEEDR6_1;
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GPIOK->AFRL |= ((uint32_t)0xE << 4*6);
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// PK7: LCD_DE
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GPIOK->MODER |= GPIO_MODER_MODER7_1;
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GPIOK->OTYPER &=~ GPIO_OTYPER_OT_7;
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GPIOK->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR7_0 | GPIO_OSPEEDER_OSPEEDR7_1;
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GPIOK->AFRL |= ((uint32_t)0xE << 4*7);
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// PI9: LCD_VSYNC
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GPIOI->MODER |= GPIO_MODER_MODER9_1;
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GPIOI->OTYPER &=~ GPIO_OTYPER_OT_9;
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GPIOI->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR9_0 | GPIO_OSPEEDER_OSPEEDR9_1;
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GPIOI->AFRH |= ((uint32_t)0xE << 4*1);
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// PI10: LCD_VSYNC
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GPIOI->MODER |= GPIO_MODER_MODER10_1;
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GPIOI->OTYPER &=~ GPIO_OTYPER_OT_10;
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GPIOI->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR10_0 | GPIO_OSPEEDER_OSPEEDR10_1;
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GPIOI->AFRH |= ((uint32_t)0xE << 4*2);
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// PI13: LCD_INT
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GPIOI->MODER |= GPIO_MODER_MODER13_1;
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GPIOI->OTYPER &=~ GPIO_OTYPER_OT_13;
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GPIOI->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR13_0 | GPIO_OSPEEDER_OSPEEDR13_1;
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GPIOI->AFRH |= ((uint32_t)0xE << 4*5);
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// PI14: LCD_CLK
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GPIOI->MODER |= GPIO_MODER_MODER14_1;
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GPIOI->OTYPER &=~ GPIO_OTYPER_OT_14;
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GPIOI->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR14_0 | GPIO_OSPEEDER_OSPEEDR14_1;
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GPIOI->AFRH |= ((uint32_t)0xE << 4*6);
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// PI8: ???
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GPIOI->MODER |= GPIO_MODER_MODER8_1;
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GPIOI->OTYPER &=~ GPIO_OTYPER_OT_8;
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GPIOI->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR8_0 | GPIO_OSPEEDER_OSPEEDR8_1;
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GPIOI->AFRH |= ((uint32_t)0xE << 4*0);
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// PI12: LCD_DISP_PIN
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GPIOI->MODER |= GPIO_MODER_MODER12_0;
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GPIOI->OTYPER &=~ GPIO_OTYPER_OT_12;
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GPIOI->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR12_0 | GPIO_OSPEEDER_OSPEEDR12_1;
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// PK3: LCD_BL_CTRL
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GPIOK->MODER |= GPIO_MODER_MODER3_0;
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GPIOK->OTYPER &=~ GPIO_OTYPER_OT_3;
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GPIOK->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR3_0 | GPIO_OSPEEDER_OSPEEDR3_1;
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}
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static GFXINLINE void init_board(GDisplay *g) {
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// As we are not using multiple displays we set g->board to NULL as we don't use it
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g->board = 0;
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switch(g->controllerdisplay) {
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case 0:
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// Set pin directions
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configureLcdPins();
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// Enable the display and turn on the backlight
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GPIOI->ODR |= (1 << 12); // PowerOn
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GPIOK->ODR |= (1 << 3); // Backlight on
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#define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */
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#define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */
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#define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */
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#define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */
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#define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */
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#define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */
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// RK043FN48H LCD clock configuration
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// PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz
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// PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 192 Mhz
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// PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 192/5 = 38.4 Mhz
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// LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_4 = 38.4/4 = 9.6Mhz
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#define STM32_PLLSAIN_VALUE 192
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#undef STM32_PLLSAIQ_VALUE
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#define STM32_PLLSAIQ_VALUE 7
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#undef STM32_PLLSAIR_VALUE
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#define STM32_PLLSAIR_VALUE RK043FN48H_FREQUENCY_DIVIDER
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#define STM32_PLLSAIR_POST STM32_SAIR_DIV4
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RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24);
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RCC->DCKCFGR1 = (RCC->DCKCFGR1 & ~RCC_DCKCFGR1_PLLSAIDIVR) | STM32_PLLSAIR_POST;
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RCC->CR |= RCC_CR_PLLSAION;
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// Initialise the SDRAM
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BSP_SDRAM_Init();
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// Clear the SDRAM
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//memset((void *)SDRAM_BANK_ADDR, 0, 0x400000);
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break;
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}
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}
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static GFXINLINE void post_init_board(GDisplay* g) {
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(void) g;
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}
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static GFXINLINE void set_backlight(GDisplay* g, uint8_t percent) {
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(void) g;
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// ST was stupid enought not to hook this up to a pin that
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// is able to act as PWM output...
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if (percent <= 0) {
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GPIOK->ODR &=~ (1 << 3); // Backlight off
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} else {
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GPIOK->ODR |= (1 << 3); // Backlight on
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}
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}
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#endif /* _GDISP_LLD_BOARD_H */
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