227 lines
6.1 KiB
C
227 lines
6.1 KiB
C
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/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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#ifndef _GINPUT_LLD_MOUSE_BOARD_H
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#define _GINPUT_LLD_MOUSE_BOARD_H
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#include "stm32f7xx.h"
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// Resolution and Accuracy Settings
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#define GMOUSE_FT5336_PEN_CALIBRATE_ERROR 8
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#define GMOUSE_FT5336_PEN_CLICK_ERROR 6
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#define GMOUSE_FT5336_PEN_MOVE_ERROR 4
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#define GMOUSE_FT5336_FINGER_CALIBRATE_ERROR 14
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#define GMOUSE_FT5336_FINGER_CLICK_ERROR 18
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#define GMOUSE_FT5336_FINGER_MOVE_ERROR 14
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// How much extra data to allocate at the end of the GMouse structure for the board's use
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#define GMOUSE_FT5336_BOARD_DATA_SIZE 0
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// Set this to TRUE if you want self-calibration.
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// NOTE: This is not as accurate as real calibration.
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// It requires the orientation of the touch panel to match the display.
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// It requires the active area of the touch panel to exactly match the display size.
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#define GMOUSE_FT5336_SELF_CALIBRATE FALSE
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// The FT5336 slave address
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#define FT5336_ADDR 0x70
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static bool_t init_board(GMouse* m, unsigned instance)
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{
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(void)m;
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(void)instance;
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// I2C3_SCL GPIOH7, alternate, opendrain, highspeed
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // Enable clock for
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GPIOB->MODER |= GPIO_MODER_MODER7_1; // Alternate function
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GPIOB->OTYPER |= GPIO_OTYPER_OT_7; // OpenDrain
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GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_0; // PullUp
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GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR7; // HighSpeed
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GPIOB->AFR[0] |= (0b0100 << 4*0); // AF4
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// I2C3_SDA GPIOH8, alternate, opendrain, highspeed
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // Enable clock
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GPIOB->MODER |= GPIO_MODER_MODER8_1; // Alternate function
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GPIOB->OTYPER |= GPIO_OTYPER_OT_8; // OpenDrain
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GPIOB->PUPDR |= GPIO_PUPDR_PUPDR8_0; // PullUp
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GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR8; // HighSpeed
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GPIOB->AFR[1] |= (0b0100 << 4*0); // AF4
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// Enable I2C3 peripheral clock
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RCC->APB1ENR |= RCC_APB1ENR_I2C3EN;
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// Reset I2C3 peripheral
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RCC->APB1RSTR |= RCC_APB1RSTR_I2C3RST;
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RCC->APB1RSTR &= ~RCC_APB1RSTR_I2C3RST;
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// Set Fm mode
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I2C3->CCR |= I2C_CCR_FS;
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// Set Duty to 50:50
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I2C3->CCR &= ~I2C_CCR_DUTY;
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// Set peripheral clock frequency (APB1 frequency)
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// APB1CLK running at 42 MHz
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I2C3->CR2 |= 42;
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// Set I2C bus clock speed to 400 kHz
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// Period of 400 kHz is 2.5 us, half of that is 1.25 us. TPCLK1 is
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// 40 ns (see below). 1.25 us / 40 ns = 32.
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I2C3->CCR |= (I2C_CCR_CCR & 32);
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// Rise time
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// Period of 42 MHz is 24 ns. Rise time is 1000 ns. 1000/24 = 42.
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I2C3->TRISE |= (I2C_TRISE_TRISE & 42);
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// Disable POS
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I2C3->CR1 &=~ I2C_CR1_POS;
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// Enable I2C3
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I2C3->CR1 |= I2C_CR1_PE;
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return TRUE;
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}
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static void write_reg(GMouse* m, uint8_t reg, uint8_t val)
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{
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(void)m;
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// Generate start condition
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Write = last bit is 0)
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I2C3->DR = ((FT5336_ADDR | 0) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// Send register address
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while (!(I2C3->SR1 & I2C_SR1_TXE));
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I2C3->DR = (reg & I2C_DR_DR);
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// Send data
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while (!(I2C3->SR1 & I2C_SR1_TXE));
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I2C3->DR = (val & I2C_DR_DR);
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// Generate stop condition when we are done transmitting
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while (!(I2C3->SR1 & I2C_SR1_TXE));
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I2C3->CR1 |= I2C_CR1_STOP;
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}
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static uint8_t read_byte(GMouse* m, uint8_t reg)
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{
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(void)m;
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uint8_t ret = 0x00;
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// Generate start condition
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Write = last bit is 0)
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I2C3->DR = ((FT5336_ADDR | 0) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// Send register address that we want to read
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I2C3->DR = (reg & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_BTF));
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// Generate start condition (repeated start)
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Read = last bit is 1)
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I2C3->DR = ((FT5336_ADDR | 1) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Set up for one byte receival
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I2C3->CR1 &= ~I2C_CR1_POS;
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//I2C3->CR1 |= I2C_CR1_ACK;
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// Clean SR1_ACK. This needs to be done on the last byte received from slave
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I2C3->CR1 &= ~I2C_CR1_ACK;
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// Generate stop condition
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I2C3->CR1 |= I2C_CR1_STOP;
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return ret;
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}
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static uint16_t read_word(GMouse* m, uint8_t reg)
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{
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(void)m;
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uint16_t ret = 0x00;
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// Generate start condition
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Write = last bit is 0)
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I2C3->DR = ((FT5336_ADDR | 0) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// Send register address that we want to read
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I2C3->DR = (reg & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_BTF));
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// Generate start condition (repeated start)
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Read = last bit is 1)
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I2C3->DR = ((FT5336_ADDR | 1) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Set up for two byte receival
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I2C3->CR1 |= I2C_CR1_POS;
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//I2C3->CR1 &= ~I2C_CR1_ACK;
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I2C3->SR1 &= ~I2C_SR1_ADDR;
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// The slave should now send a byte to us.
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while (!(I2C3->SR1 & I2C_SR1_RXNE));
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ret = (uint16_t)((I2C3->DR & 0x00FF) << 8);
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// Set STOP and clear ACK right after reading the second last byte
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I2C3->CR1 |= I2C_CR1_STOP;
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I2C3->CR1 &= ~I2C_CR1_ACK;
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// The second byte becomes available after sending the stop condition
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ret |= (I2C3->DR & 0x00FF);
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// Get back to original state
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I2C3->CR1 &= ~I2C_CR1_POS;
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return ret;
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}
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#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
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