116 lines
3.1 KiB
C
116 lines
3.1 KiB
C
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/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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/**
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* @file boards/addons/gdisp/board_SSD1306_spi.h
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* @brief GDISP Graphic Driver subsystem board interface for the SSD1306 display.
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*
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* @note This file contains a mix of hardware specific and operating system specific
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* code. You will need to change it for your CPU and/or operating system.
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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// Pin & SPI setup
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#define SPI_DRIVER (&SPID2)
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#define SPI_PORT GPIOB
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#define SCK_PAD 13
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#define MISO_PAD 14
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#define MOSI_PAD 15
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#define CS_PORT GPIOC
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#define RESET_PORT GPIOC
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#define DNC_PORT GPIOC
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#define CS_PAD 7 // 0 = chip selected
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#define RESET_PAD 8 // 0 = reset
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#define DNC_PAD 9 // control=0, data=1
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static SPIConfig spi_cfg = { NULL, CS_PORT, CS_PAD, 0 };
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static inline void init_board(GDisplay *g) {
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(void) g;
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g->board = 0;
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// Maximum speed of SSD1306 is 10Mhz, so set SPI speed less or = to that.
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//
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// STM32 specific setup
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// STM32_PCLK1 is APB1 frequence in hertz.
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// STM32_PCLK2 is APB2 frequence in hertz.
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// See manual clock diagram to determine APB1 or APB2 for spi in use.
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// SPI2 uses APB1 clock on stm32151
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// BR bits divide PCLK as follows
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// 000 /2 = 16 MHz
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// 001 /4 = 8 MHz
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// 010 /8 = 4 MHz
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// 011 /16 = 2 MHz
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// 100 /32 = 1 MHz
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// 101 /64 = 500 kHz
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// 110 /128 = 250 kHz
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// 111 /256 = 125 kHz
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unsigned long spi_clk = STM32_PCLK1 / 2;
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unsigned code = 0;
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while (spi_clk > 10000000) {
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code++;
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spi_clk /= 2;
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}
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spi_cfg.cr1 |= (code << 3);
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if (g->controllerdisplay == 0) {
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palSetPadMode(SPI_PORT, SCK_PAD, PAL_MODE_ALTERNATE(5)|PAL_STM32_OTYPE_PUSHPULL|PAL_STM32_OSPEED_MID2);
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palSetPadMode(SPI_PORT, MOSI_PAD, PAL_MODE_ALTERNATE(5)|PAL_STM32_OTYPE_PUSHPULL|PAL_STM32_OSPEED_MID2);
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palSetPadMode(SPI_PORT, MISO_PAD, PAL_MODE_ALTERNATE(5));
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palSetPadMode(RESET_PORT, RESET_PAD, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(CS_PORT, CS_PAD, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(DNC_PORT, DNC_PAD, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPad(CS_PORT, CS_PAD);
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palSetPad(RESET_PORT, RESET_PAD);
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palClearPad(DNC_PORT, DNC_PAD);
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}
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}
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static inline void post_init_board(GDisplay *g) {
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(void) g;
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}
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static inline void setpin_reset(GDisplay *g, bool_t state) {
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(void) g;
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palWritePad(RESET_PORT, RESET_PAD, !state);
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}
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static inline void acquire_bus(GDisplay *g) {
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(void) g;
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spiAcquireBus(SPI_DRIVER);
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spiStart(SPI_DRIVER, &spi_cfg);
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spiSelect(SPI_DRIVER);
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}
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static inline void release_bus(GDisplay *g) {
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(void) g;
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spiUnselect(SPI_DRIVER);
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spiStop(SPI_DRIVER);
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spiReleaseBus(SPI_DRIVER);
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}
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static inline void write_cmd(GDisplay *g, uint8_t cmd) {
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(void) g;
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static uint8_t buf;
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palClearPad(DNC_PORT, DNC_PAD);
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buf = cmd;
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spiSend(SPI_DRIVER, 1, &buf);
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}
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static inline void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
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(void) g;
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palSetPad(DNC_PORT, DNC_PAD);
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spiSend(SPI_DRIVER, length, data);
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}
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#endif /* _GDISP_LLD_BOARD_H */
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