SSD1289 tidy up

ugfx_release_2.6
inmarket 2013-09-30 13:39:39 +10:00
parent 3480001a79
commit 2c11cc3b94
1 changed files with 3 additions and 14 deletions

View File

@ -42,8 +42,6 @@
// Some common routines and macros // Some common routines and macros
#define write_reg(reg, data) { write_index(reg); write_data(data); } #define write_reg(reg, data) { write_index(reg); write_data(data); }
#define stream_start() write_index(0x0022);
#define stream_stop()
#define delay(us) gfxSleepMicroseconds(us) #define delay(us) gfxSleepMicroseconds(us)
#define delayms(ms) gfxSleepMilliseconds(ms) #define delayms(ms) gfxSleepMilliseconds(ms)
@ -55,9 +53,8 @@ static void set_viewport(GDISPDriver* g) {
* Reg 0x45,0x46 - Vertical RAM address position * Reg 0x45,0x46 - Vertical RAM address position
* Lower 9 bits gives 0-511 range in each value * Lower 9 bits gives 0-511 range in each value
* 0 <= Reg(0x45) <= Reg(0x46) <= 0x13F * 0 <= Reg(0x45) <= Reg(0x46) <= 0x13F
*/ * Reg 0x004E is an 8 bit value - start x position
/* Reg 0x004E is an 8 bit value * Reg 0x004F is 9 bit - start y position
* Reg 0x004F is 9 bit
* Use a bit mask to make sure they are not set too high * Use a bit mask to make sure they are not set too high
*/ */
switch(g->g.Orientation) { switch(g->g.Orientation) {
@ -91,6 +88,7 @@ static void set_viewport(GDISPDriver* g) {
write_reg(0x004f, g->p.x & 0x01FF); write_reg(0x004f, g->p.x & 0x01FF);
break; break;
} }
write_index(0x0022);
} }
/*===========================================================================*/ /*===========================================================================*/
@ -176,13 +174,11 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
LLDSPEC void gdisp_lld_write_start(GDISPDriver *g) { LLDSPEC void gdisp_lld_write_start(GDISPDriver *g) {
acquire_bus(); acquire_bus();
set_viewport(g); set_viewport(g);
stream_start();
} }
LLDSPEC void gdisp_lld_write_color(GDISPDriver *g) { LLDSPEC void gdisp_lld_write_color(GDISPDriver *g) {
write_data(g->p.color); write_data(g->p.color);
} }
LLDSPEC void gdisp_lld_write_stop(GDISPDriver *g) { LLDSPEC void gdisp_lld_write_stop(GDISPDriver *g) {
stream_stop();
release_bus(); release_bus();
} }
#endif #endif
@ -193,7 +189,6 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
acquire_bus(); acquire_bus();
set_viewport(g); set_viewport(g);
stream_start();
setreadmode(); setreadmode();
dummy = read_data(); // dummy read dummy = read_data(); // dummy read
} }
@ -202,7 +197,6 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
} }
LLDSPEC void gdisp_lld_read_stop(GDISPDriver *g) { LLDSPEC void gdisp_lld_read_stop(GDISPDriver *g) {
setwritemode(); setwritemode();
stream_stop();
release_bus(); release_bus();
} }
#endif #endif
@ -211,9 +205,7 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
LLDSPEC void gdisp_lld_fill_area(GDISPDriver *g) { LLDSPEC void gdisp_lld_fill_area(GDISPDriver *g) {
acquire_bus(); acquire_bus();
set_viewport(g); set_viewport(g);
stream_start();
dma_with_noinc(&color, g->p.cx*g->p.cy) dma_with_noinc(&color, g->p.cx*g->p.cy)
stream_stop();
release_bus(); release_bus();
} }
#endif #endif
@ -227,15 +219,12 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
acquire_bus(); acquire_bus();
set_viewport(g); set_viewport(g);
stream_start();
if (g->p.x2 == g->p.cx) { if (g->p.x2 == g->p.cx) {
dma_with_inc(buffer, g->p.cx*g->p.cy); dma_with_inc(buffer, g->p.cx*g->p.cy);
} else { } else {
for (ycnt = g->p.cy; ycnt; ycnt--, buffer += g->p.x2) for (ycnt = g->p.cy; ycnt; ycnt--, buffer += g->p.x2)
dma_with_inc(buffer, g->p.cy); dma_with_inc(buffer, g->p.cy);
} }
stream_stop();
release_bus(); release_bus();
} }
#endif #endif