working on the LTDC driver (not done yet and also hacky code)
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6af2d41ea3
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5a1f527fcf
2 changed files with 6 additions and 4 deletions
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@ -12,6 +12,8 @@
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#include "stm32f746g_discovery_sdram.h"
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#include "stm32f746g_discovery_sdram.h"
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#include <string.h>
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#include <string.h>
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#include "RGB565_480x272.h"
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static const ltdcConfig driverCfg = {
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static const ltdcConfig driverCfg = {
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480, 270, // Width, Height (pixels)
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480, 270, // Width, Height (pixels)
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41, 10, // Horizontal, Vertical sync (pixels)
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41, 10, // Horizontal, Vertical sync (pixels)
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@ -21,7 +23,7 @@ static const ltdcConfig driverCfg = {
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0x000000, // Clear color (RGB888)
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0x000000, // Clear color (RGB888)
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{ // Background layer config
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{ // Background layer config
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(LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // Frame buffer address
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(LLDCOLOR_TYPE *)RGB565_480x272, // Frame buffer address
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480, 270, // Width, Height (pixels)
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480, 270, // Width, Height (pixels)
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480 * LTDC_PIXELBYTES, // Line pitch (bytes)
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480 * LTDC_PIXELBYTES, // Line pitch (bytes)
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LTDC_PIXELFORMAT, // Pixel format
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LTDC_PIXELFORMAT, // Pixel format
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@ -60,14 +62,14 @@ static inline void init_board(GDisplay *g) {
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/* PLLSAI activation.*/
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/* PLLSAI activation.*/
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RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24);
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RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24);
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RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST;
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RCC->DCKCFGR1 = (RCC->DCKCFGR1 & ~RCC_DCKCFGR1_PLLSAIDIVR) | STM32_PLLSAIR_POST;
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RCC->CR |= RCC_CR_PLLSAION;
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RCC->CR |= RCC_CR_PLLSAION;
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// Initialise the SDRAM
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// Initialise the SDRAM
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SDRAM_Init();
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SDRAM_Init();
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// Clear the SDRAM
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// Clear the SDRAM
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memset((void *)SDRAM_BANK_ADDR, 0, 0x400000);
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//memset((void *)SDRAM_BANK_ADDR, 0, 0x400000);
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break;
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break;
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}
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}
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@ -153,7 +153,7 @@ static void LTDC_Init(void)
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RCC->APB2RSTR = 0;
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RCC->APB2RSTR = 0;
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/* Enable the LTDC clock.*/
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/* Enable the LTDC clock.*/
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RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | (1 << 16); /* /4 */
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RCC->DCKCFGR1 = (RCC->DCKCFGR1 & ~RCC_DCKCFGR1_PLLSAIDIVR) | (1 << 16); /* /4 */
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// Enable the module
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// Enable the module
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RCC->APB2ENR |= RCC_APB2ENR_LTDCEN;
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RCC->APB2ENR |= RCC_APB2ENR_LTDCEN;
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