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Porting SSD2219 driver - WORK IN PROGRES!!!!

ugfx_release_2.6
Joel Bodenmann 2013-10-21 15:40:40 +02:00
parent f285a24a90
commit 86ae017301
1 changed files with 197 additions and 146 deletions
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343
drivers/gdisp/SSD2119/gdisp_lld.c
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@ -17,10 +17,12 @@
#include "ssd2119.h" #include "ssd2119.h"
#if GFX_USE_GDISP /*|| defined(__DOXYGEN__)*/ #if GFX_USE_GDISP
/* Include the emulation code for things we don't support */ #define GDISP_DRIVER_VMT GDISPVMT_SSD2119
#include "gdisp/lld/emulation.c" #include "../drivers/gdisp/SSD2119/gdisp_lld_config.h"
#include "gdisp/lld/gdisp_lld.h"
#include "board_SSD2119.h"
/*===========================================================================*/ /*===========================================================================*/
/* Driver local definitions. */ /* Driver local definitions. */
@ -32,51 +34,48 @@
#ifndef GDISP_SCREEN_WIDTH #ifndef GDISP_SCREEN_WIDTH
#define GDISP_SCREEN_WIDTH 320 #define GDISP_SCREEN_WIDTH 320
#endif #endif
#ifndef GDISP_INITIAL_CONTRAST
#define GDISP_INITIAL_CONTRAST 50 #define GDISP_INITIAL_CONTRAST 50
#define GDISP_INITIAL_BACKLIGHT 100 #endif
#ifndef GDISP_INITIAL_BACKLIGHT
#define GDISP_INITIAL_BACKLIGHT 100
#endif
/*===========================================================================*/ /*===========================================================================*/
/* Driver local functions. */ /* Driver local functions. */
/*===========================================================================*/ /*===========================================================================*/
#include "gdisp_lld_board.h"
// Some common routines and macros // Some common routines and macros
#define write_reg(reg, data) { write_index(reg); write_data(data); } #define dummy_read(g) { volatile uint16_t dummy; dummy = read_data(g); (void) dummy; }
#define stream_start() write_index(SSD2119_REG_RAM_DATA); #define write_reg(g, reg, data) { write_index(g, reg); write_data(g, data); }
#define stream_stop()
#define delay(us) gfxSleepMicroseconds(us)
#define delayms(ms) gfxSleepMilliseconds(ms)
static inline void set_cursor(coord_t x, coord_t y) { static void set_cursor(GDisplay* g) {
/* Reg SSD2119_REG_X_RAM_ADDR is 9 bit value /* Reg SSD2119_REG_X_RAM_ADDR is 9 bit value
* Reg SSD2119_REG_Y_RAM_ADDR is an 8 bit * Reg SSD2119_REG_Y_RAM_ADDR is an 8 bit
* Use a bit mask to make sure they are not set too high * Use a bit mask to make sure they are not set too high
*/ */
switch(GDISP.Orientation) { switch(g->g.Orientation) {
case GDISP_ROTATE_0: case GDISP_ROTATE_0:
write_reg(SSD2119_REG_X_RAM_ADDR, x & 0x01FF); write_reg(g, SSD2119_REG_X_RAM_ADDR, g->p.x & 0x01FF);
write_reg(SSD2119_REG_Y_RAM_ADDR, y & 0x00FF); write_reg(g, SSD2119_REG_Y_RAM_ADDR, g->p.y & 0x00FF);
break; break;
case GDISP_ROTATE_90: case GDISP_ROTATE_90:
write_reg(SSD2119_REG_X_RAM_ADDR, (GDISP_SCREEN_WIDTH - y - 1) & 0x01FF); write_reg(g, SSD2119_REG_X_RAM_ADDR, (GDISP_SCREEN_WIDTH - g->p.y - 1) & 0x01FF);
write_reg(SSD2119_REG_Y_RAM_ADDR, (GDISP_SCREEN_HEIGHT - x - 1) & 0x00FF); write_reg(g, SSD2119_REG_Y_RAM_ADDR, (GDISP_SCREEN_HEIGHT - g->p.x - 1) & 0x00FF);
break; break;
case GDISP_ROTATE_180: case GDISP_ROTATE_180:
write_reg(SSD2119_REG_X_RAM_ADDR, (GDISP_SCREEN_WIDTH - 1 - x) & 0x01FF); write_reg(g, SSD2119_REG_X_RAM_ADDR, (GDISP_SCREEN_WIDTH - 1 - g->p.x) & 0x01FF);
write_reg(SSD2119_REG_Y_RAM_ADDR, (GDISP_SCREEN_HEIGHT - 1 - y) & 0x00FF); write_reg(g, SSD2119_REG_Y_RAM_ADDR, (GDISP_SCREEN_HEIGHT - 1 - g->p.y) & 0x00FF);
break; break;
case GDISP_ROTATE_270: case GDISP_ROTATE_270:
write_reg(SSD2119_REG_X_RAM_ADDR, y & 0x01FF); write_reg(g, SSD2119_REG_X_RAM_ADDR, g->p.y & 0x01FF);
write_reg(SSD2119_REG_Y_RAM_ADDR, x & 0x00FF); write_reg(g, SSD2119_REG_Y_RAM_ADDR, g->p.x & 0x00FF);
break; break;
} }
} }
static void set_viewport(coord_t x, coord_t y, coord_t cx, coord_t cy) { static void set_viewport(GDisplay* g) {
set_cursor(g->p.x, g->p.y);
set_cursor(x, y);
/* Reg 0x44 - Vertical RAM address position /* Reg 0x44 - Vertical RAM address position
* Upper Byte - VEA * Upper Byte - VEA
@ -87,34 +86,34 @@ static void set_viewport(coord_t x, coord_t y, coord_t cx, coord_t cy) {
* 0 <= HSA <= HEA <= 0x13F * 0 <= HSA <= HEA <= 0x13F
*/ */
switch(GDISP.Orientation) { switch(g->g.Orientation) {
case GDISP_ROTATE_0: case GDISP_ROTATE_0:
write_reg(SSD2119_REG_V_RAM_POS, (((y + cy - 1) << 8) & 0xFF00 ) | (y & 0x00FF)); write_reg(g, SSD2119_REG_V_RAM_POS, (((g->p.y + g->p.cy - 1) << 8) & 0xFF00 ) | (g->p.y & 0x00FF));
write_reg(SSD2119_REG_H_RAM_START, (x & 0x01FF)); write_reg(g, SSD2119_REG_H_RAM_START, (g->p.x & 0x01FF));
write_reg(SSD2119_REG_H_RAM_END, (x + cx - 1) & 0x01FF); write_reg(g, SSD2119_REG_H_RAM_END, (g->p.x + g->p.cx - 1) & 0x01FF);
break; break;
case GDISP_ROTATE_90: case GDISP_ROTATE_90:
write_reg(SSD2119_REG_V_RAM_POS, (((GDISP_SCREEN_HEIGHT - x - 1) & 0x00FF) << 8) | ((GDISP_SCREEN_HEIGHT - (x + cx)) & 0x00FF)); write_reg(g, SSD2119_REG_V_RAM_POS, (((GDISP_SCREEN_HEIGHT - g->p.x - 1) & 0x00FF) << 8) | ((GDISP_SCREEN_HEIGHT - (g->p.x + g->p.cx)) & 0x00FF));
write_reg(SSD2119_REG_H_RAM_START, (GDISP_SCREEN_WIDTH - (y + cy)) & 0x01FF); write_reg(g, SSD2119_REG_H_RAM_START, (GDISP_SCREEN_WIDTH - (g->p.y + g->p.cy)) & 0x01FF);
write_reg(SSD2119_REG_H_RAM_END, (GDISP_SCREEN_WIDTH - y - 1) & 0x01FF); write_reg(g, SSD2119_REG_H_RAM_END, (GDISP_SCREEN_WIDTH - g->p.y - 1) & 0x01FF);
break; break;
case GDISP_ROTATE_180: case GDISP_ROTATE_180:
write_reg(SSD2119_REG_V_RAM_POS, (((GDISP_SCREEN_HEIGHT - y - 1) & 0x00FF) << 8) | ((GDISP_SCREEN_HEIGHT - (y + cy)) & 0x00FF)); write_reg(SSD2119_REG_V_RAM_POS, (((GDISP_SCREEN_HEIGHT - g->p.y - 1) & 0x00FF) << 8) | ((GDISP_SCREEN_HEIGHT - (g->p.y + g->p.cy)) & 0x00FF));
write_reg(SSD2119_REG_H_RAM_START, (GDISP_SCREEN_WIDTH - (x + cx)) & 0x01FF); write_reg(SSD2119_REG_H_RAM_START, (GDISP_SCREEN_WIDTH - (g->p.x + g->p.cx)) & 0x01FF);
write_reg(SSD2119_REG_H_RAM_END, (GDISP_SCREEN_WIDTH - x - 1) & 0x01FF); write_reg(SSD2119_REG_H_RAM_END, (GDISP_SCREEN_WIDTH - g->p.x - 1) & 0x01FF);
break; break;
case GDISP_ROTATE_270: case GDISP_ROTATE_270:
write_reg(SSD2119_REG_V_RAM_POS, (((x + cx - 1) << 8) & 0xFF00 ) | (x & 0x00FF)); write_reg(SSD2119_REG_V_RAM_POS, (((g->p.x + g->p.cx - 1) << 8) & 0xFF00 ) | (g->p.x & 0x00FF));
write_reg(SSD2119_REG_H_RAM_START, (y & 0x01FF)); write_reg(SSD2119_REG_H_RAM_START, (g->p.y & 0x01FF));
write_reg(SSD2119_REG_H_RAM_END, (y + cy - 1) & 0x01FF); write_reg(SSD2119_REG_H_RAM_END, (g->p.y + g->p.cy - 1) & 0x01FF);
break; break;
} }
set_cursor(x, y); set_cursor(g->p.x, g->p.y);
} }
static inline void reset_viewport(void) { static inline void reset_viewport(GDisplay* g) {
set_viewport(0, 0, GDISP.Width, GDISP.Height); set_viewport(0, 0, g->g.Width, g->g.Height);
} }
/*===========================================================================*/ /*===========================================================================*/
@ -125,144 +124,196 @@ static inline void reset_viewport(void) {
/* Driver exported functions. */ /* Driver exported functions. */
/*===========================================================================*/ /*===========================================================================*/
/* ---- Required Routines ---- */ LLDSPEC bool_t gdisp_lld_init(GDisplay* g) {
/* // no private area for this controller
The following 2 routines are required. g->priv = 0;
All other routines are optional.
*/
/** // initialise the board interface
* @brief Low level GDISP driver initialization.
*
* @notapi
*/
bool_t gdisp_lld_init(void) {
/* Initialise your display */
init_board(); init_board();
// Hardware reset // Hardware reset
setpin_reset(TRUE); setpin_reset(g, TRUE);
delayms(20); gfxSleepMilliseconds(20);
setpin_reset(FALSE); setpin_reset(g, FALSE);
delayms(20); gfxSleepMilliseconds(20);
// Get the bus for the following initialisation commands // Get the bus for the following initialisation commands
acquire_bus(); acquire_bus(g);
// Enter sleep mode (if we are not already there). // Enter sleep mode (if we are not already there).
write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0001); write_reg(g, SSD2119_REG_SLEEP_MODE_1, 0x0001);
delay(5); gfxSleepMicroseconds(5);
// Set initial power parameters. // Set initial power parameters.
write_reg(SSD2119_REG_PWR_CTRL_5, 0x00B2); write_reg(g, SSD2119_REG_PWR_CTRL_5, 0x00B2);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_VCOM_OTP_1, 0x0006); write_reg(g, SSD2119_REG_VCOM_OTP_1, 0x0006);
delay(5); gfxSleepMicroseconds(5);
// Start the oscillator. // Start the oscillator.
write_reg(SSD2119_REG_OSC_START, 0x0001); write_reg(g, SSD2119_REG_OSC_START, 0x0001);
delay(5); gfxSleepMicroseconds(5);
// Set pixel format and basic display orientation (scanning direction). // Set pixel format and basic display orientation (scanning direction).
write_reg(SSD2119_REG_OUTPUT_CTRL, 0x30EF); write_reg(g, SSD2119_REG_OUTPUT_CTRL, 0x30EF);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_LCD_DRIVE_AC_CTRL, 0x0600); write_reg(g, SSD2119_REG_LCD_DRIVE_AC_CTRL, 0x0600);
delay(5); gfxSleepMicroseconds(5);
// Exit sleep mode. // Exit sleep mode.
write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); write_reg(g, SSD2119_REG_SLEEP_MODE_1, 0x0000);
delay(5); gfxSleepMicroseconds(5);
// Configure pixel color format and MCU interface parameters. // Configure pixel color format and MCU interface parameters.
write_reg(SSD2119_REG_ENTRY_MODE, 0x6830); // ENTRY_MODE_DEFAULT write_reg(g, SSD2119_REG_ENTRY_MODE, 0x6830); // ENTRY_MODE_DEFAULT
delay(5); gfxSleepMicroseconds(5);
// Set analog parameters. // Set analog parameters.
write_reg(SSD2119_REG_SLEEP_MODE_2, 0x0999); write_reg(g, SSD2119_REG_SLEEP_MODE_2, 0x0999);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_ANALOG_SET, 0x3800); write_reg(g, SSD2119_REG_ANALOG_SET, 0x3800);
delay(5); gfxSleepMicroseconds(5);
// Enable the display. // Enable the display.
write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033); write_reg(g, SSD2119_REG_DISPLAY_CTRL, 0x0033);
delay(5); gfxSleepMicroseconds(5);
// Set VCIX2 voltage to 6.1V. // Set VCIX2 voltage to 6.1V.
write_reg(SSD2119_REG_PWR_CTRL_2, 0x0005); write_reg(g, SSD2119_REG_PWR_CTRL_2, 0x0005);
delay(5); gfxSleepMicroseconds(5);
// Configure gamma correction. // Configure gamma correction.
write_reg(SSD2119_REG_GAMMA_CTRL_1, 0x0000); write_reg(g, SSD2119_REG_GAMMA_CTRL_1, 0x0000);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_2, 0x0303); write_reg(g, SSD2119_REG_GAMMA_CTRL_2, 0x0303);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_3, 0x0407); write_reg(g, SSD2119_REG_GAMMA_CTRL_3, 0x0407);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_4, 0x0301); write_reg(g, SSD2119_REG_GAMMA_CTRL_4, 0x0301);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_5, 0x0301); write_reg(g, SSD2119_REG_GAMMA_CTRL_5, 0x0301);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_6, 0x0403); write_reg(g, SSD2119_REG_GAMMA_CTRL_6, 0x0403);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_7, 0x0707); write_reg(g, SSD2119_REG_GAMMA_CTRL_7, 0x0707);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_8, 0x0400); write_reg(g, SSD2119_REG_GAMMA_CTRL_8, 0x0400);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_9, 0x0a00); write_reg(g, SSD2119_REG_GAMMA_CTRL_9, 0x0a00);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_GAMMA_CTRL_10, 0x1000); write_reg(g, SSD2119_REG_GAMMA_CTRL_10, 0x1000);
delay(5); gfxSleepMicroseconds(5);
// Configure Vlcd63 and VCOMl. // Configure Vlcd63 and VCOMl.
write_reg(SSD2119_REG_PWR_CTRL_3, 0x000A); write_reg(g, SSD2119_REG_PWR_CTRL_3, 0x000A);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_PWR_CTRL_4, 0x2E00); write_reg(g, SSD2119_REG_PWR_CTRL_4, 0x2E00);
delay(5); gfxSleepMicroseconds(5);
// Set the display size and ensure that the GRAM window is set to allow access to the full display buffer. // Set the display size and ensure that the GRAM window is set to allow access to the full display buffer.
write_reg(SSD2119_REG_V_RAM_POS, (GDISP_SCREEN_HEIGHT - 1) << 8); write_reg(g, SSD2119_REG_V_RAM_POS, (GDISP_SCREEN_HEIGHT - 1) << 8);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_H_RAM_START, 0x0000); write_reg(g, SSD2119_REG_H_RAM_START, 0x0000);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_H_RAM_END, GDISP_SCREEN_WIDTH - 1); write_reg(g, SSD2119_REG_H_RAM_END, GDISP_SCREEN_WIDTH - 1);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_X_RAM_ADDR, 0x00); write_reg(g, SSD2119_REG_X_RAM_ADDR, 0x00);
delay(5); gfxSleepMicroseconds(5);
write_reg(SSD2119_REG_Y_RAM_ADDR, 0x00); write_reg(g, SSD2119_REG_Y_RAM_ADDR, 0x00);
delay(5); gfxSleepMicroseconds(5);
// Release the bus // Release the bus
release_bus(); release_bus(g);
/* Turn on the backlight */ // Turn on the backlight
set_backlight(GDISP_INITIAL_BACKLIGHT); set_backlight(g, GDISP_INITIAL_BACKLIGHT);
// Initialise the GDISP structure
g->g.Width = GDISP_SCREEN_WIDTH;
g->g.Height = GDISP_SCREEN_HEIGHT;
g->g.Orientation = GDISP_ROTATE_0;
g->g.Powermode = powerOn;
g->g.Backlight = GDISP_INITIAL_BACKLIGHT;
g->g.Contrast = GDISP_INITIAL_CONTRAST;
/* Initialise the GDISP structure */
GDISP.Width = GDISP_SCREEN_WIDTH;
GDISP.Height = GDISP_SCREEN_HEIGHT;
GDISP.Orientation = GDISP_ROTATE_0;
GDISP.Powermode = powerOn;
GDISP.Backlight = GDISP_INITIAL_BACKLIGHT;
GDISP.Contrast = GDISP_INITIAL_CONTRAST;
#if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP
GDISP.clipx0 = 0;
GDISP.clipy0 = 0;
GDISP.clipx1 = GDISP.Width;
GDISP.clipy1 = GDISP.Height;
#endif
return TRUE; return TRUE;
} }
/** #if GDISP_HARDWARE_STREAM_WRITE
* @brief Draws a pixel on the display. LLDSPEC void gdisp_lld_write_start(GDisplay* g) {
* acquire_bus(g);
* @param[in] x X location of the pixel set_viewport(g);
* @param[in] y Y location of the pixel }
* @param[in] color The color of the pixel LLDSPEC void gdisp_lld_write_color(GDisplay* g) {
* write_data(g, g->p.color);
* @notapi }
*/ LLDSPEC void gdisp_lld_write_stop(GDisplay* g) {
release_bus(g);
}
LLDSPEC void gdisp_lld_write_pos(GDisplay* g) {
set_cursor(g);
}
#endif
#if GDISP_HARDWARE_STREAM_READ
LLDSPEC void gdisp_lld_read_start(GDisplay* g) {
acquire_bus(g);
set_viewport(g);
set_cursor(g);
set_readmode(g);
dummy_read(g);
}
LLDSPEC color_t gdisp_lld_read_color(GDisplay* g) {
return read_data(g);
}
LLDSPEC void gdisp_lld_read_stop(GDisplay* g) {
set_writemode(g);
release_bus(g);
}
#endif
#if GDISP_HARDWARE_FILLS && defined(GDISP_USE_DMA)
LLDSPEC void gdisp_lld_fill_area(GDisplay* g) {
acquire_bus(g);
set_viewport(g);
set_cursor(g);
dma_with_noinc(g, &color, g->p.cx * g->p.cy);
release_bus(g);
}
#endif
#if GDISP_HARDWARE_BITFILLS && defined(GDISP_USE_DMA)
LLDSPEC void gdisp_lld_blit_area(GDisplay* g) {
pixel_t* buffer;
coord_t ynct;
buffer = (pixel_t*)g->p.ptr + g->p.x1 + g->p.y1 * g->p.x2;
acquire_bus(g);
set_viewport(g);
set_cursor(g);
if (g->p.x2 == g->p.cx) {
dma_with_inc(g, buffer, g->p.cx * g->p.cy);
} else {
for (ycnt = g->p.cy; ycnt; ycnt--, buffer += g->p.x2)
dma_with_inc(g, buffer, g->p.cy);
}
release_bus(g);
}
#endif
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
LLDSPEC void gdisp_lld_control(GDisplay* g) {
// ....
}
#endif
//////////////////////// OLD STUFF FROM HERE ////////////////////////////////////////////////////
void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) { void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
#if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP #if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP
if (x < GDISP.clipx0 || y < GDISP.clipy0 || x >= GDISP.clipx1 || y >= GDISP.clipy1) return; if (x < GDISP.clipx0 || y < GDISP.clipy0 || x >= GDISP.clipx1 || y >= GDISP.clipy1) return;
@ -584,14 +635,14 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode
write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033); // Display on write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033); // Display on
release_bus(); release_bus();
delayms(170); gfxSleepMilliseconds(170);
} else if (GDISP.Powermode == powerDeepSleep) { } else if (GDISP.Powermode == powerDeepSleep) {
acquire_bus(); acquire_bus();
write_reg(SSD2119_REG_SLEEP_MODE_2, 0x0999); // Disable deep sleep function write_reg(SSD2119_REG_SLEEP_MODE_2, 0x0999); // Disable deep sleep function
write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode
write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033); // Display on write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033); // Display on
release_bus(); release_bus();
delayms(170); gfxSleepMilliseconds(170);
} else { } else {
acquire_bus(); acquire_bus();
write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000); // Leave sleep mode
@ -607,7 +658,7 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0000); // Display off write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0000); // Display off
release_bus(); release_bus();
set_backlight(0); set_backlight(0);
delayms(25); gfxSleepMilliseconds(25);
break; break;
case powerDeepSleep: case powerDeepSleep:
@ -617,7 +668,7 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0000); // Display off write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0000); // Display off
release_bus(); release_bus();
set_backlight(0); set_backlight(0);
delayms(25); gfxSleepMilliseconds(25);
break; break;
default: default: