Adding first version of STM32F7 discovery touch driver
This commit is contained in:
Joel Bodenmann
parent
78dc6e4b8e
commit
940eda4cd4
@ -18,7 +18,8 @@ ifeq ($(OPT_OS),raw32)
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GFXSRC += $(GFXLIB)/boards/base/STM32F746-Discovery/stm32f746g_raw32_startup.s \
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$(GFXLIB)/boards/base/STM32F746-Discovery/stm32f746g_raw32_ugfx.c \
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$(GFXLIB)/boards/base/STM32F746-Discovery/stm32f746g_raw32_system.c \
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$(GFXLIB)/boards/base/STM32F746-Discovery/stm32f746g_raw32_interrupts.c
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$(GFXLIB)/boards/base/STM32F746-Discovery/stm32f746g_raw32_interrupts.c \
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$(GFXLIB)/boards/base/STM32F746-Discovery/stm32f7_i2c.c
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GFXDEFS += GFX_OS_EXTRA_INIT_FUNCTION=Raw32OSInit GFX_OS_INIT_NO_WARNING=TRUE
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SRCFLAGS+= -std=c99
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GFXINC += $(CMSIS)/Device/ST/STM32F7xx/Include \
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@ -9,6 +9,7 @@
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#define _GINPUT_LLD_MOUSE_BOARD_H
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#include "stm32f7xx.h"
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#include "stm32f7_i2c.h"
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// Resolution and Accuracy Settings
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#define GMOUSE_FT5336_PEN_CALIBRATE_ERROR 8
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@ -21,14 +22,8 @@
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// How much extra data to allocate at the end of the GMouse structure for the board's use
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#define GMOUSE_FT5336_BOARD_DATA_SIZE 0
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// Set this to TRUE if you want self-calibration.
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// NOTE: This is not as accurate as real calibration.
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// It requires the orientation of the touch panel to match the display.
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// It requires the active area of the touch panel to exactly match the display size.
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#define GMOUSE_FT5336_SELF_CALIBRATE FALSE
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// The FT5336 slave address
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#define FT5336_ADDR 0x70
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// The FT5336 I2C slave address (including the R/W bit)
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#define FT5336_SLAVE_ADDR 0x70
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static bool_t init_board(GMouse* m, unsigned instance)
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{
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@ -36,52 +31,23 @@ static bool_t init_board(GMouse* m, unsigned instance)
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(void)instance;
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// I2C3_SCL GPIOH7, alternate, opendrain, highspeed
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // Enable clock for
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GPIOB->MODER |= GPIO_MODER_MODER7_1; // Alternate function
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GPIOB->OTYPER |= GPIO_OTYPER_OT_7; // OpenDrain
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GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_0; // PullUp
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GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR7; // HighSpeed
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GPIOB->AFR[0] |= (0b0100 << 4*0); // AF4
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOHEN; // Enable clock for
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GPIOH->MODER |= GPIO_MODER_MODER7_1; // Alternate function
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GPIOH->OTYPER |= GPIO_OTYPER_OT_7; // OpenDrain
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GPIOH->OSPEEDR &= ~GPIO_OSPEEDER_OSPEEDR7; // LowSpeed
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GPIOH->AFR[0] |= (0b0100 << 4*7); // AF4
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// I2C3_SDA GPIOH8, alternate, opendrain, highspeed
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // Enable clock
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GPIOB->MODER |= GPIO_MODER_MODER8_1; // Alternate function
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GPIOB->OTYPER |= GPIO_OTYPER_OT_8; // OpenDrain
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GPIOB->PUPDR |= GPIO_PUPDR_PUPDR8_0; // PullUp
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GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR8; // HighSpeed
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GPIOB->AFR[1] |= (0b0100 << 4*0); // AF4
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOHEN; // Enable clock
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GPIOH->MODER |= GPIO_MODER_MODER8_1; // Alternate function
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GPIOH->OTYPER |= GPIO_OTYPER_OT_8; // OpenDrain
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GPIOH->OSPEEDR &= ~GPIO_OSPEEDER_OSPEEDR8; // LowSpeed
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GPIOH->AFR[1] |= (0b0100 << 4*0); // AF4
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// Enable I2C3 peripheral clock
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RCC->APB1ENR |= RCC_APB1ENR_I2C3EN;
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// Reset I2C3 peripheral
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RCC->APB1RSTR |= RCC_APB1RSTR_I2C3RST;
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RCC->APB1RSTR &= ~RCC_APB1RSTR_I2C3RST;
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// Set Fm mode
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I2C3->CCR |= I2C_CCR_FS;
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// Set Duty to 50:50
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I2C3->CCR &= ~I2C_CCR_DUTY;
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// Set peripheral clock frequency (APB1 frequency)
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// APB1CLK running at 42 MHz
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I2C3->CR2 |= 42;
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// Set I2C bus clock speed to 400 kHz
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// Period of 400 kHz is 2.5 us, half of that is 1.25 us. TPCLK1 is
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// 40 ns (see below). 1.25 us / 40 ns = 32.
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I2C3->CCR |= (I2C_CCR_CCR & 32);
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// Rise time
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// Period of 42 MHz is 24 ns. Rise time is 1000 ns. 1000/24 = 42.
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I2C3->TRISE |= (I2C_TRISE_TRISE & 42);
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// Disable POS
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I2C3->CR1 &=~ I2C_CR1_POS;
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// Enable I2C3
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I2C3->CR1 |= I2C_CR1_PE;
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// Initialize the I2C3 peripheral
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if (!(i2cInit(I2C3))) {
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return FALSE;
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}
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return TRUE;
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}
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@ -90,137 +56,21 @@ static void write_reg(GMouse* m, uint8_t reg, uint8_t val)
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{
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(void)m;
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// Generate start condition
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Write = last bit is 0)
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I2C3->DR = ((FT5336_ADDR | 0) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// Send register address
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while (!(I2C3->SR1 & I2C_SR1_TXE));
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I2C3->DR = (reg & I2C_DR_DR);
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// Send data
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while (!(I2C3->SR1 & I2C_SR1_TXE));
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I2C3->DR = (val & I2C_DR_DR);
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// Generate stop condition when we are done transmitting
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while (!(I2C3->SR1 & I2C_SR1_TXE));
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I2C3->CR1 |= I2C_CR1_STOP;
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i2cWriteReg(I2C3, FT5336_SLAVE_ADDR, reg, val);
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}
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static uint8_t read_byte(GMouse* m, uint8_t reg)
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{
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(void)m;
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uint8_t ret = 0x00;
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// Generate start condition
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Write = last bit is 0)
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I2C3->DR = ((FT5336_ADDR | 0) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// Send register address that we want to read
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I2C3->DR = (reg & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_BTF));
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// Generate start condition (repeated start)
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Read = last bit is 1)
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I2C3->DR = ((FT5336_ADDR | 1) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Set up for one byte receival
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I2C3->CR1 &= ~I2C_CR1_POS;
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//I2C3->CR1 |= I2C_CR1_ACK;
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// Clean SR1_ACK. This needs to be done on the last byte received from slave
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I2C3->CR1 &= ~I2C_CR1_ACK;
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// Generate stop condition
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I2C3->CR1 |= I2C_CR1_STOP;
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return ret;
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return i2cReadByte(I2C3, FT5336_SLAVE_ADDR, reg);
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}
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static uint16_t read_word(GMouse* m, uint8_t reg)
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{
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(void)m;
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uint16_t ret = 0x00;
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// Generate start condition
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Write = last bit is 0)
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I2C3->DR = ((FT5336_ADDR | 0) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// Send register address that we want to read
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I2C3->DR = (reg & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_BTF));
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// Generate start condition (repeated start)
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I2C3->CR1 |= I2C_CR1_START;
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while (!(I2C3->SR2 & I2C_SR2_MSL));
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while (!(I2C3->SR1 & I2C_SR1_SB));
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// Send slave address (Read = last bit is 1)
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I2C3->DR = ((FT5336_ADDR | 1) & I2C_DR_DR);
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while (!(I2C3->SR1 & I2C_SR1_ADDR));
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// Set up for two byte receival
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I2C3->CR1 |= I2C_CR1_POS;
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//I2C3->CR1 &= ~I2C_CR1_ACK;
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I2C3->SR1 &= ~I2C_SR1_ADDR;
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// Read SR1/SR2 register to clear the SB bit (see STM32F4xx RM)
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(void)I2C3->SR1;
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(void)I2C3->SR2;
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// The slave should now send a byte to us.
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while (!(I2C3->SR1 & I2C_SR1_RXNE));
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ret = (uint16_t)((I2C3->DR & 0x00FF) << 8);
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// Set STOP and clear ACK right after reading the second last byte
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I2C3->CR1 |= I2C_CR1_STOP;
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I2C3->CR1 &= ~I2C_CR1_ACK;
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// The second byte becomes available after sending the stop condition
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ret |= (I2C3->DR & 0x00FF);
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// Get back to original state
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I2C3->CR1 &= ~I2C_CR1_POS;
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return ret;
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return i2cReadWord(I2C3, FT5336_SLAVE_ADDR, reg);
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}
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#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
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164
boards/base/STM32F746-Discovery/stm32f7_i2c.c
Normal file
164
boards/base/STM32F746-Discovery/stm32f7_i2c.c
Normal file
@ -0,0 +1,164 @@
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#include "stm32f7_i2c.h"
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/*
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* The CR2 register needs atomic access. Hence always use this function to setup a transfer configuration.
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*/
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static void _i2cConfigTransfer(I2C_TypeDef* i2c, uint16_t slaveAddr, uint8_t numBytes, uint32_t mode, uint32_t request)
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{
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uint32_t tmpreg = 0;
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// Get the current CR2 register value
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tmpreg = i2c->CR2;
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// Clear tmpreg specific bits
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tmpreg &= (uint32_t) ~((uint32_t) (I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP));
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// update tmpreg
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tmpreg |= (uint32_t) (((uint32_t) slaveAddr & I2C_CR2_SADD) | (((uint32_t) numBytes << 16) & I2C_CR2_NBYTES) | (uint32_t) mode | (uint32_t) request);
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// Update the actual CR2 contents
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i2c->CR2 = tmpreg;
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}
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/*
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* According to the STM32Cube HAL the CR2 register needs to be reset after each transaction.
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*/
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static void _i2cResetCr2(I2C_TypeDef* i2c)
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{
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i2c->CR2 &= (uint32_t) ~((uint32_t) (I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN));
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}
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bool_t i2cInit(I2C_TypeDef* i2c)
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{
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// Enable I2Cx peripheral clock.
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// Select APB1 as clock source
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if (i2c == I2C1) {
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RCC->DCKCFGR2 &= ~RCC_DCKCFGR2_I2C1SEL;
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RCC->APB1ENR |= RCC_APB1ENR_I2C1EN;
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} else if (i2c == I2C2) {
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RCC->DCKCFGR2 &= ~RCC_DCKCFGR2_I2C2SEL;
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RCC->APB1ENR |= RCC_APB1ENR_I2C2EN;
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} else if (i2c == I2C3) {
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RCC->DCKCFGR2 &= ~RCC_DCKCFGR2_I2C3SEL;
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RCC->APB1ENR |= RCC_APB1ENR_I2C3EN;
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} else if (i2c == I2C4) {
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RCC->DCKCFGR2 &= ~RCC_DCKCFGR2_I2C4SEL;
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RCC->APB1ENR |= RCC_APB1ENR_I2C4EN;
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} else {
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return FALSE;
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}
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// Disable the I2Cx peripheral
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i2c->CR1 &= ~I2C_CR1_PE;
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while (i2c->CR1 & I2C_CR1_PE);
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// Set timings. Asuming I2CCLK is 50 MHz (APB1 clock source)
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i2c->TIMINGR = 0x40912732; // Discovery BSP code from ST examples
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// Use 7-bit addresses
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i2c->CR2 &=~ I2C_CR2_ADD10;
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// Enable auto-end mode
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i2c->CR2 |= I2C_CR2_AUTOEND;
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// Disable the analog filter
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i2c->CR1 |= I2C_CR1_ANFOFF;
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// Disable NOSTRETCH
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i2c->CR1 |= I2C_CR1_NOSTRETCH;
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// Enable the I2Cx peripheral
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i2c->CR1 |= I2C_CR1_PE;
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return TRUE;
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}
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void i2cSend(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t* data, uint16_t length)
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{
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// We are currently not able to send more than 255 bytes at once
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if (length > 255) {
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return;
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}
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// Setup the configuration
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_i2cConfigTransfer(i2c, slaveAddr, length, (!I2C_CR2_RD_WRN) | I2C_CR2_AUTOEND, I2C_CR2_START);
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// Transmit the whole buffer
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while (length > 0) {
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while (!(i2c->ISR & I2C_ISR_TXIS));
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i2c->TXDR = *data++;
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length--;
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}
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// Wait until the transfer is complete
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while (!(i2c->ISR & I2C_ISR_TXE));
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// Wait until the stop condition was automagically sent
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while (!(i2c->ISR & I2C_ISR_STOPF));
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// Reset the STOP bit
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i2c->ISR &= ~I2C_ISR_STOPF;
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// Reset the CR2 register
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_i2cResetCr2(i2c);
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}
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void i2cSendByte(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t data)
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{
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i2cSend(i2c, slaveAddr, &data, 1);
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}
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void i2cWriteReg(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr, uint8_t value)
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{
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uint8_t txbuf[2];
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txbuf[0] = regAddr;
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txbuf[1] = value;
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i2cSend(i2c, slaveAddr, txbuf, 2);
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}
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void i2cRead(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t* data, uint16_t length)
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{
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// We are currently not able to read more than 255 bytes at once
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if (length > 255) {
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return;
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}
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// Setup the configuration
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_i2cConfigTransfer(i2c, slaveAddr, length, I2C_CR2_RD_WRN | I2C_CR2_AUTOEND, I2C_CR2_START);
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// Transmit the whole buffer
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for (int i = 0; i < length; i++) {
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while (!(i2c->ISR & I2C_ISR_RXNE));
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data[i] = i2c->RXDR;
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}
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// Wait until the stop condition was automagically sent
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while (!(i2c->ISR & I2C_ISR_STOPF));
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// Reset the STOP bit
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i2c->ISR &= ~I2C_ISR_STOPF;
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// Reset the CR2 register
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_i2cResetCr2(i2c);
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}
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uint8_t i2cReadByte(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr)
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{
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uint8_t ret = 0xAA;
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i2cSend(i2c, slaveAddr, ®Addr, 1);
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i2cRead(i2c, slaveAddr, &ret, 1);
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return ret;
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}
|
||||
|
||||
uint16_t i2cReadWord(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr)
|
||||
{
|
||||
uint8_t ret[2] = { 0xAA, 0xAA };
|
||||
|
||||
i2cSend(i2c, slaveAddr, ®Addr, 1);
|
||||
i2cRead(i2c, slaveAddr, ret, 2);
|
||||
|
||||
return (uint16_t)((ret[0] << 8) | (ret[1] & 0x00FF));
|
||||
}
|
||||
14
boards/base/STM32F746-Discovery/stm32f7_i2c.h
Normal file
14
boards/base/STM32F746-Discovery/stm32f7_i2c.h
Normal file
@ -0,0 +1,14 @@
|
||||
#pragma once
|
||||
|
||||
#include "stm32f7xx.h"
|
||||
#include "gfx.h"
|
||||
|
||||
bool_t i2cInit(I2C_TypeDef* i2c);
|
||||
|
||||
void i2cSend(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t* data, uint16_t length);
|
||||
void i2cSendByte(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t data);
|
||||
void i2cWriteReg(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr, uint8_t value);
|
||||
|
||||
void i2cRead(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t* data, uint16_t length);
|
||||
uint8_t i2cReadByte(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr);
|
||||
uint16_t i2cReadWord(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr);
|
||||
@ -50,6 +50,7 @@
|
||||
#define GDISP_NEED_CIRCLE TRUE
|
||||
#define GDISP_NEED_TEXT TRUE
|
||||
#define GDISP_NEED_MULTITHREAD TRUE
|
||||
#define GDISP_NEED_CONTROL TRUE
|
||||
|
||||
/* GDISP fonts to include */
|
||||
#define GDISP_INCLUDE_FONT_UI2 TRUE
|
||||
|
||||
@ -20,10 +20,23 @@
|
||||
|
||||
static bool_t ft5336Init(GMouse* m, unsigned driverinstance)
|
||||
{
|
||||
// Initialize the board stuff
|
||||
if (!init_board(m, driverinstance)) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
// We need at least 200 ms worth of delay here...
|
||||
gfxSleepMilliseconds(200);
|
||||
|
||||
// Check Chip ID
|
||||
if (read_byte(m, FT5336_CHIP_ID_REG) != FT5336_ID_VALUE) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
// Disable interrupts. We use this chip in polling mode
|
||||
write_reg(m, FT5336_GMODE_REG, (FT5336_G_MODE_INTERRUPT_POLLING & (FT5336_G_MODE_INTERRUPT_MASK >> FT5336_G_MODE_INTERRUPT_SHIFT)) << FT5336_G_MODE_INTERRUPT_SHIFT);
|
||||
|
||||
/*
|
||||
// Init default values. (From NHD-3.5-320240MF-ATXL-CTP-1 datasheet)
|
||||
// Valid touching detect threshold
|
||||
write_reg(m, FT5336_TH_GROUP_REG, 0x16);
|
||||
@ -39,7 +52,7 @@ static bool_t ft5336Init(GMouse* m, unsigned driverinstance)
|
||||
|
||||
// Timer to enter 'idle' when in 'Monitor' (ms)
|
||||
write_reg(m, FT5336_PERIODMONITOR_REG, 0x28);
|
||||
|
||||
*/
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
@ -47,37 +60,14 @@ static bool_t ft5336ReadXYZ(GMouse* m, GMouseReading* pdr)
|
||||
{
|
||||
// Assume not touched.
|
||||
pdr->buttons = 0;
|
||||
pdr->z = 0;
|
||||
pdr->z = 0;
|
||||
|
||||
// Only take a reading if we are touched.
|
||||
if ((read_byte(m, FT5336_TD_STAT_REG) & 0x07)) {
|
||||
|
||||
/* Get the X, Y, Z values */
|
||||
pdr->x = (coord_t)(read_word(m, FT5336_P1_XH_REG) & 0x0FFF);
|
||||
pdr->y = (coord_t)(read_word(m, FT5336_P1_YH_REG) & 0xFFFF);
|
||||
// Only take a reading if exactly one touch contact point
|
||||
if (read_byte(m, FT5336_TD_STAT_REG) == 1) {
|
||||
// Get and return X, Y an Z values
|
||||
pdr->y = (coord_t)(read_word(m, FT5336_P1_XH_REG) & 0x0FFF);
|
||||
pdr->x = (coord_t)(read_word(m, FT5336_P1_YH_REG) & 0x0FFF);
|
||||
pdr->z = 1;
|
||||
|
||||
// Rescale X,Y if we are using self-calibration
|
||||
#if GMOUSE_FT5336_SELF_CALIBRATE
|
||||
#if GDISP_NEED_CONTROL
|
||||
switch(gdispGGetOrientation(m->display)) {
|
||||
default:
|
||||
case GDISP_ROTATE_0:
|
||||
case GDISP_ROTATE_180:
|
||||
pdr->x = gdispGGetWidth(m->display) - pdr->x / (4096/gdispGGetWidth(m->display));
|
||||
pdr->y = pdr->y / (4096/gdispGGetHeight(m->display));
|
||||
break;
|
||||
case GDISP_ROTATE_90:
|
||||
case GDISP_ROTATE_270:
|
||||
pdr->x = gdispGGetHeight(m->display) - pdr->x / (4096/gdispGGetHeight(m->display));
|
||||
pdr->y = pdr->y / (4096/gdispGGetWidth(m->display));
|
||||
break;
|
||||
}
|
||||
#else
|
||||
pdr->x = gdispGGetWidth(m->display) - pdr->x / (4096/gdispGGetWidth(m->display));
|
||||
pdr->y = pdr->y / (4096/gdispGGetHeight(m->display));
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
@ -86,11 +76,7 @@ static bool_t ft5336ReadXYZ(GMouse* m, GMouseReading* pdr)
|
||||
const GMouseVMT const GMOUSE_DRIVER_VMT[1] = {{
|
||||
{
|
||||
GDRIVER_TYPE_TOUCH,
|
||||
#if GMOUSE_FT5336_SELF_CALIBRATE
|
||||
GMOUSE_VFLG_TOUCH | GMOUSE_VFLG_ONLY_DOWN | GMOUSE_VFLG_POORUPDOWN,
|
||||
#else
|
||||
GMOUSE_VFLG_TOUCH | GMOUSE_VFLG_ONLY_DOWN | GMOUSE_VFLG_POORUPDOWN | GMOUSE_VFLG_CALIBRATE | GMOUSE_VFLG_CAL_TEST,
|
||||
#endif
|
||||
GMOUSE_VFLG_TOUCH | GMOUSE_VFLG_ONLY_DOWN | GMOUSE_VFLG_POORUPDOWN,
|
||||
sizeof(GMouse) + GMOUSE_FT5336_BOARD_DATA_SIZE,
|
||||
_gmouseInitDriver,
|
||||
_gmousePostInitDriver,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user