Convert ILI9320 driver to new format
parent
c9311d9851
commit
9eabf4576d
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/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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/**
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* @file drivers/gdisp/ILI9320/board_ILI9320_olimex_pic32mx_lcd.h
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* @brief GDISP Graphic Driver subsystem board interface for the ILI9325 display.
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*/
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#ifndef GDISP_LLD_BOARD_H
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#define GDISP_LLD_BOARD_H
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#ifndef noinline
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#define noinline __attribute__((noinline))
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#endif
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static void init_board(GDisplay *g, unsigned display) {
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// As we are not using multiple displays we set g->priv to NULL as we don't use it.
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g->priv = 0;
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if (display == 0) {
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/**
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* Set up for Display 0
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*/
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// RST
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palSetPadMode(IOPORTA, 7, PAL_MODE_OUTPUT);
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palClearPad(IOPORTA, 7);
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// RS
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palSetPadMode(IOPORTA, 10, PAL_MODE_OUTPUT);
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palSetPad(IOPORTA, 10);
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// CS
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palSetPadMode(IOPORTA, 9, PAL_MODE_OUTPUT);
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palClearPad(IOPORTA, 9);
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// Backlight
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palSetPadMode(IOPORTD, 3, PAL_MODE_OUTPUT);
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palSetPad(IOPORTD, 3);
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// PMP setup
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PMMODE = 0;
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PMAEN = 0;
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PMCON = 0;
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PMMODEbits.MODE = 2;
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PMMODEbits.WAITB = 0;
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PMMODEbits.WAITM = 1;
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PMMODEbits.WAITE = 0;
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PMCONbits.CSF = 0;
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PMCONbits.PTRDEN = 1;
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PMCONbits.PTWREN = 1;
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PMMODEbits.MODE16 = 1;
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PMCONbits.PMPEN = 1;
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palClearPad(IOPORTA, 9);
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}
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}
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#define PmpWaitBusy() do {} while (PMMODEbits.BUSY)
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static inline void post_init_board(GDisplay *g) {
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(void) g;
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}
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static noinline void setpin_reset(GDisplay *g, bool_t state) {
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(void) g;
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if (state)
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palClearPad(IOPORTA, 7);
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else
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palSetPad(IOPORTA, 7);
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}
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static void set_backlight(GDisplay *g, uint8_t percent) {
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(void) g;
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if (percentage)
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palClearPad(IOPORTD, 3);
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else
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palSetPad(IOPORTD, 3);
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}
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static inline void acquire_bus(GDisplay *g) {
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(void) g;
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}
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static inline void release_bus(GDisplay *g) {
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(void) g;
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}
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static noinline void write_index(GDisplay *g, uint16_t index) {
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volatile uint16_t dummy;
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(void) g;
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PmpWaitBusy();
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palClearPad(IOPORTA, 10);
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PMDIN = index;
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PmpWaitBusy();
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palSetPad(IOPORTA, 10);
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dummy = PMDIN;
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(void)dummy;
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}
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static noinline void write_data(GDisplay *g, uint16_t data) {
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(void) g;
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PMDIN = data;
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PmpWaitBusy();
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}
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static inline void setreadmode(GDisplay *g) {
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(void) g;
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}
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static inline void setwritemode(GDisplay *g) {
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(void) g;
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}
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static noinline uint16_t read_data(GDisplay *g) {
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(void) g;
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PmpWaitBusy();
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return PMDIN;
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}
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#endif /* GDISP_LLD_BOARD_H */
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@ -0,0 +1,103 @@
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/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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/**
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* @file drivers/gdisp/ILI9320/board_ILI9320_olimex_stm32_lcd.h
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* @brief GDISP Graphic Driver subsystem board interface for the ILI9320 display.
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*/
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#ifndef GDISP_LLD_BOARD_H
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#define GDISP_LLD_BOARD_H
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// For a multiple display configuration we would put all this in a structure and then
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// set g->priv to that structure.
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#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
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#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* RS = 1 */
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static inline void init_board(GDisplay *g, unsigned display) {
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// As we are not using multiple displays we set g->priv to NULL as we don't use it.
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g->priv = 0;
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if (display == 0) {
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/**
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* Set up for Display 0
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*/
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/* FSMC setup for F1 */
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rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
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/* set pin modes */
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IOBus busD = {GPIOD, PAL_WHOLE_PORT, 0};
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IOBus busE = {GPIOE, PAL_WHOLE_PORT, 0};
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palSetBusMode(&busD, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetBusMode(&busE, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetPadMode(GPIOE, GPIOE_TFT_RST, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, GPIOD_TFT_LIGHT, PAL_MODE_OUTPUT_PUSHPULL);
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/* FSMC timing */
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FSMC_Bank1->BTCR[0+1] = (6) | (10 << 8) | (10 << 16);
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/* Bank1 NOR/SRAM control register configuration
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* This is actually not needed as already set by default after reset */
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FSMC_Bank1->BTCR[0] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
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}
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}
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static inline void post_init_board(GDisplay *g) {
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(void) g;
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}
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static inline void setpin_reset(GDisplay *g, bool_t state) {
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(void) g;
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if(state)
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palClearPad(GPIOE, GPIOE_TFT_RST);
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else
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palSetPad(GPIOE, GPIOE_TFT_RST);
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}
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static inline void set_backlight(GDisplay *g, uint8_t percent) {
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(void) g;
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if(percent)
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palClearPad(GPIOD, GPIOD_TFT_LIGHT);
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else
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palSetPad(GPIOD, GPIOD_TFT_LIGHT);
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}
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static inline void acquire_bus(GDisplay *g) {
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(void) g;
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}
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static inline void release_bus(GDisplay *g) {
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(void) g;
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}
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static inline void write_index(GDisplay *g, uint16_t index) {
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(void) g;
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GDISP_REG = index;
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}
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static inline void write_data(GDisplay *g, uint16_t data) {
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(void) g;
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GDISP_RAM = data;
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}
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static inline void setreadmode(GDisplay *g) {
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(void) g;
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}
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static inline void setwritemode(GDisplay *g) {
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(void) g;
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}
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static inline uint16_t read_data(GDisplay *g) {
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(void) g;
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return GDISP_RAM;
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}
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#endif /* GDISP_LLD_BOARD_H */
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@ -0,0 +1,159 @@
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/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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/**
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* @file drivers/gdisp/ILI9320/board_ILI9320_template.h
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* @brief GDISP Graphic Driver subsystem board interface for the ILI9320 display.
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*
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* @addtogroup GDISP
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* @{
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*/
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#ifndef GDISP_LLD_BOARD_H
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#define GDISP_LLD_BOARD_H
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/**
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* @brief Initialise the board for the display.
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*
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* @param[in] g The GDisplay structure
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* @param[in] display The display number on this controller (0..n)
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*
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* @note Set the g->priv member to whatever is appropriate. For multiple
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* displays this might be a pointer to the appropriate register set.
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*
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* @notapi
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*/
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static inline void init_board(GDisplay *g, unsigned display) {
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(void) g;
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(void) display;
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}
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/**
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* @brief After the initialisation.
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*
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* @param[in] g The GDisplay structure
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*
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* @notapi
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*/
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static inline void post_init_board(GDisplay *g) {
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(void) g;
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}
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/**
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* @brief Set or clear the lcd reset pin.
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*
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* @param[in] g The GDisplay structure
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* @param[in] state TRUE = lcd in reset, FALSE = normal operation
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*
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* @notapi
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*/
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static inline void setpin_reset(GDisplay *g, bool_t state) {
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(void) g;
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(void) state;
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}
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/**
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* @brief Set the lcd back-light level.
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*
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* @param[in] g The GDisplay structure
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* @param[in] percent 0 to 100%
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*
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* @notapi
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*/
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static inline void set_backlight(GDisplay *g, uint8_t percent) {
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(void) g;
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(void) percent;
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}
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/**
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* @brief Take exclusive control of the bus
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*
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* @param[in] g The GDisplay structure
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*
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* @notapi
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*/
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static inline void acquire_bus(GDisplay *g) {
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(void) g;
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}
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/**
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* @brief Release exclusive control of the bus
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*
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* @param[in] g The GDisplay structure
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*
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* @notapi
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*/
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static inline void release_bus(GDisplay *g) {
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(void) g;
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}
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/**
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* @brief Send data to the index register.
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*
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* @param[in] g The GDisplay structure
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* @param[in] index The index register to set
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*
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* @notapi
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*/
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static inline void write_index(GDisplay *g, uint16_t index) {
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(void) g;
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(void) index;
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}
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/**
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* @brief Send data to the lcd.
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*
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* @param[in] g The GDisplay structure
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* @param[in] data The data to send
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*
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* @notapi
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*/
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static inline void write_data(GDisplay *g, uint16_t data) {
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(void) g;
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(void) data;
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}
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/**
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* @brief Set the bus in read mode
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*
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* @param[in] g The GDisplay structure
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*
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* @notapi
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*/
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static inline void setreadmode(GDisplay *g) {
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(void) g;
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}
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/**
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* @brief Set the bus back into write mode
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*
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* @param[in] g The GDisplay structure
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*
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* @notapi
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*/
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static inline void setwritemode(GDisplay *g) {
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(void) g;
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}
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/**
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* @brief Read data from the lcd.
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* @return The data from the lcd
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*
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* @param[in] g The GDisplay structure
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*
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* @note The chip select may need to be asserted/de-asserted
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* around the actual spi read
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*
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* @notapi
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*/
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static inline uint16_t read_data(GDisplay *g) {
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(void) g;
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return 0;
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}
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#endif /* GDISP_LLD_BOARD_H */
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/** @} */
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@ -24,9 +24,11 @@
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#undef GDISP_SCREEN_WIDTH
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#undef GDISP_SCREEN_WIDTH
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#endif
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#endif
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#define GDISP_LLD_DECLARATIONS
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#define GDISP_DRIVER_VMT GDISPVMT_SSD1289
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#include "../drivers/gdisp/ILI9320/gdisp_lld_config.h"
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#include "gdisp/lld/gdisp_lld.h"
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#include "gdisp/lld/gdisp_lld.h"
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#include "gdisp_lld_board.h"
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#include "board_ILI9320.h"
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/* Driver local definitions. */
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@ -48,129 +50,137 @@
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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uint32_t DISPLAY_CODE;
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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|
||||||
#define dummy_read() { volatile uint16_t dummy; dummy = read_data(); (void) dummy; }
|
#define dummy_read(g) { volatile uint16_t dummy; dummy = read_data(g); (void) dummy; }
|
||||||
#define write_reg(reg, data) { write_index(reg); write_data(data); }
|
#define write_reg(g, reg, data) { write_index(g, reg); write_data(g, data); }
|
||||||
|
|
||||||
static void set_cursor(GDISPDriver *g) {
|
static void set_cursor(GDisplay *g) {
|
||||||
switch(g->g.Orientation) {
|
switch(g->g.Orientation) {
|
||||||
case GDISP_ROTATE_0:
|
case GDISP_ROTATE_0:
|
||||||
case GDISP_ROTATE_180:
|
case GDISP_ROTATE_180:
|
||||||
write_reg(0x0020, g->p.x);
|
write_reg(g, 0x20, g->p.x);
|
||||||
write_reg(0x0021, g->p.y);
|
write_reg(g, 0x21, g->p.y);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case GDISP_ROTATE_90:
|
case GDISP_ROTATE_90:
|
||||||
case GDISP_ROTATE_270:
|
case GDISP_ROTATE_270:
|
||||||
write_reg(0x0020, g->p.y);
|
write_reg(g, 0x20, g->p.y);
|
||||||
write_reg(0x0021, g->p.x);
|
write_reg(g, 0x21, g->p.x);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
write_index(0x0022);
|
write_index(g, 0x22);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void set_viewport(GDISPDriver *g) {
|
static void set_viewport(GDisplay *g) {
|
||||||
switch(g->g.Orientation) {
|
switch(g->g.Orientation) {
|
||||||
case GDISP_ROTATE_0:
|
case GDISP_ROTATE_0:
|
||||||
case GDISP_ROTATE_180:
|
case GDISP_ROTATE_180:
|
||||||
write_reg(0x0050, g->p.x);
|
write_reg(g, 0x50, g->p.x);
|
||||||
write_reg(0x0051, g->p.x + g->p.cx - 1);
|
write_reg(g, 0x51, g->p.x + g->p.cx - 1);
|
||||||
write_reg(0x0052, g->p.y);
|
write_reg(g, 0x52, g->p.y);
|
||||||
write_reg(0x0053, g->p.y + g->p.cy - 1);
|
write_reg(g, 0x53, g->p.y + g->p.cy - 1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case GDISP_ROTATE_90:
|
case GDISP_ROTATE_90:
|
||||||
case GDISP_ROTATE_270:
|
case GDISP_ROTATE_270:
|
||||||
write_reg(0x0050, g->p.y);
|
write_reg(g, 0x50, g->p.y);
|
||||||
write_reg(0x0051, g->p.y + g->p.cy - 1);
|
write_reg(g, 0x51, g->p.y + g->p.cy - 1);
|
||||||
write_reg(0x0052, g->p.x);
|
write_reg(g, 0x52, g->p.x);
|
||||||
write_reg(0x0053, g->p.x + g->p.cx - 1);
|
write_reg(g, 0x53, g->p.x + g->p.cx - 1);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
|
LLDSPEC bool_t gdisp_lld_init(GDisplay *g, unsigned display) {
|
||||||
|
uint16_t cver;
|
||||||
|
|
||||||
/* Initialise your display */
|
/* Initialise your display */
|
||||||
init_board();
|
init_board(g, display);
|
||||||
|
|
||||||
/* Hardware reset */
|
/* Hardware reset */
|
||||||
setpin_reset(TRUE);
|
setpin_reset(g, TRUE);
|
||||||
gfxSleepMicroseconds(1000);
|
gfxSleepMicroseconds(1000);
|
||||||
setpin_reset(FALSE);
|
setpin_reset(g, FALSE);
|
||||||
gfxSleepMicroseconds(1000);
|
gfxSleepMicroseconds(1000);
|
||||||
|
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_index(0); // Get controller version
|
write_index(g, 0); // Get controller version
|
||||||
dummy_read();
|
setreadmode(g);
|
||||||
DISPLAY_CODE = read_data();
|
dummy_read(g);
|
||||||
write_reg(0x0000, 0x0001); //start Int. osc
|
cver = read_data(g);
|
||||||
|
setwritemode(g);
|
||||||
|
write_reg(g, 0x00, 0x0001); //start Int. osc
|
||||||
gfxSleepMicroseconds(500);
|
gfxSleepMicroseconds(500);
|
||||||
write_reg(0x0001, 0x0100); //Set SS bit (shift direction of outputs is from S720 to S1)
|
write_reg(g, 0x01, 0x0100); //Set SS bit (shift direction of outputs is from S720 to S1)
|
||||||
write_reg(0x0002, 0x0700); //select the line inversion
|
write_reg(g, 0x02, 0x0700); //select the line inversion
|
||||||
write_reg(0x0003, 0x1038); //Entry mode(Horizontal : increment,Vertical : increment, AM=1)
|
write_reg(g, 0x03, 0x1038); //Entry mode(Horizontal : increment,Vertical : increment, AM=1)
|
||||||
write_reg(0x0004, 0x0000); //Resize control(No resizing)
|
write_reg(g, 0x04, 0x0000); //Resize control(No resizing)
|
||||||
write_reg(0x0008, 0x0202); //front and back porch 2 lines
|
write_reg(g, 0x08, 0x0202); //front and back porch 2 lines
|
||||||
write_reg(0x0009, 0x0000); //select normal scan
|
write_reg(g, 0x09, 0x0000); //select normal scan
|
||||||
write_reg(0x000A, 0x0000); //display control 4
|
write_reg(g, 0x0A, 0x0000); //display control 4
|
||||||
write_reg(0x000C, 0x0000); //system interface(2 transfer /pixel), internal sys clock,
|
write_reg(g, 0x0C, 0x0000); //system interface(2 transfer /pixel), internal sys clock,
|
||||||
write_reg(0x000D, 0x0000); //Frame marker position
|
write_reg(g, 0x0D, 0x0000); //Frame marker position
|
||||||
write_reg(0x000F, 0x0000); //selects clk, enable and sync signal polarity,
|
write_reg(g, 0x0F, 0x0000); //selects clk, enable and sync signal polarity,
|
||||||
write_reg(0x0010, 0x0000); //
|
write_reg(g, 0x10, 0x0000); //
|
||||||
write_reg(0x0011, 0x0000); //power control 2 reference voltages = 1:1,
|
write_reg(g, 0x11, 0x0000); //power control 2 reference voltages = 1:1,
|
||||||
write_reg(0x0012, 0x0000); //power control 3 VRH
|
write_reg(g, 0x12, 0x0000); //power control 3 VRH
|
||||||
write_reg(0x0013, 0x0000); //power control 4 VCOM amplitude
|
write_reg(g, 0x13, 0x0000); //power control 4 VCOM amplitude
|
||||||
gfxSleepMicroseconds(500);
|
gfxSleepMicroseconds(500);
|
||||||
write_reg(0x0010, 0x17B0); //power control 1 BT,AP
|
write_reg(g, 0x10, 0x17B0); //power control 1 BT,AP
|
||||||
write_reg(0x0011, 0x0137); //power control 2 DC,VC
|
write_reg(g, 0x11, 0x0137); //power control 2 DC,VC
|
||||||
gfxSleepMicroseconds(500);
|
gfxSleepMicroseconds(500);
|
||||||
write_reg(0x0012, 0x0139); //power control 3 VRH
|
write_reg(g, 0x12, 0x0139); //power control 3 VRH
|
||||||
gfxSleepMicroseconds(500);
|
gfxSleepMicroseconds(500);
|
||||||
write_reg(0x0013, 0x1d00); //power control 4 vcom amplitude
|
write_reg(g, 0x13, 0x1d00); //power control 4 vcom amplitude
|
||||||
write_reg(0x0029, 0x0011); //power control 7 VCOMH
|
write_reg(g, 0x29, 0x0011); //power control 7 VCOMH
|
||||||
gfxSleepMicroseconds(500);
|
gfxSleepMicroseconds(500);
|
||||||
write_reg(0x0030, 0x0007);
|
write_reg(g, 0x30, 0x0007);
|
||||||
write_reg(0x0031, 0x0403);
|
write_reg(g, 0x31, 0x0403);
|
||||||
write_reg(0x0032, 0x0404);
|
write_reg(g, 0x32, 0x0404);
|
||||||
write_reg(0x0035, 0x0002);
|
write_reg(g, 0x35, 0x0002);
|
||||||
write_reg(0x0036, 0x0707);
|
write_reg(g, 0x36, 0x0707);
|
||||||
write_reg(0x0037, 0x0606);
|
write_reg(g, 0x37, 0x0606);
|
||||||
write_reg(0x0038, 0x0106);
|
write_reg(g, 0x38, 0x0106);
|
||||||
write_reg(0x0039, 0x0007);
|
write_reg(g, 0x39, 0x0007);
|
||||||
write_reg(0x003c, 0x0700);
|
write_reg(g, 0x3c, 0x0700);
|
||||||
write_reg(0x003d, 0x0707);
|
write_reg(g, 0x3d, 0x0707);
|
||||||
write_reg(0x0020, 0x0000); //starting Horizontal GRAM Address
|
write_reg(g, 0x20, 0x0000); //starting Horizontal GRAM Address
|
||||||
write_reg(0x0021, 0x0000); //starting Vertical GRAM Address
|
write_reg(g, 0x21, 0x0000); //starting Vertical GRAM Address
|
||||||
write_reg(0x0050, 0x0000); //Horizontal GRAM Start Position
|
write_reg(g, 0x50, 0x0000); //Horizontal GRAM Start Position
|
||||||
write_reg(0x0051, 0x00EF); //Horizontal GRAM end Position
|
write_reg(g, 0x51, 0x00EF); //Horizontal GRAM end Position
|
||||||
write_reg(0x0052, 0x0000); //Vertical GRAM Start Position
|
write_reg(g, 0x52, 0x0000); //Vertical GRAM Start Position
|
||||||
write_reg(0x0053, 0x013F); //Vertical GRAM end Position
|
write_reg(g, 0x53, 0x013F); //Vertical GRAM end Position
|
||||||
switch (DISPLAY_CODE) {
|
switch (cver) {
|
||||||
case 0x9320:
|
case 0x9320:
|
||||||
write_reg(0x0060, 0x2700); //starts scanning from G1, and 320 drive lines
|
write_reg(g, 0x60, 0x2700); //starts scanning from G1, and 320 drive lines
|
||||||
break;
|
break;
|
||||||
case 0x9325:
|
case 0x9325:
|
||||||
write_reg(0x0060, 0xA700); //starts scanning from G1, and 320 drive lines
|
write_reg(g, 0x60, 0xA700); //starts scanning from G1, and 320 drive lines
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
write_reg(0x0061, 0x0001); //fixed base display
|
write_reg(g, 0x61, 0x0001); //fixed base display
|
||||||
write_reg(0x006a, 0x0000); //no scroll
|
write_reg(g, 0x6a, 0x0000); //no scroll
|
||||||
write_reg(0x0090, 0x0010); //set Clocks/Line =16, Internal Operation Clock Frequency=fosc/1,
|
write_reg(g, 0x90, 0x0010); //set Clocks/Line =16, Internal Operation Clock Frequency=fosc/1,
|
||||||
write_reg(0x0092, 0x0000); //set gate output non-overlap period=0
|
write_reg(g, 0x92, 0x0000); //set gate output non-overlap period=0
|
||||||
write_reg(0x0093, 0x0003); //set Source Output Position=3
|
write_reg(g, 0x93, 0x0003); //set Source Output Position=3
|
||||||
write_reg(0x0095, 0x0110); //RGB interface(Clocks per line period=16 clocks)
|
write_reg(g, 0x95, 0x0110); //RGB interface(Clocks per line period=16 clocks)
|
||||||
write_reg(0x0097, 0x0110); //set Gate Non-overlap Period 0 locksc
|
write_reg(g, 0x97, 0x0110); //set Gate Non-overlap Period 0 locksc
|
||||||
write_reg(0x0098, 0x0110); //
|
write_reg(g, 0x98, 0x0110); //
|
||||||
write_reg(0x0007, 0x0173); //display On
|
write_reg(g, 0x07, 0x0173); //display On
|
||||||
release_bus();
|
|
||||||
|
// Finish Init
|
||||||
|
post_init_board(g);
|
||||||
|
|
||||||
|
// Release the bus
|
||||||
|
release_bus(g);
|
||||||
|
|
||||||
// Turn on the backlight
|
// Turn on the backlight
|
||||||
set_backlight(GDISP_INITIAL_BACKLIGHT);
|
set_backlight(g, GDISP_INITIAL_BACKLIGHT);
|
||||||
|
|
||||||
/* Initialise the GDISP structure */
|
/* Initialise the GDISP structure */
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||||
|
@ -183,108 +193,105 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
|
||||||
}
|
}
|
||||||
|
|
||||||
#if GDISP_HARDWARE_STREAM_WRITE
|
#if GDISP_HARDWARE_STREAM_WRITE
|
||||||
LLDSPEC void gdisp_lld_write_start(GDISPDriver *g) {
|
LLDSPEC void gdisp_lld_write_start(GDisplay *g) {
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
set_viewport(g);
|
set_viewport(g);
|
||||||
}
|
}
|
||||||
LLDSPEC void gdisp_lld_write_color(GDISPDriver *g) {
|
LLDSPEC void gdisp_lld_write_color(GDisplay *g) {
|
||||||
write_data(g->p.color);
|
write_data(g, g->p.color);
|
||||||
}
|
}
|
||||||
LLDSPEC void gdisp_lld_write_stop(GDISPDriver *g) {
|
LLDSPEC void gdisp_lld_write_stop(GDisplay *g) {
|
||||||
release_bus();
|
release_bus(g);
|
||||||
}
|
}
|
||||||
LLDSPEC void gdisp_lld_write_pos(GDISPDriver *g) {
|
LLDSPEC void gdisp_lld_write_pos(GDisplay *g) {
|
||||||
set_cursor(g);
|
set_cursor(g);
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if GDISP_HARDWARE_STREAM_READ
|
#if GDISP_HARDWARE_STREAM_READ
|
||||||
LLDSPEC void gdisp_lld_read_start(GDISPDriver *g) {
|
LLDSPEC void gdisp_lld_read_start(GDisplay *g) {
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
set_viewport(g);
|
set_viewport(g);
|
||||||
set_cursor(g);
|
set_cursor(g);
|
||||||
setreadmode();
|
setreadmode(g);
|
||||||
dummy_read();
|
dummy_read(g);
|
||||||
}
|
}
|
||||||
LLDSPEC color_t gdisp_lld_read_color(GDISPDriver *g) {
|
LLDSPEC color_t gdisp_lld_read_color(GDisplay *g) {
|
||||||
return read_data();
|
return read_data(g);
|
||||||
}
|
}
|
||||||
LLDSPEC void gdisp_lld_read_stop(GDISPDriver *g) {
|
LLDSPEC void gdisp_lld_read_stop(GDisplay *g) {
|
||||||
setwritemode();
|
setwritemode(g);
|
||||||
release_bus();
|
release_bus(g);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
|
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
|
||||||
LLDSPEC void gdisp_lld_control(GDISPDriver *g) {
|
LLDSPEC void gdisp_lld_control(GDisplay *g) {
|
||||||
switch(g->p.x) {
|
switch(g->p.x) {
|
||||||
case GDISP_CONTROL_POWER:
|
case GDISP_CONTROL_POWER:
|
||||||
if (g->g.Powermode == (powermode_t)g->p.ptr)
|
if (g->g.Powermode == (powermode_t)g->p.ptr)
|
||||||
return;
|
return;
|
||||||
switch((powermode_t)g->p.ptr) {
|
switch((powermode_t)g->p.ptr) {
|
||||||
case powerOff:
|
case powerOff:
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_reg(0x0007, 0x0000);
|
write_reg(g, 0x07, 0x0000);
|
||||||
write_reg(0x0010, 0x0000);
|
write_reg(g, 0x10, 0x0000);
|
||||||
write_reg(0x0011, 0x0000);
|
write_reg(g, 0x11, 0x0000);
|
||||||
write_reg(0x0012, 0x0000);
|
write_reg(g, 0x12, 0x0000);
|
||||||
write_reg(0x0013, 0x0000);
|
write_reg(g, 0x13, 0x0000);
|
||||||
release_bus();
|
release_bus(g);
|
||||||
|
|
||||||
set_backlight(0);
|
set_backlight(g, 0);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case powerOn:
|
case powerOn:
|
||||||
//*************Power On sequence ******************//
|
//*************Power On sequence ******************//
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_reg(0x0010, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
|
write_reg(g, 0x10, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
|
||||||
write_reg(0x0011, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */
|
write_reg(g, 0x11, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */
|
||||||
write_reg(0x0012, 0x0000); /* VREG1OUT voltage */
|
write_reg(g, 0x12, 0x0000); /* VREG1OUT voltage */
|
||||||
write_reg(0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */
|
write_reg(g, 0x13, 0x0000); /* VDV[4:0] for VCOM amplitude */
|
||||||
gfxSleepMicroseconds(2000); /* Dis-charge capacitor power voltage */
|
gfxSleepMicroseconds(2000); /* Dis-charge capacitor power voltage */
|
||||||
write_reg(0x0010, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
|
write_reg(g, 0x10, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
|
||||||
write_reg(0x0011, 0x0147); /* DC1[2:0], DC0[2:0], VC[2:0] */
|
write_reg(g, 0x11, 0x0147); /* DC1[2:0], DC0[2:0], VC[2:0] */
|
||||||
gfxSleepMicroseconds(500);
|
gfxSleepMicroseconds(500);
|
||||||
write_reg(0x0012, 0x013C); /* VREG1OUT voltage */
|
write_reg(g, 0x12, 0x013C); /* VREG1OUT voltage */
|
||||||
gfxSleepMicroseconds(500);
|
gfxSleepMicroseconds(500);
|
||||||
write_reg(0x0013, 0x0E00); /* VDV[4:0] for VCOM amplitude */
|
write_reg(g, 0x13, 0x0E00); /* VDV[4:0] for VCOM amplitude */
|
||||||
write_reg(0x0029, 0x0009); /* VCM[4:0] for VCOMH */
|
write_reg(g, 0x29, 0x0009); /* VCM[4:0] for VCOMH */
|
||||||
gfxSleepMicroseconds(500);
|
gfxSleepMicroseconds(500);
|
||||||
write_reg(0x0007, 0x0173); /* 262K color and display ON */
|
write_reg(g, 0x07, 0x0173); /* 262K color and display ON */
|
||||||
release_bus();
|
release_bus(g);
|
||||||
|
|
||||||
set_backlight(g->g.Backlight);
|
set_backlight(g, g->g.Backlight);
|
||||||
if(g->g.Powermode != powerSleep || g->g.Powermode != powerDeepSleep)
|
|
||||||
gdisp_lld_init();
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case powerSleep:
|
case powerSleep:
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_reg(0x0007, 0x0000); /* display OFF */
|
write_reg(g, 0x07, 0x0000); /* display OFF */
|
||||||
write_reg(0x0010, 0x0000); /* SAP, BT[3:0], APE, AP, DSTB, SLP */
|
write_reg(g, 0x10, 0x0000); /* SAP, BT[3:0], APE, AP, DSTB, SLP */
|
||||||
write_reg(0x0011, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */
|
write_reg(g, 0x11, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */
|
||||||
write_reg(0x0012, 0x0000); /* VREG1OUT voltage */
|
write_reg(g, 0x12, 0x0000); /* VREG1OUT voltage */
|
||||||
write_reg(0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */
|
write_reg(g, 0x13, 0x0000); /* VDV[4:0] for VCOM amplitude */
|
||||||
gfxSleepMicroseconds(2000); /* Dis-charge capacitor power voltage */
|
gfxSleepMicroseconds(2000); /* Dis-charge capacitor power voltage */
|
||||||
write_reg(0x0010, 0x0002); /* SAP, BT[3:0], APE, AP, DSTB, SLP */
|
write_reg(g, 0x10, 0x0002); /* SAP, BT[3:0], APE, AP, DSTB, SLP */
|
||||||
release_bus();
|
release_bus(g);
|
||||||
|
|
||||||
set_backlight(0);
|
set_backlight(g, 0);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case powerDeepSleep:
|
case powerDeepSleep:
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_reg(0x0007, 0x0000); /* display OFF */
|
write_reg(g, 0x07, 0x0000); /* display OFF */
|
||||||
write_reg(0x0010, 0x0000); /* SAP, BT[3:0], APE, AP, DSTB, SLP */
|
write_reg(g, 0x10, 0x0000); /* SAP, BT[3:0], APE, AP, DSTB, SLP */
|
||||||
write_reg(0x0011, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */
|
write_reg(g, 0x11, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */
|
||||||
write_reg(0x0012, 0x0000); /* VREG1OUT voltage */
|
write_reg(g, 0x12, 0x0000); /* VREG1OUT voltage */
|
||||||
write_reg(0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */
|
write_reg(g, 0x13, 0x0000); /* VDV[4:0] for VCOM amplitude */
|
||||||
gfxSleepMicroseconds(2000); /* Dis-charge capacitor power voltage */
|
gfxSleepMicroseconds(2000); /* Dis-charge capacitor power voltage */
|
||||||
write_reg(0x0010, 0x0004); /* SAP, BT[3:0], APE, AP, DSTB, SLP */
|
write_reg(g, 0x10, 0x0004); /* SAP, BT[3:0], APE, AP, DSTB, SLP */
|
||||||
release_bus();
|
release_bus(g);
|
||||||
|
|
||||||
set_backlight(0);
|
set_backlight(g, 0);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
@ -298,44 +305,44 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
|
||||||
return;
|
return;
|
||||||
switch((orientation_t)g->p.ptr) {
|
switch((orientation_t)g->p.ptr) {
|
||||||
case GDISP_ROTATE_0:
|
case GDISP_ROTATE_0:
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_reg(0x0001, 0x0100);
|
write_reg(g, 0x01, 0x0100);
|
||||||
write_reg(0x0003, 0x1038);
|
write_reg(g, 0x03, 0x1038);
|
||||||
write_reg(0x0060, 0x2700);
|
write_reg(g, 0x60, 0x2700);
|
||||||
release_bus();
|
release_bus(g);
|
||||||
|
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
g->g.Height = GDISP_SCREEN_HEIGHT;
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case GDISP_ROTATE_90:
|
case GDISP_ROTATE_90:
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_reg(0x0001, 0x0100);
|
write_reg(g, 0x01, 0x0100);
|
||||||
write_reg(0x0003, 0x1030);
|
write_reg(g, 0x03, 0x1030);
|
||||||
write_reg(0x0060, 0x2700);
|
write_reg(g, 0x60, 0x2700);
|
||||||
release_bus();
|
release_bus(g);
|
||||||
|
|
||||||
g->g.Height = GDISP_SCREEN_WIDTH;
|
g->g.Height = GDISP_SCREEN_WIDTH;
|
||||||
g->g.Width = GDISP_SCREEN_HEIGHT;
|
g->g.Width = GDISP_SCREEN_HEIGHT;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case GDISP_ROTATE_180:
|
case GDISP_ROTATE_180:
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_reg(0x0001, 0x0000);
|
write_reg(g, 0x01, 0x0000);
|
||||||
write_reg(0x0003, 0x1030);
|
write_reg(g, 0x03, 0x1030);
|
||||||
write_reg(0x0060, 0x2700);
|
write_reg(g, 0x60, 0x2700);
|
||||||
release_bus();
|
release_bus(g);
|
||||||
|
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
g->g.Height = GDISP_SCREEN_HEIGHT;
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case GDISP_ROTATE_270:
|
case GDISP_ROTATE_270:
|
||||||
acquire_bus();
|
acquire_bus(g);
|
||||||
write_reg(0x0001, 0x0000);
|
write_reg(g, 0x01, 0x0000);
|
||||||
write_reg(0x0003, 0x1038);
|
write_reg(g, 0x03, 0x1038);
|
||||||
write_reg(0x0060, 0xA700);
|
write_reg(g, 0x60, 0xA700);
|
||||||
release_bus();
|
release_bus(g);
|
||||||
|
|
||||||
g->g.Height = GDISP_SCREEN_WIDTH;
|
g->g.Height = GDISP_SCREEN_WIDTH;
|
||||||
g->g.Width = GDISP_SCREEN_HEIGHT;
|
g->g.Width = GDISP_SCREEN_HEIGHT;
|
||||||
|
@ -350,7 +357,7 @@ LLDSPEC bool_t gdisp_lld_init(GDISPDriver *g) {
|
||||||
case GDISP_CONTROL_BACKLIGHT:
|
case GDISP_CONTROL_BACKLIGHT:
|
||||||
if ((unsigned)g->p.ptr > 100)
|
if ((unsigned)g->p.ptr > 100)
|
||||||
g->p.ptr = (void *)100;
|
g->p.ptr = (void *)100;
|
||||||
set_backlight((unsigned)g->p.ptr);
|
set_backlight(g, (unsigned)g->p.ptr);
|
||||||
g->g.Backlight = (unsigned)g->p.ptr;
|
g->g.Backlight = (unsigned)g->p.ptr;
|
||||||
return;
|
return;
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -1,5 +1,2 @@
|
||||||
# List the required driver.
|
|
||||||
GFXSRC += $(GFXLIB)/drivers/gdisp/ILI9320/gdisp_lld.c
|
|
||||||
|
|
||||||
# Required include directories
|
|
||||||
GFXINC += $(GFXLIB)/drivers/gdisp/ILI9320
|
GFXINC += $(GFXLIB)/drivers/gdisp/ILI9320
|
||||||
|
GFXSRC += $(GFXLIB)/drivers/gdisp/ILI9320/gdisp_lld.c
|
||||||
|
|
|
@ -1,113 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.org/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @file drivers/gdisp/ILI9320/gdisp_lld_board_olimex_pic32mx_lcd.h
|
|
||||||
* @brief GDISP Graphic Driver subsystem board interface for the ILI9325 display.
|
|
||||||
*
|
|
||||||
* @addtogroup GDISP
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef GDISP_LLD_BOARD_H
|
|
||||||
#define GDISP_LLD_BOARD_H
|
|
||||||
|
|
||||||
#ifndef noinline
|
|
||||||
#define noinline __attribute__((noinline))
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static void init_board(void) {
|
|
||||||
// RST
|
|
||||||
palSetPadMode(IOPORTA, 7, PAL_MODE_OUTPUT);
|
|
||||||
palClearPad(IOPORTA, 7);
|
|
||||||
|
|
||||||
// RS
|
|
||||||
palSetPadMode(IOPORTA, 10, PAL_MODE_OUTPUT);
|
|
||||||
palSetPad(IOPORTA, 10);
|
|
||||||
|
|
||||||
// CS
|
|
||||||
palSetPadMode(IOPORTA, 9, PAL_MODE_OUTPUT);
|
|
||||||
palClearPad(IOPORTA, 9);
|
|
||||||
|
|
||||||
// Backlight
|
|
||||||
palSetPadMode(IOPORTD, 3, PAL_MODE_OUTPUT);
|
|
||||||
palSetPad(IOPORTD, 3);
|
|
||||||
|
|
||||||
// PMP setup
|
|
||||||
PMMODE = 0;
|
|
||||||
PMAEN = 0;
|
|
||||||
PMCON = 0;
|
|
||||||
PMMODEbits.MODE = 2;
|
|
||||||
PMMODEbits.WAITB = 0;
|
|
||||||
PMMODEbits.WAITM = 1;
|
|
||||||
PMMODEbits.WAITE = 0;
|
|
||||||
PMCONbits.CSF = 0;
|
|
||||||
PMCONbits.PTRDEN = 1;
|
|
||||||
PMCONbits.PTWREN = 1;
|
|
||||||
PMMODEbits.MODE16 = 1;
|
|
||||||
PMCONbits.PMPEN = 1;
|
|
||||||
|
|
||||||
palClearPad(IOPORTA, 9);
|
|
||||||
}
|
|
||||||
|
|
||||||
#define PmpWaitBusy() do {} while (PMMODEbits.BUSY)
|
|
||||||
|
|
||||||
static noinline void setpin_reset(bool_t state) {
|
|
||||||
if (state)
|
|
||||||
palClearPad(IOPORTA, 7);
|
|
||||||
else
|
|
||||||
palSetPad(IOPORTA, 7);
|
|
||||||
}
|
|
||||||
|
|
||||||
static noinline void write_index(uint16_t data) {
|
|
||||||
volatile uint16_t dummy;
|
|
||||||
|
|
||||||
PmpWaitBusy();
|
|
||||||
palClearPad(IOPORTA, 10);
|
|
||||||
PMDIN = data;
|
|
||||||
PmpWaitBusy();
|
|
||||||
palSetPad(IOPORTA, 10);
|
|
||||||
|
|
||||||
dummy = PMDIN;
|
|
||||||
(void)dummy;
|
|
||||||
}
|
|
||||||
|
|
||||||
static noinline void write_data(uint16_t data) {
|
|
||||||
PMDIN = data;
|
|
||||||
PmpWaitBusy();
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void setreadmode(void) {
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void setwritemode(void) {
|
|
||||||
}
|
|
||||||
|
|
||||||
static noinline uint16_t read_data(void) {
|
|
||||||
PmpWaitBusy();
|
|
||||||
return PMDIN;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* if not available, just ignore the argument and return */
|
|
||||||
static void set_backlight(uint8_t percentage) {
|
|
||||||
if (percentage)
|
|
||||||
palClearPad(IOPORTD, 3);
|
|
||||||
else
|
|
||||||
palSetPad(IOPORTD, 3);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void acquire_bus(void) {
|
|
||||||
/* Nothing to do here since LCD is the only device on that bus */
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void release_bus(void) {
|
|
||||||
/* Nothing to do here since LCD is the only device on that bus */
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* GDISP_LLD_BOARD_H */
|
|
||||||
/** @} */
|
|
||||||
|
|
|
@ -1,86 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.org/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @file drivers/gdisp/ILI9320/gdisp_lld_board_olimex_stm32_lcd.h
|
|
||||||
* @brief GDISP Graphic Driver subsystem board interface for the ILI9320 display.
|
|
||||||
*
|
|
||||||
* @addtogroup GDISP
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef GDISP_LLD_BOARD_H
|
|
||||||
#define GDISP_LLD_BOARD_H
|
|
||||||
|
|
||||||
#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
|
|
||||||
#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* RS = 1 */
|
|
||||||
|
|
||||||
static inline void init_board(void) {
|
|
||||||
/* FSMC setup for F1 */
|
|
||||||
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
|
|
||||||
|
|
||||||
/* set pin modes */
|
|
||||||
IOBus busD = {GPIOD, PAL_WHOLE_PORT, 0};
|
|
||||||
IOBus busE = {GPIOE, PAL_WHOLE_PORT, 0};
|
|
||||||
palSetBusMode(&busD, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
|
|
||||||
palSetBusMode(&busE, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
|
|
||||||
palSetPadMode(GPIOE, GPIOE_TFT_RST, PAL_MODE_OUTPUT_PUSHPULL);
|
|
||||||
palSetPadMode(GPIOD, GPIOD_TFT_LIGHT, PAL_MODE_OUTPUT_PUSHPULL);
|
|
||||||
|
|
||||||
const unsigned char FSMC_Bank = 0;
|
|
||||||
|
|
||||||
/* FSMC timing */
|
|
||||||
FSMC_Bank1->BTCR[FSMC_Bank+1] = (6) | (10 << 8) | (10 << 16);
|
|
||||||
|
|
||||||
/* Bank1 NOR/SRAM control register configuration
|
|
||||||
* This is actually not needed as already set by default after reset */
|
|
||||||
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void setpin_reset(bool_t state) {
|
|
||||||
if(state)
|
|
||||||
palClearPad(GPIOE, GPIOE_TFT_RST);
|
|
||||||
else
|
|
||||||
palSetPad(GPIOE, GPIOE_TFT_RST);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void acquire_bus(void) {
|
|
||||||
/* Nothing to do here since LCD is the only device on that bus */
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void release_bus(void) {
|
|
||||||
/* Nothing to do here since LCD is the only device on that bus */
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void write_index(uint16_t reg) {
|
|
||||||
GDISP_REG = reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void write_data(uint16_t data) {
|
|
||||||
GDISP_RAM = data;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void setreadmode(void) {
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void setwritemode(void) {
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline uint16_t read_data(void) {
|
|
||||||
return GDISP_RAM;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void set_backlight(uint8_t percent) {
|
|
||||||
if(percent == 100)
|
|
||||||
palClearPad(GPIOD, GPIOD_TFT_LIGHT);
|
|
||||||
else
|
|
||||||
palSetPad(GPIOD, GPIOD_TFT_LIGHT);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* GDISP_LLD_BOARD_H */
|
|
||||||
/** @} */
|
|
||||||
|
|
|
@ -1,61 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.org/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @file drivers/gdisp/ILI9320/gdisp_lld_board_template.h
|
|
||||||
* @brief GDISP Graphic Driver subsystem board interface for the ILI9320 display.
|
|
||||||
*
|
|
||||||
* @addtogroup GDISP
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef GDISP_LLD_BOARD_H
|
|
||||||
#define GDISP_LLD_BOARD_H
|
|
||||||
|
|
||||||
static inline void init_board(void) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void setpin_reset(bool_t state) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void acquire_bus(void) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void release_bus(void) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void write_index(uint16_t data) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void write_data(uint16_t data) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void setreadmode(void) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void setwritemode(void) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline uint16_t read_data(void) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline uint16_t set_backlight(uint8_t percentage) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* GDISP_LLD_BOARD_H */
|
|
||||||
/** @} */
|
|
||||||
|
|
|
@ -22,9 +22,6 @@
|
||||||
/* Driver hardware support. */
|
/* Driver hardware support. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define GDISP_DRIVER_NAME "ILI9320"
|
|
||||||
#define GDISP_DRIVER_STRUCT GDISP_ILI9320
|
|
||||||
|
|
||||||
#define GDISP_HARDWARE_STREAM_WRITE TRUE
|
#define GDISP_HARDWARE_STREAM_WRITE TRUE
|
||||||
#define GDISP_HARDWARE_STREAM_READ TRUE
|
#define GDISP_HARDWARE_STREAM_READ TRUE
|
||||||
#define GDISP_HARDWARE_STREAM_POS TRUE
|
#define GDISP_HARDWARE_STREAM_POS TRUE
|
||||||
|
|
Loading…
Reference in New Issue