SSD1289 update by user Eddie

ugfx_release_2.6
Joel Bodenmann 2013-06-04 00:34:47 +02:00
parent 9945b011a9
commit f14ed21d5d
3 changed files with 820 additions and 568 deletions

View File

@ -43,6 +43,8 @@
#include "gdisp_lld_board.h"
#elif defined(BOARD_FIREBULL_STM32_F103)
#include "gdisp_lld_board_firebullstm32f103.h"
#elif defined(BOARD_ST_STM32F4_DISCOVERY)
#include "gdisp_lld_board_st_stm32f4_discovery.h"
#else
/* Include the user supplied board definitions */
#include "gdisp_lld_board.h"
@ -82,7 +84,7 @@ static inline void set_cursor(coord_t x, coord_t y) {
static void set_viewport(coord_t x, coord_t y, coord_t cx, coord_t cy) {
set_cursor(x, y);
//set_cursor(x, y);
/* Reg 0x44 - Horizontal RAM address position
* Upper Byte - HEA
@ -266,14 +268,34 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
* @notapi
*/
void gdisp_lld_clear(color_t color) {
unsigned i;
unsigned area;
area = GDISP_SCREEN_WIDTH * GDISP_SCREEN_HEIGHT;
acquire_bus();
reset_viewport();
set_cursor(0, 0);
stream_start();
for(i = 0; i < GDISP_SCREEN_WIDTH * GDISP_SCREEN_HEIGHT; i++)
write_data(color);
#if defined(GDISP_USE_FSMC) && defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
uint8_t i;
dmaStreamSetPeripheral(GDISP_DMA_STREAM, &color);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (i = area/65535; i; i--) {
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, 65535);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
}
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area%65535);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
#else
uint32_t index;
for(index = 0; index < area; index++)
write_data(color);
#endif //#ifdef GDISP_USE_DMA
stream_stop();
release_bus();
}
@ -291,7 +313,7 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
* @notapi
*/
void gdisp_lld_fill_area(coord_t x, coord_t y, coord_t cx, coord_t cy, color_t color) {
unsigned i, area;
unsigned area;
#if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP
if (x < GDISP.clipx0) { cx -= GDISP.clipx0 - x; x = GDISP.clipx0; }
@ -306,8 +328,25 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
acquire_bus();
set_viewport(x, y, cx, cy);
stream_start();
for(i = 0; i < area; i++)
write_data(color);
#if defined(GDISP_USE_FSMC) && defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
uint8_t i;
dmaStreamSetPeripheral(GDISP_DMA_STREAM, &color);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (i = area/65535; i; i--) {
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, 65535);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
}
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area%65535);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
#else
uint32_t index;
for(index = 0; index < area; index++)
write_data(color);
#endif //#ifdef GDISP_USE_DMA
stream_stop();
release_bus();
}
@ -327,8 +366,6 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
* @notapi
*/
void gdisp_lld_blit_area_ex(coord_t x, coord_t y, coord_t cx, coord_t cy, coord_t srcx, coord_t srcy, coord_t srccx, const pixel_t *buffer) {
coord_t endx, endy;
unsigned lg;
#if GDISP_NEED_VALIDATION || GDISP_NEED_CLIP
if (x < GDISP.clipx0) { cx -= GDISP.clipx0 - x; srcx += GDISP.clipx0 - x; x = GDISP.clipx0; }
@ -339,17 +376,36 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
if (y+cy > GDISP.clipy1) cy = GDISP.clipy1 - y;
#endif
buffer += srcx + srcy * srccx;
acquire_bus();
set_viewport(x, y, cx, cy);
stream_start();
endx = srcx + cx;
endy = y + cy;
lg = srccx - cx;
buffer += srcx + srcy * srccx;
for(; y < endy; y++, buffer += lg)
for(x=srcx; x < endx; x++)
write_data(*buffer++);
#if defined(GDISP_USE_FSMC) && defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
uint32_t area = cx*cy;
uint8_t i;
dmaStreamSetPeripheral(GDISP_DMA_STREAM, buffer);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PINC | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
for (i = area/65535; i; i--) {
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, 65535);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
}
dmaStreamSetTransactionSize(GDISP_DMA_STREAM, area%65535);
dmaStreamEnable(GDISP_DMA_STREAM);
dmaWaitCompletion(GDISP_DMA_STREAM);
#else
coord_t endx, endy;
uint32_t lg;
endx = srcx + cx;
endy = y + cy;
lg = srccx - cx;
for(; y < endy; y++, buffer += lg)
for(x=srcx; x < endx; x++)
write_data(*buffer++);
#endif //#ifdef GDISP_USE_DMA
stream_stop();
release_bus();
}
@ -375,8 +431,16 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
acquire_bus();
set_cursor(x, y);
stream_start();
/* FSMC timing */
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_3 | FSMC_BTR1_DATAST_3 | FSMC_BTR1_BUSTURN_0 ;
color = read_data(); // dummy read
color = read_data();
/* FSMC timing */
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
stream_stop();
release_bus();
@ -431,9 +495,17 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
/* read row0 into the buffer and then write at row1*/
set_viewport(x, row0, cx, 1);
stream_start();
/* FSMC timing */
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_3 | FSMC_BTR1_DATAST_3 | FSMC_BTR1_BUSTURN_0 ;
j = read_data(); // dummy read
for (j = 0; (coord_t)j < cx; j++)
buf[j] = read_data();
/* FSMC timing */
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
stream_stop();
set_viewport(x, row1, cx, 1);
@ -556,8 +628,15 @@ void gdisp_lld_draw_pixel(coord_t x, coord_t y, color_t color) {
#endif
GDISP.Orientation = (gdisp_orientation_t)value;
return;
case GDISP_CONTROL_BACKLIGHT:
if ((unsigned)value > 100)
value = (void *)100;
set_backlight((unsigned)value);
GDISP.Backlight = (unsigned)value;
return;
default:
return;
/*
case GDISP_CONTROL_BACKLIGHT:
case GDISP_CONTROL_CONTRAST:
*/
}

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@ -0,0 +1,172 @@
/*
* This file is subject to the terms of the GFX License, v1.0. If a copy of
* the license was not distributed with this file, you can obtain one at:
*
* http://chibios-gfx.com/license.html
*/
/**
* @file drivers/gdisp/SSD1289/gdisp_lld_board_example_fsmc.h
* @brief GDISP Graphic Driver subsystem board interface for the SSD1289 display.
*
* @addtogroup GDISP
* @{
*/
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
#define GDISP_REG ((volatile uint16_t *) 0x60000000)[0] /* RS = 0 */
#define GDISP_RAM ((volatile uint16_t *) 0x60020000)[0] /* RS = 1 */
#define GDISP_USE_FSMC
#define GDISP_USE_DMA
#define GDISP_DMA_STREAM STM32_DMA2_STREAM6
const unsigned char FSMC_Bank = 0;
/* PWM configuration structure. We use timer 3 channel 3 */
static const PWMConfig pwmcfg = {
100000, /* 100 kHz PWM clock frequency. */
100, /* PWM period is 100 cycles. */
NULL,
{
{PWM_OUTPUT_DISABLED, NULL},
{PWM_OUTPUT_DISABLED, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_DISABLED, NULL}
},
0
};
/**
* @brief Initialise the board for the display.
* @notes Performs the following functions:
* 1. initialise the io port used by your display
* 2. initialise the reset pin (initial state not-in-reset)
* 3. initialise the chip select pin (initial state not-active)
* 4. initialise the backlight pin (initial state back-light off)
*
* @notapi
*/
static inline void init_board(void) {
#if defined(STM32F1XX) || defined(STM32F3XX)
/* FSMC setup for F1/F3 */
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
#if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
#error "DMA not implemented for F1/F3 Devices"
#endif
#elif defined(STM32F4XX) || defined(STM32F2XX)
/* STM32F2-F4 FSMC init */
rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
#if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) gfxExit();
dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
#endif
#else
#error "FSMC not implemented for this device"
#endif
/* set pins to FSMC mode */
IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
(1 << 13) | (1 << 14) | (1 << 15), 0};
palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
/* FSMC timing */
FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0 ;
/* Bank1 NOR/SRAM control register configuration
* This is actually not needed as already set by default after reset */
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
/* Display backlight control */
/* TIM3 is an alternate function 2 (AF2) */
pwmStart(&PWMD3, &pwmcfg);
palSetPadMode(GPIOB, 0, PAL_MODE_ALTERNATE(2));
pwmEnableChannel(&PWMD3, 2, 100);
}
/**
* @brief Set or clear the lcd reset pin.
*
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
*
* @notapi
*/
static inline void setpin_reset(bool_t state) {
(void) state;
/* Nothing to do here */
}
/**
* @brief Set the lcd back-light level.
*
* @param[in] percent 0 to 100%
*
* @notapi
*/
static inline void set_backlight(uint8_t percent) {
pwmEnableChannel(&PWMD3, 2, percent);
}
/**
* @brief Take exclusive control of the bus
*
* @notapi
*/
static inline void acquire_bus(void) {
/* Nothing to do here */
}
/**
* @brief Release exclusive control of the bus
*
* @notapi
*/
static inline void release_bus(void) {
/* Nothing to do here */
}
/**
* @brief Send data to the index register.
*
* @param[in] index The index register to set
*
* @notapi
*/
static inline void write_index(uint16_t index) { GDISP_REG = index; }
/**
* @brief Send data to the lcd.
*
* @param[in] data The data to send
*
* @notapi
*/
static inline void write_data(uint16_t data) { GDISP_RAM = data; }
#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
/**
* @brief Read data from the lcd.
*
* @return The data from the lcd
* @note The chip select may need to be asserted/de-asserted
* around the actual spi read
*
* @notapi
*/
static inline uint16_t read_data(void) { return GDISP_RAM; }
#endif
#endif /* _GDISP_LLD_BOARD_H */
/** @} */

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@ -10,6 +10,7 @@ To use this driver:
Use the gdisp_lld_board_example.h or gdisp_lld_board_fsmc.h file as a basis.
Currently known boards are:
BOARD_FIREBULL_STM32_F103 - GPIO interface: requires GDISP_CMD_PORT and GDISP_DATA_PORT to be defined
BOARD_ST_STM32F4_DISCOVERY - FSMC interface
d) The following are optional - define them if you are not using the defaults below:
#define GDISP_SCREEN_WIDTH 320