Compare commits
No commits in common. "master" and "develop" have entirely different histories.
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@ -3,7 +3,6 @@ build
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.dep
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.dep
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||||||
.cproject
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.cproject
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||||||
.project
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.project
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||||||
.vscode
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|
||||||
*.sublime*
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*.sublime*
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||||||
*.stackdump
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*.stackdump
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||||||
*.lst
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*.lst
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||||||
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@ -16,7 +15,3 @@ docs/html
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||||||
docs/html.zip
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docs/html.zip
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||||||
docs/*.db
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docs/*.db
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||||||
docs/*.tmp
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docs/*.tmp
|
||||||
|
|
||||||
# CLion
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|
||||||
.idea/
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|
||||||
cmake-build-*/
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|
||||||
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|
5216
Doxygenfile
5216
Doxygenfile
File diff suppressed because it is too large
Load Diff
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@ -1,92 +0,0 @@
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||||||
#pragma once
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||||||
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||||||
#include <stm32f4xx_hal.h>
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#include <string.h>
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||||||
|
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||||||
// The command byte to put on the front of each page line
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||||||
#define SSD1312_PAGE_PREFIX 0x40 // Co = 0, D/C = 1
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||||||
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||||||
static I2C_HandleTypeDef i2cHandle;
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||||||
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||||||
static GFXINLINE void init_board(GDisplay *g)
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||||||
{
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||||||
(void) g;
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||||||
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||||||
// GPIO
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||||||
{
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||||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
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||||||
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||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
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||||||
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||||||
// I2C SCL
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||||||
GPIO_InitStruct.Pin = GPIO_PIN_8;
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||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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// I2C SDA
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GPIO_InitStruct.Pin = GPIO_PIN_9;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
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||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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||||||
}
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||||||
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||||||
// I2C1
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||||||
{
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__HAL_RCC_I2C1_CLK_ENABLE();
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||||||
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i2cHandle.Instance = I2C1;
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i2cHandle.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
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i2cHandle.Init.ClockSpeed = 400000;
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i2cHandle.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
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i2cHandle.Init.DutyCycle = I2C_DUTYCYCLE_2;
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i2cHandle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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||||||
i2cHandle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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||||||
if (HAL_I2C_Init(&i2cHandle) != HAL_OK)
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||||||
gfxHalt("I2C HAL init error");
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||||||
}
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||||||
}
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||||||
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||||||
static GFXINLINE void post_init_board(GDisplay *g)
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||||||
{
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||||||
(void) g;
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||||||
}
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||||||
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||||||
static GFXINLINE void setpin_reset(GDisplay *g, gBool state)
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||||||
{
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||||||
(void) g;
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||||||
(void) state;
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||||||
}
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||||||
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||||||
static GFXINLINE void acquire_bus(GDisplay *g)
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||||||
{
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|
||||||
(void) g;
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|
||||||
}
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||||||
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||||||
static GFXINLINE void release_bus(GDisplay *g)
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||||||
{
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||||||
(void) g;
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||||||
}
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||||||
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||||||
static GFXINLINE void write_cmd(GDisplay *g, gU8 *data, gU16 length)
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|
||||||
{
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||||||
(void) g;
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||||||
|
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||||||
gU8 buf[4]; // length is always <= 3
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||||||
buf[0] = 0x00;
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||||||
memcpy(buf+1, data, length);
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||||||
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||||||
HAL_I2C_Master_Transmit(&i2cHandle, (0x3c << 1), buf, length+1, 10000);
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||||||
}
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||||||
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||||||
static GFXINLINE void write_data(GDisplay *g, gU8 *data, gU16 length)
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|
||||||
{
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|
||||||
(void) g;
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||||||
|
|
||||||
HAL_I2C_Master_Transmit(&i2cHandle, (0x3c << 1), data, length, 10000);
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|
||||||
}
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||||||
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|
|
@ -1,3 +1,3 @@
|
||||||
BOARDINC = $(GFXLIB)/boards/base/FireBull-STM32F103-FB/chibios_board
|
BOARDINC = $(GFXLIB)/boards/base/FireBull-STM32F103-FB/chibios_board
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||||||
BOARDSRC = $(BOARDINC)/board.c \
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BOARDSRC = $(BOARDINC)/board.c \
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@ -1,6 +0,0 @@
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GFXINC +=
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GFXSRC +=
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GFXDEFS += -DGFX_USE_OS_FREEBSD=GFXON
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||||||
GFXLIBS += rt
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||||||
|
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||||||
include $(GFXLIB)/drivers/multiple/SDL/driver.mk
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@ -1,52 +0,0 @@
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||||||
# Possible Targets: all clean Debug cleanDebug Release cleanRelease
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||||||
|
|
||||||
##############################################################################################
|
|
||||||
# Settings
|
|
||||||
#
|
|
||||||
|
|
||||||
# General settings
|
|
||||||
# See $(GFXLIB)/tools/gmake_scripts/readme.txt for the list of variables
|
|
||||||
OPT_OS = freebsd
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||||||
OPT_LINK_OPTIMIZE = yes
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|
||||||
# Change this next setting (or add the explicit compiler flags) if you are not compiling for x86 linux
|
|
||||||
OPT_CPU = x64
|
|
||||||
|
|
||||||
# uGFX settings
|
|
||||||
# See $(GFXLIB)/tools/gmake_scripts/library_ugfx.mk for the list of variables
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|
||||||
GFXLIB = ../uGFX
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|
||||||
GFXBOARD = FreeBSD-SDL
|
|
||||||
GFXDEMO = modules/gdisp/basics
|
|
||||||
|
|
||||||
# Linux settings
|
|
||||||
# See $(GFXLIB)/tools/gmake_scripts/os_linux.mk for the list of variables
|
|
||||||
|
|
||||||
##############################################################################################
|
|
||||||
# Set these for your project
|
|
||||||
#
|
|
||||||
|
|
||||||
ARCH =
|
|
||||||
XCC = gcc10
|
|
||||||
XAS = gcc10
|
|
||||||
XLD = gcc10
|
|
||||||
SRCFLAGS = -ggdb -O0
|
|
||||||
CFLAGS = `sdl2-config --libs --cflags`
|
|
||||||
CXXFLAGS =
|
|
||||||
ASFLAGS =
|
|
||||||
LDFLAGS =
|
|
||||||
|
|
||||||
SRC =
|
|
||||||
OBJS =
|
|
||||||
DEFS =
|
|
||||||
LIBS =
|
|
||||||
INCPATH =
|
|
||||||
LIBPATH =
|
|
||||||
|
|
||||||
##############################################################################################
|
|
||||||
# These should be at the end
|
|
||||||
#
|
|
||||||
|
|
||||||
include $(GFXLIB)/tools/gmake_scripts/library_ugfx.mk
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|
||||||
include $(GFXLIB)/tools/gmake_scripts/os_$(OPT_OS).mk
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|
||||||
include $(GFXLIB)/tools/gmake_scripts/compiler_gcc.mk
|
|
||||||
# *** EOF ***
|
|
||||||
|
|
|
@ -1,22 +0,0 @@
|
||||||
This directory contains the interface for FreeBSD using SDL.
|
|
||||||
|
|
||||||
As of today, this is simply a wrapper around the Linux drivers/support.
|
|
||||||
|
|
||||||
On this board uGFX currently supports:
|
|
||||||
- GDISP via the SDL driver
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|
||||||
- GINPUT-touch via the SDL driver
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|
||||||
- GINPUT-keyboard via the SDL driver
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|
||||||
|
|
||||||
|
|
||||||
The folowing packages are required to run uGFX using this driver on
|
|
||||||
a 64-bit FreeBSD system using SDL:
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|
||||||
+ devel/gcc10
|
|
||||||
+ devel/sdl2
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|
||||||
|
|
||||||
|
|
||||||
The following should be added to the CFLAGS of the target makefile:
|
|
||||||
CFLAGS = `sdl2-config --libs --cflags`
|
|
||||||
|
|
||||||
|
|
||||||
There is an example Makefile and project in the examples directory.
|
|
||||||
|
|
|
@ -1,88 +1,88 @@
|
||||||
/*
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/*
|
||||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||||
2011,2012,2013 Giovanni Di Sirio.
|
2011,2012,2013 Giovanni Di Sirio.
|
||||||
|
|
||||||
This file is part of ChibiOS/RT.
|
This file is part of ChibiOS/RT.
|
||||||
|
|
||||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||||
it under the terms of the GNU General Public License as published by
|
it under the terms of the GNU General Public License as published by
|
||||||
the Free Software Foundation; either version 3 of the License, or
|
the Free Software Foundation; either version 3 of the License, or
|
||||||
(at your option) any later version.
|
(at your option) any later version.
|
||||||
|
|
||||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
GNU General Public License for more details.
|
GNU General Public License for more details.
|
||||||
|
|
||||||
You should have received a copy of the GNU General Public License
|
You should have received a copy of the GNU General Public License
|
||||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "ch.h"
|
#include "ch.h"
|
||||||
#include "hal.h"
|
#include "hal.h"
|
||||||
|
|
||||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||||
/**
|
/**
|
||||||
* @brief PAL setup.
|
* @brief PAL setup.
|
||||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||||
* This variable is used by the HAL when initializing the PAL driver.
|
* This variable is used by the HAL when initializing the PAL driver.
|
||||||
*/
|
*/
|
||||||
const PALConfig pal_default_config =
|
const PALConfig pal_default_config =
|
||||||
{
|
{
|
||||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
||||||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
|
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
|
||||||
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||||||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
|
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
|
||||||
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||||||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
|
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
|
||||||
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||||||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
|
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
|
||||||
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||||||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
|
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
|
||||||
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||||||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
|
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
|
||||||
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||||||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
|
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
|
||||||
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
||||||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Early initialization code.
|
* @brief Early initialization code.
|
||||||
* @details This initialization must be performed just after stack setup
|
* @details This initialization must be performed just after stack setup
|
||||||
* and before any other initialization.
|
* and before any other initialization.
|
||||||
*/
|
*/
|
||||||
void __early_init(void) {
|
void __early_init(void) {
|
||||||
|
|
||||||
stm32_clock_init();
|
stm32_clock_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
#if HAL_USE_SDC
|
#if HAL_USE_SDC
|
||||||
/*
|
/*
|
||||||
* Card detection through the card internal pull-up on D3.
|
* Card detection through the card internal pull-up on D3.
|
||||||
*/
|
*/
|
||||||
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
||||||
|
|
||||||
(void)sdcp;
|
(void)sdcp;
|
||||||
return (bool_t)!palReadPad(GPIOD, GPIOD_SDIO_CD_N);
|
return (bool_t)!palReadPad(GPIOD, GPIOD_SDIO_CD_N);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Card write protection detection is not possible, the card is always
|
* Card write protection detection is not possible, the card is always
|
||||||
* reported as not protected.
|
* reported as not protected.
|
||||||
*/
|
*/
|
||||||
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
||||||
|
|
||||||
(void)sdcp;
|
(void)sdcp;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
#endif /* HAL_USE_SDC */
|
#endif /* HAL_USE_SDC */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Board-specific initialization code.
|
* @brief Board-specific initialization code.
|
||||||
*/
|
*/
|
||||||
void boardInit(void) {
|
void boardInit(void) {
|
||||||
}
|
}
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,3 +1,3 @@
|
||||||
BOARDINC = $(GFXLIB)/boards/base/Marlin/chibios_board
|
BOARDINC = $(GFXLIB)/boards/base/Marlin/chibios_board
|
||||||
BOARDSRC = $(BOARDINC)/board.c \
|
BOARDSRC = $(BOARDINC)/board.c \
|
||||||
|
|
||||||
|
|
|
@ -1,106 +1,106 @@
|
||||||
/*
|
/*
|
||||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||||
|
|
||||||
Licensed under the Apache License, Version 2.0 (the "License");
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
you may not use this file except in compliance with the License.
|
you may not use this file except in compliance with the License.
|
||||||
You may obtain a copy of the License at
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
http://www.apache.org/licenses/LICENSE-2.0
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
Unless required by applicable law or agreed to in writing, software
|
Unless required by applicable law or agreed to in writing, software
|
||||||
distributed under the License is distributed on an "AS IS" BASIS,
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
See the License for the specific language governing permissions and
|
See the License for the specific language governing permissions and
|
||||||
limitations under the License.
|
limitations under the License.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "hal.h"
|
#include "hal.h"
|
||||||
|
|
||||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||||
/**
|
/**
|
||||||
* @brief PAL setup.
|
* @brief PAL setup.
|
||||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||||
* This variable is used by the HAL when initializing the PAL driver.
|
* This variable is used by the HAL when initializing the PAL driver.
|
||||||
*/
|
*/
|
||||||
const PALConfig pal_default_config =
|
const PALConfig pal_default_config =
|
||||||
{
|
{
|
||||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
||||||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
|
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
|
||||||
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||||||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
|
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
|
||||||
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||||||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
|
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
|
||||||
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||||||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
|
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
|
||||||
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||||||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
|
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
|
||||||
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||||||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
|
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
|
||||||
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||||||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
|
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
|
||||||
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
||||||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Early initialization code.
|
* @brief Early initialization code.
|
||||||
* @details This initialization must be performed just after stack setup
|
* @details This initialization must be performed just after stack setup
|
||||||
* and before any other initialization.
|
* and before any other initialization.
|
||||||
*/
|
*/
|
||||||
void __early_init(void) {
|
void __early_init(void) {
|
||||||
|
|
||||||
stm32_clock_init();
|
stm32_clock_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
||||||
/**
|
/**
|
||||||
* @brief SDC card detection.
|
* @brief SDC card detection.
|
||||||
*/
|
*/
|
||||||
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
||||||
|
|
||||||
(void)sdcp;
|
(void)sdcp;
|
||||||
/* TODO: Fill the implementation.*/
|
/* TODO: Fill the implementation.*/
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief SDC card write protection detection.
|
* @brief SDC card write protection detection.
|
||||||
*/
|
*/
|
||||||
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
||||||
|
|
||||||
(void)sdcp;
|
(void)sdcp;
|
||||||
/* TODO: Fill the implementation.*/
|
/* TODO: Fill the implementation.*/
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
#endif /* HAL_USE_SDC */
|
#endif /* HAL_USE_SDC */
|
||||||
|
|
||||||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
||||||
/**
|
/**
|
||||||
* @brief MMC_SPI card detection.
|
* @brief MMC_SPI card detection.
|
||||||
*/
|
*/
|
||||||
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
||||||
|
|
||||||
(void)mmcp;
|
(void)mmcp;
|
||||||
return !palReadPad(GPIOD, GPIOD_SD_CD);
|
return !palReadPad(GPIOD, GPIOD_SD_CD);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief MMC_SPI card write protection detection.
|
* @brief MMC_SPI card write protection detection.
|
||||||
*/
|
*/
|
||||||
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
||||||
|
|
||||||
(void)mmcp;
|
(void)mmcp;
|
||||||
/* Board has no write protection detection */
|
/* Board has no write protection detection */
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Board-specific initialization code.
|
* @brief Board-specific initialization code.
|
||||||
* @todo Add your board-specific code, if any.
|
* @todo Add your board-specific code, if any.
|
||||||
*/
|
*/
|
||||||
void boardInit(void) {
|
void boardInit(void) {
|
||||||
}
|
}
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,6 +1,6 @@
|
||||||
# Required include directories
|
# Required include directories
|
||||||
BOARDINC = $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board
|
BOARDINC = $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board
|
||||||
|
|
||||||
# List of all the board related files.
|
# List of all the board related files.
|
||||||
BOARDSRC = $(BOARDINC)/board.c \
|
BOARDSRC = $(BOARDINC)/board.c \
|
||||||
$(BOARDINC)/flash_memory.c
|
$(BOARDINC)/flash_memory.c
|
|
@ -1,88 +1,88 @@
|
||||||
/*
|
/*
|
||||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||||
|
|
||||||
Licensed under the Apache License, Version 2.0 (the "License");
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
you may not use this file except in compliance with the License.
|
you may not use this file except in compliance with the License.
|
||||||
You may obtain a copy of the License at
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
http://www.apache.org/licenses/LICENSE-2.0
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
Unless required by applicable law or agreed to in writing, software
|
Unless required by applicable law or agreed to in writing, software
|
||||||
distributed under the License is distributed on an "AS IS" BASIS,
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
See the License for the specific language governing permissions and
|
See the License for the specific language governing permissions and
|
||||||
limitations under the License.
|
limitations under the License.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "ch.h"
|
#include "ch.h"
|
||||||
#include "hal.h"
|
#include "hal.h"
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief PAL setup.
|
* @brief PAL setup.
|
||||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||||
* This variable is used by the HAL when initializing the PAL driver.
|
* This variable is used by the HAL when initializing the PAL driver.
|
||||||
*/
|
*/
|
||||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||||
const PALConfig pal_default_config =
|
const PALConfig pal_default_config =
|
||||||
{
|
{
|
||||||
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
|
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
|
||||||
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
|
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
|
||||||
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
|
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
|
||||||
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
|
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
|
||||||
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
|
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
|
||||||
{VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
|
{VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
|
||||||
{VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
|
{VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Early initialization code.
|
* Early initialization code.
|
||||||
* This initialization must be performed just after stack setup and before
|
* This initialization must be performed just after stack setup and before
|
||||||
* any other initialization.
|
* any other initialization.
|
||||||
*/
|
*/
|
||||||
void __early_init(void) {
|
void __early_init(void) {
|
||||||
stm32_clock_init();
|
stm32_clock_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
||||||
/**
|
/**
|
||||||
* @brief SDC card detection.
|
* @brief SDC card detection.
|
||||||
*/
|
*/
|
||||||
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
||||||
(void)sdcp;
|
(void)sdcp;
|
||||||
|
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief SDC card write protection detection.
|
* @brief SDC card write protection detection.
|
||||||
*/
|
*/
|
||||||
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
||||||
(void)sdcp;
|
(void)sdcp;
|
||||||
|
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
#endif /* HAL_USE_SDC */
|
#endif /* HAL_USE_SDC */
|
||||||
|
|
||||||
#if HAL_USE_MMC_SPI
|
#if HAL_USE_MMC_SPI
|
||||||
/* Board-related functions related to the MMC_SPI driver.*/
|
/* Board-related functions related to the MMC_SPI driver.*/
|
||||||
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
||||||
(void)mmcp;
|
(void)mmcp;
|
||||||
|
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
||||||
(void)mmcp;
|
(void)mmcp;
|
||||||
|
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Board-specific initialization code.
|
* Board-specific initialization code.
|
||||||
*/
|
*/
|
||||||
void boardInit(void) {
|
void boardInit(void) {
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,196 +1,196 @@
|
||||||
/*
|
/*
|
||||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||||
|
|
||||||
Licensed under the Apache License, Version 2.0 (the "License");
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
you may not use this file except in compliance with the License.
|
you may not use this file except in compliance with the License.
|
||||||
You may obtain a copy of the License at
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
http://www.apache.org/licenses/LICENSE-2.0
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
Unless required by applicable law or agreed to in writing, software
|
Unless required by applicable law or agreed to in writing, software
|
||||||
distributed under the License is distributed on an "AS IS" BASIS,
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
See the License for the specific language governing permissions and
|
See the License for the specific language governing permissions and
|
||||||
limitations under the License.
|
limitations under the License.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _BOARD_H_
|
#ifndef _BOARD_H_
|
||||||
#define _BOARD_H_
|
#define _BOARD_H_
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Setup for the Olimex STM32-LCD proto board.
|
* Setup for the Olimex STM32-LCD proto board.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Board identifier.
|
* Board identifier.
|
||||||
*/
|
*/
|
||||||
#define BOARD_OLIMEX_STM32_LCD
|
#define BOARD_OLIMEX_STM32_LCD
|
||||||
#define BOARD_NAME "Olimex STM32-LCD"
|
#define BOARD_NAME "Olimex STM32-LCD"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Board frequencies.
|
* Board frequencies.
|
||||||
*/
|
*/
|
||||||
#define STM32_LSECLK 32768
|
#define STM32_LSECLK 32768
|
||||||
#define STM32_HSECLK 8000000
|
#define STM32_HSECLK 8000000
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
|
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
|
||||||
*/
|
*/
|
||||||
#define STM32F10X_HD
|
#define STM32F10X_HD
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* IO pins assignments.
|
* IO pins assignments.
|
||||||
*/
|
*/
|
||||||
#define GPIOA_SPI1NSS 4
|
#define GPIOA_SPI1NSS 4
|
||||||
|
|
||||||
#define GPIOB_SPI2NSS 12
|
#define GPIOB_SPI2NSS 12
|
||||||
|
|
||||||
#define GPIOA_USB_P 0
|
#define GPIOA_USB_P 0
|
||||||
#define GPIOD_USB_DISC 2
|
#define GPIOD_USB_DISC 2
|
||||||
|
|
||||||
#define GPIOE_TFT_RST 2
|
#define GPIOE_TFT_RST 2
|
||||||
#define GPIOD_TFT_LIGHT 13
|
#define GPIOD_TFT_LIGHT 13
|
||||||
#define GPIOC_TFT_YD 0
|
#define GPIOC_TFT_YD 0
|
||||||
#define GPIOC_TFT_YU 1
|
#define GPIOC_TFT_YU 1
|
||||||
#define GPIOC_TFT_XL 2
|
#define GPIOC_TFT_XL 2
|
||||||
#define GPIOC_TFT_XR 3
|
#define GPIOC_TFT_XR 3
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* I/O ports initial setup, this configuration is established soon after reset
|
* I/O ports initial setup, this configuration is established soon after reset
|
||||||
* in the initialization code.
|
* in the initialization code.
|
||||||
*
|
*
|
||||||
* The digits have the following meaning:
|
* The digits have the following meaning:
|
||||||
* 0 - Analog input.
|
* 0 - Analog input.
|
||||||
* 1 - Push Pull output 10MHz.
|
* 1 - Push Pull output 10MHz.
|
||||||
* 2 - Push Pull output 2MHz.
|
* 2 - Push Pull output 2MHz.
|
||||||
* 3 - Push Pull output 50MHz.
|
* 3 - Push Pull output 50MHz.
|
||||||
* 4 - Digital input.
|
* 4 - Digital input.
|
||||||
* 5 - Open Drain output 10MHz.
|
* 5 - Open Drain output 10MHz.
|
||||||
* 6 - Open Drain output 2MHz.
|
* 6 - Open Drain output 2MHz.
|
||||||
* 7 - Open Drain output 50MHz.
|
* 7 - Open Drain output 50MHz.
|
||||||
* 8 - Digital input with PullUp or PullDown resistor depending on ODR.
|
* 8 - Digital input with PullUp or PullDown resistor depending on ODR.
|
||||||
* 9 - Alternate Push Pull output 10MHz.
|
* 9 - Alternate Push Pull output 10MHz.
|
||||||
* A - Alternate Push Pull output 2MHz.
|
* A - Alternate Push Pull output 2MHz.
|
||||||
* B - Alternate Push Pull output 50MHz.
|
* B - Alternate Push Pull output 50MHz.
|
||||||
* C - Reserved.
|
* C - Reserved.
|
||||||
* D - Alternate Open Drain output 10MHz.
|
* D - Alternate Open Drain output 10MHz.
|
||||||
* E - Alternate Open Drain output 2MHz.
|
* E - Alternate Open Drain output 2MHz.
|
||||||
* F - Alternate Open Drain output 50MHz.
|
* F - Alternate Open Drain output 50MHz.
|
||||||
* Please refer to the STM32 Reference Manual for details.
|
* Please refer to the STM32 Reference Manual for details.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Port A setup.
|
* Port A setup.
|
||||||
* Everything input with pull-up except:
|
* Everything input with pull-up except:
|
||||||
* PA0 - Normal input (USB P).
|
* PA0 - Normal input (USB P).
|
||||||
* PA2 - Alternate output (USART2 TX).
|
* PA2 - Alternate output (USART2 TX).
|
||||||
* PA3 - Normal input (USART2 RX).
|
* PA3 - Normal input (USART2 RX).
|
||||||
* PA11 - Normal input (USB DM).
|
* PA11 - Normal input (USB DM).
|
||||||
* PA12 - Normal input (USB DP).
|
* PA12 - Normal input (USB DP).
|
||||||
*/
|
*/
|
||||||
#define VAL_GPIOACRL 0x88884B84 /* PA7...PA0 */
|
#define VAL_GPIOACRL 0x88884B84 /* PA7...PA0 */
|
||||||
#define VAL_GPIOACRH 0x88844888 /* PA15...PA8 */
|
#define VAL_GPIOACRH 0x88844888 /* PA15...PA8 */
|
||||||
#define VAL_GPIOAODR 0xFFFFFFFF
|
#define VAL_GPIOAODR 0xFFFFFFFF
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Port B setup.
|
* Port B setup.
|
||||||
* Everything input with pull-up except:
|
* Everything input with pull-up except:
|
||||||
*/
|
*/
|
||||||
#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */
|
#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */
|
||||||
#define VAL_GPIOBCRH 0x88888888 /* PB15...PB8 */
|
#define VAL_GPIOBCRH 0x88888888 /* PB15...PB8 */
|
||||||
#define VAL_GPIOBODR 0xFFFFFFFF
|
#define VAL_GPIOBODR 0xFFFFFFFF
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Port C setup.
|
* Port C setup.
|
||||||
* Everything input with pull-up except:
|
* Everything input with pull-up except:
|
||||||
* PC0 - Analog Input (TP_YD).
|
* PC0 - Analog Input (TP_YD).
|
||||||
* PC1 - Analog Input (TP_YU).
|
* PC1 - Analog Input (TP_YU).
|
||||||
* PC2 - Analog Input (TP_XL).
|
* PC2 - Analog Input (TP_XL).
|
||||||
* PC3 - Analog Input (TP_XR).
|
* PC3 - Analog Input (TP_XR).
|
||||||
* PC8 - Alternate PP 50M (SD_D0).
|
* PC8 - Alternate PP 50M (SD_D0).
|
||||||
* PC9 - Alternate PP 50M (SD_D1).
|
* PC9 - Alternate PP 50M (SD_D1).
|
||||||
* PC10 - Alternate PP 50M (SD_D2).
|
* PC10 - Alternate PP 50M (SD_D2).
|
||||||
* PC11 - Alternate PP 50M (SD_D3).
|
* PC11 - Alternate PP 50M (SD_D3).
|
||||||
* PC12 - Alternate PP 50M (SD_CLK).
|
* PC12 - Alternate PP 50M (SD_CLK).
|
||||||
* PC14 - Normal input (XTAL).
|
* PC14 - Normal input (XTAL).
|
||||||
* PC15 - Normal input (XTAL).
|
* PC15 - Normal input (XTAL).
|
||||||
*/
|
*/
|
||||||
#define VAL_GPIOCCRL 0x88880000 /* PC7...PC0 */
|
#define VAL_GPIOCCRL 0x88880000 /* PC7...PC0 */
|
||||||
#define VAL_GPIOCCRH 0x448BBBBB /* PC15...PC8 */
|
#define VAL_GPIOCCRH 0x448BBBBB /* PC15...PC8 */
|
||||||
#define VAL_GPIOCODR 0xFFFFFFFF
|
#define VAL_GPIOCODR 0xFFFFFFFF
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Port D setup.
|
* Port D setup.
|
||||||
* Everything input with pull-up except:
|
* Everything input with pull-up except:
|
||||||
* PD2 - Alternate PP 50M (SD_CMD)
|
* PD2 - Alternate PP 50M (SD_CMD)
|
||||||
* PD0 - Alternate PP 50M (FSMC_D2)
|
* PD0 - Alternate PP 50M (FSMC_D2)
|
||||||
* PD1 - Alternate PP 50M (FSMC_D3)
|
* PD1 - Alternate PP 50M (FSMC_D3)
|
||||||
* PD4 - Alternate PP 50M (TFT_RD)
|
* PD4 - Alternate PP 50M (TFT_RD)
|
||||||
* PD5 - Alternate PP 50M (TFT_WR)
|
* PD5 - Alternate PP 50M (TFT_WR)
|
||||||
* PD7 - Alternate PP 50M (TFT_CS)
|
* PD7 - Alternate PP 50M (TFT_CS)
|
||||||
* PD8 - Alternate PP 50M (FSMC_D13)
|
* PD8 - Alternate PP 50M (FSMC_D13)
|
||||||
* PD9 - Alternate PP 50M (FSMC_D14)
|
* PD9 - Alternate PP 50M (FSMC_D14)
|
||||||
* PD10 - Alternate PP 50M (FSMC_D15)
|
* PD10 - Alternate PP 50M (FSMC_D15)
|
||||||
* PD14 - Alternate PP 50M (FSMC_D0)
|
* PD14 - Alternate PP 50M (FSMC_D0)
|
||||||
* PD15 - Alternate PP 50M (FSMC_D1)
|
* PD15 - Alternate PP 50M (FSMC_D1)
|
||||||
*/
|
*/
|
||||||
#define VAL_GPIODCRL 0xBBBB8BBB /* PD7...PD0 */
|
#define VAL_GPIODCRL 0xBBBB8BBB /* PD7...PD0 */
|
||||||
#define VAL_GPIODCRH 0xBB388BBB /* PD15...PD8 */
|
#define VAL_GPIODCRH 0xBB388BBB /* PD15...PD8 */
|
||||||
#define VAL_GPIODODR 0xFFFFFFFF
|
#define VAL_GPIODODR 0xFFFFFFFF
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Port E setup.
|
* Port E setup.
|
||||||
* Everything input with pull-up except:
|
* Everything input with pull-up except:
|
||||||
* PE2 - Digital Output (TFT_RST)
|
* PE2 - Digital Output (TFT_RST)
|
||||||
* PE3 - Alternate PP 50M (TFT_RS)
|
* PE3 - Alternate PP 50M (TFT_RS)
|
||||||
* PE7 - Alternate PP 50M (FSMC_D4)
|
* PE7 - Alternate PP 50M (FSMC_D4)
|
||||||
* PE8 - Alternate PP 50M (FSMC_D5)
|
* PE8 - Alternate PP 50M (FSMC_D5)
|
||||||
* PE9 - Alternate PP 50M (FSMC_D6)
|
* PE9 - Alternate PP 50M (FSMC_D6)
|
||||||
* PE10 - Alternate PP 50M (FSMC_D7)
|
* PE10 - Alternate PP 50M (FSMC_D7)
|
||||||
* PE11 - Alternate PP 50M (FSMC_D8)
|
* PE11 - Alternate PP 50M (FSMC_D8)
|
||||||
* PE12 - Alternate PP 50M (FSMC_D9)
|
* PE12 - Alternate PP 50M (FSMC_D9)
|
||||||
* PE13 - Alternate PP 50M (FSMC_D10)
|
* PE13 - Alternate PP 50M (FSMC_D10)
|
||||||
* PE14 - Alternate PP 50M (FSMC_D11)
|
* PE14 - Alternate PP 50M (FSMC_D11)
|
||||||
* PE15 - Alternate PP 50M (FSMC_D12)
|
* PE15 - Alternate PP 50M (FSMC_D12)
|
||||||
*/
|
*/
|
||||||
#define VAL_GPIOECRL 0xB888B388 /* PE7...PE0 */
|
#define VAL_GPIOECRL 0xB888B388 /* PE7...PE0 */
|
||||||
#define VAL_GPIOECRH 0xBBBBBBBB /* PE15...PE8 */
|
#define VAL_GPIOECRH 0xBBBBBBBB /* PE15...PE8 */
|
||||||
#define VAL_GPIOEODR 0xFFFFFFFF
|
#define VAL_GPIOEODR 0xFFFFFFFF
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Port F setup.
|
* Port F setup.
|
||||||
* Everything input with pull-up expect:
|
* Everything input with pull-up expect:
|
||||||
*/
|
*/
|
||||||
#define VAL_GPIOFCRL 0x88888888 /* PF7...PF0 */
|
#define VAL_GPIOFCRL 0x88888888 /* PF7...PF0 */
|
||||||
#define VAL_GPIOFCRH 0x88888888 /* PF15...PF8 */
|
#define VAL_GPIOFCRH 0x88888888 /* PF15...PF8 */
|
||||||
#define VAL_GPIOFODR 0xFFFFFFFF
|
#define VAL_GPIOFODR 0xFFFFFFFF
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Port G setup.
|
* Port G setup.
|
||||||
* Everything input with pull-up expect:
|
* Everything input with pull-up expect:
|
||||||
*/
|
*/
|
||||||
#define VAL_GPIOGCRL 0x88888888 /* PG7...PG0 */
|
#define VAL_GPIOGCRL 0x88888888 /* PG7...PG0 */
|
||||||
#define VAL_GPIOGCRH 0x88888888 /* PG15...PG8 */
|
#define VAL_GPIOGCRH 0x88888888 /* PG15...PG8 */
|
||||||
#define VAL_GPIOGODR 0xFFFFFFFF
|
#define VAL_GPIOGODR 0xFFFFFFFF
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* USB bus activation macro, required by the USB driver.
|
* USB bus activation macro, required by the USB driver.
|
||||||
*/
|
*/
|
||||||
#define usb_lld_connect_bus(usbp) palClearPad(GPIOD, GPIOD_USB_DISC)
|
#define usb_lld_connect_bus(usbp) palClearPad(GPIOD, GPIOD_USB_DISC)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* USB bus de-activation macro, required by the USB driver.
|
* USB bus de-activation macro, required by the USB driver.
|
||||||
*/
|
*/
|
||||||
#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOD, GPIOD_USB_DISC)
|
#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOD, GPIOD_USB_DISC)
|
||||||
|
|
||||||
#if !defined(_FROM_ASM_)
|
#if !defined(_FROM_ASM_)
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
void boardInit(void);
|
void boardInit(void);
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#endif /* _FROM_ASM_ */
|
#endif /* _FROM_ASM_ */
|
||||||
|
|
||||||
#endif /* _BOARD_H_ */
|
#endif /* _BOARD_H_ */
|
||||||
|
|
|
@ -1,3 +1,3 @@
|
||||||
BOARDINC = $(GFXLIB)/boards/base/Olimex-STM32-LCD/chibios_board
|
BOARDINC = $(GFXLIB)/boards/base/Olimex-STM32-LCD/chibios_board
|
||||||
BOARDSRC = $(BOARDINC)/board.c \
|
BOARDSRC = $(BOARDINC)/board.c \
|
||||||
|
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
GFXINC += $(GFXLIB)/boards/base/STM32F429i-Discovery/chibios
|
GFXINC += $(GFXLIB)/boards/base/STM32F429i-Discovery/chibios
|
||||||
GFXSRC += $(GFXLIB)/boards/base/STM32F429i-Discovery/chibios/stm32f429i_discovery_sdram.c \
|
GFXSRC += $(GFXLIB)/boards/base/STM32F429i-Discovery/chibios/stm32f429i_discovery_sdram.c \
|
||||||
$(GFXLIB)/boards/base/STM32F429i-Discovery/chibios/stm32f4xx_fmc.c
|
$(GFXLIB)/boards/base/STM32F429i-Discovery/chibios/stm32f4xx_fmc.c
|
||||||
|
|
||||||
GFXDEFS += -DGFX_USE_OS_CHIBIOS=GFXON
|
GFXDEFS += -DGFX_USE_OS_CHIBIOS=GFXON
|
||||||
include $(GFXLIB)/drivers/gdisp/STM32LTDC/driver.mk
|
include $(GFXLIB)/drivers/gdisp/STM32LTDC/driver.mk
|
||||||
include $(GFXLIB)/drivers/ginput/touch/STMPE811/driver.mk
|
include $(GFXLIB)/drivers/ginput/touch/STMPE811/driver.mk
|
||||||
|
|
|
@ -1,212 +1,212 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_BOARD_H
|
#ifndef _GDISP_LLD_BOARD_H
|
||||||
#define _GDISP_LLD_BOARD_H
|
#define _GDISP_LLD_BOARD_H
|
||||||
|
|
||||||
#include "stm32f4xx_fmc.h"
|
#include "stm32f4xx_fmc.h"
|
||||||
#include "stm32f429i_discovery_sdram.h"
|
#include "stm32f429i_discovery_sdram.h"
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
#define SPI_PORT &SPID5
|
#define SPI_PORT &SPID5
|
||||||
#define DC_PORT GPIOD
|
#define DC_PORT GPIOD
|
||||||
#define DC_PIN GPIOD_LCD_WRX
|
#define DC_PIN GPIOD_LCD_WRX
|
||||||
|
|
||||||
static const SPIConfig spi_cfg = {
|
static const SPIConfig spi_cfg = {
|
||||||
NULL,
|
NULL,
|
||||||
GPIOC,
|
GPIOC,
|
||||||
GPIOC_SPI5_LCD_CS,
|
GPIOC_SPI5_LCD_CS,
|
||||||
((1 << 3) & SPI_CR1_BR) | SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR
|
((1 << 3) & SPI_CR1_BR) | SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR
|
||||||
};
|
};
|
||||||
|
|
||||||
static const ltdcConfig driverCfg = {
|
static const ltdcConfig driverCfg = {
|
||||||
240, 320,
|
240, 320,
|
||||||
10, 2,
|
10, 2,
|
||||||
20, 2,
|
20, 2,
|
||||||
10, 4,
|
10, 4,
|
||||||
0,
|
0,
|
||||||
0x000000,
|
0x000000,
|
||||||
{
|
{
|
||||||
(LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // frame
|
(LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // frame
|
||||||
240, 320, // width, height
|
240, 320, // width, height
|
||||||
240 * LTDC_PIXELBYTES, // pitch
|
240 * LTDC_PIXELBYTES, // pitch
|
||||||
LTDC_PIXELFORMAT, // fmt
|
LTDC_PIXELFORMAT, // fmt
|
||||||
0, 0, // x, y
|
0, 0, // x, y
|
||||||
240, 320, // cx, cy
|
240, 320, // cx, cy
|
||||||
0x00000000, // defcolor
|
0x00000000, // defcolor
|
||||||
0x000000, // keycolor
|
0x000000, // keycolor
|
||||||
LTDC_BLEND_FIX1_FIX2, // blending
|
LTDC_BLEND_FIX1_FIX2, // blending
|
||||||
0, // palette
|
0, // palette
|
||||||
0, // palettelen
|
0, // palettelen
|
||||||
0xFF, // alpha
|
0xFF, // alpha
|
||||||
LTDC_LEF_ENABLE // flags
|
LTDC_LEF_ENABLE // flags
|
||||||
},
|
},
|
||||||
#if STM32LTDC_USE_LAYER2 || STM32LTDC_USE_DOUBLEBUFFERING
|
#if STM32LTDC_USE_LAYER2 || STM32LTDC_USE_DOUBLEBUFFERING
|
||||||
{ // Foreground layer config (if turned on)
|
{ // Foreground layer config (if turned on)
|
||||||
(LLDCOLOR_TYPE *)(SDRAM_BANK_ADDR+(240 * 320 * LTDC_PIXELBYTES)), // Frame buffer address
|
(LLDCOLOR_TYPE *)(SDRAM_BANK_ADDR+(240 * 320 * LTDC_PIXELBYTES)), // Frame buffer address
|
||||||
240, 320, // width, height
|
240, 320, // width, height
|
||||||
240 * LTDC_PIXELBYTES, // pitch
|
240 * LTDC_PIXELBYTES, // pitch
|
||||||
LTDC_PIXELFORMAT, // fmt
|
LTDC_PIXELFORMAT, // fmt
|
||||||
0, 0, // x, y
|
0, 0, // x, y
|
||||||
240, 320, // cx, cy
|
240, 320, // cx, cy
|
||||||
0x00000000, // Default color (ARGB8888)
|
0x00000000, // Default color (ARGB8888)
|
||||||
0x000000, // Color key (RGB888)
|
0x000000, // Color key (RGB888)
|
||||||
LTDC_BLEND_MOD1_MOD2, // Blending factors
|
LTDC_BLEND_MOD1_MOD2, // Blending factors
|
||||||
0, // Palette (RGB888, can be NULL)
|
0, // Palette (RGB888, can be NULL)
|
||||||
0, // Palette length
|
0, // Palette length
|
||||||
0xFF, // Constant alpha factor
|
0xFF, // Constant alpha factor
|
||||||
LTDC_LEF_ENABLE // Layer configuration flags
|
LTDC_LEF_ENABLE // Layer configuration flags
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
LTDC_UNUSED_LAYER_CONFIG
|
LTDC_UNUSED_LAYER_CONFIG
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
#include "ili9341.h"
|
#include "ili9341.h"
|
||||||
|
|
||||||
static void acquire_bus(GDisplay *g) {
|
static void acquire_bus(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
spiSelect(SPI_PORT);
|
spiSelect(SPI_PORT);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void release_bus(GDisplay *g) {
|
static void release_bus(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
spiUnselect(SPI_PORT);
|
spiUnselect(SPI_PORT);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void write_index(GDisplay *g, gU8 index) {
|
static void write_index(GDisplay *g, gU8 index) {
|
||||||
static gU8 sindex;
|
static gU8 sindex;
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
palClearPad(DC_PORT, DC_PIN);
|
palClearPad(DC_PORT, DC_PIN);
|
||||||
sindex = index;
|
sindex = index;
|
||||||
spiSend(SPI_PORT, 1, &sindex);
|
spiSend(SPI_PORT, 1, &sindex);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void write_data(GDisplay *g, gU8 data) {
|
static void write_data(GDisplay *g, gU8 data) {
|
||||||
static gU8 sdata;
|
static gU8 sdata;
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
palSetPad(DC_PORT, DC_PIN);
|
palSetPad(DC_PORT, DC_PIN);
|
||||||
sdata = data;
|
sdata = data;
|
||||||
spiSend(SPI_PORT, 1, &sdata);
|
spiSend(SPI_PORT, 1, &sdata);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void Init9341(GDisplay *g) {
|
static void Init9341(GDisplay *g) {
|
||||||
#define REG_TYPEMASK 0xFF00
|
#define REG_TYPEMASK 0xFF00
|
||||||
#define REG_DATAMASK 0x00FF
|
#define REG_DATAMASK 0x00FF
|
||||||
|
|
||||||
#define REG_DATA 0x0000
|
#define REG_DATA 0x0000
|
||||||
#define REG_COMMAND 0x0100
|
#define REG_COMMAND 0x0100
|
||||||
#define REG_DELAY 0x0200
|
#define REG_DELAY 0x0200
|
||||||
|
|
||||||
static const gU16 initdata[] = {
|
static const gU16 initdata[] = {
|
||||||
REG_COMMAND | ILI9341_CMD_RESET,
|
REG_COMMAND | ILI9341_CMD_RESET,
|
||||||
REG_DELAY | 5,
|
REG_DELAY | 5,
|
||||||
REG_COMMAND | ILI9341_CMD_DISPLAY_OFF,
|
REG_COMMAND | ILI9341_CMD_DISPLAY_OFF,
|
||||||
REG_COMMAND | ILI9341_SET_FRAME_CTL_NORMAL, 0x00, 0x1B,
|
REG_COMMAND | ILI9341_SET_FRAME_CTL_NORMAL, 0x00, 0x1B,
|
||||||
REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA2,
|
REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA2,
|
||||||
REG_COMMAND | ILI9341_SET_POWER_CTL_1, 0x10,
|
REG_COMMAND | ILI9341_SET_POWER_CTL_1, 0x10,
|
||||||
REG_COMMAND | ILI9341_SET_POWER_CTL_2, 0x10,
|
REG_COMMAND | ILI9341_SET_POWER_CTL_2, 0x10,
|
||||||
#if 1
|
#if 1
|
||||||
REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x45, 0x15,
|
REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x45, 0x15,
|
||||||
REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0x90,
|
REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0x90,
|
||||||
#else
|
#else
|
||||||
REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x35, 0x3E,
|
REG_COMMAND | ILI9341_SET_VCOM_CTL_1, 0x35, 0x3E,
|
||||||
REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0xBE,
|
REG_COMMAND | ILI9341_SET_VCOM_CTL_2, 0xBE,
|
||||||
#endif
|
#endif
|
||||||
REG_COMMAND | ILI9341_SET_MEM_ACS_CTL, 0xC8,
|
REG_COMMAND | ILI9341_SET_MEM_ACS_CTL, 0xC8,
|
||||||
REG_COMMAND | ILI9341_SET_RGB_IF_SIG_CTL, 0xC2,
|
REG_COMMAND | ILI9341_SET_RGB_IF_SIG_CTL, 0xC2,
|
||||||
REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA7, 0x27, 0x04,
|
REG_COMMAND | ILI9341_SET_FUNCTION_CTL, 0x0A, 0xA7, 0x27, 0x04,
|
||||||
REG_COMMAND | ILI9341_SET_COL_ADDR, 0x00, 0x00, 0x00, 0xEF,
|
REG_COMMAND | ILI9341_SET_COL_ADDR, 0x00, 0x00, 0x00, 0xEF,
|
||||||
REG_COMMAND | ILI9341_SET_PAGE_ADDR, 0x00, 0x00, 0x01, 0x3F,
|
REG_COMMAND | ILI9341_SET_PAGE_ADDR, 0x00, 0x00, 0x01, 0x3F,
|
||||||
REG_COMMAND | ILI9341_SET_IF_CTL, 0x01, 0x00, 0x06,
|
REG_COMMAND | ILI9341_SET_IF_CTL, 0x01, 0x00, 0x06,
|
||||||
REG_COMMAND | ILI9341_SET_GAMMA, 0x01,
|
REG_COMMAND | ILI9341_SET_GAMMA, 0x01,
|
||||||
REG_COMMAND | ILI9341_SET_PGAMMA,
|
REG_COMMAND | ILI9341_SET_PGAMMA,
|
||||||
#if 1
|
#if 1
|
||||||
0x0F, 0x29, 0x24, 0x0C, 0x0E, 0x09, 0x4E, 0x78,
|
0x0F, 0x29, 0x24, 0x0C, 0x0E, 0x09, 0x4E, 0x78,
|
||||||
0x3C, 0x09, 0x13, 0x05, 0x17, 0x11, 0x00,
|
0x3C, 0x09, 0x13, 0x05, 0x17, 0x11, 0x00,
|
||||||
#else
|
#else
|
||||||
0x1F, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
|
0x1F, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
|
||||||
0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00,
|
0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00,
|
||||||
#endif
|
#endif
|
||||||
REG_COMMAND | ILI9341_SET_NGAMMA,
|
REG_COMMAND | ILI9341_SET_NGAMMA,
|
||||||
#if 1
|
#if 1
|
||||||
0x00, 0x16, 0x1B, 0x04, 0x11, 0x07, 0x31, 0x33,
|
0x00, 0x16, 0x1B, 0x04, 0x11, 0x07, 0x31, 0x33,
|
||||||
0x42, 0x05, 0x0C, 0x0A, 0x28, 0x2F, 0x0F,
|
0x42, 0x05, 0x0C, 0x0A, 0x28, 0x2F, 0x0F,
|
||||||
#else
|
#else
|
||||||
0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
|
0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
|
||||||
0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f,
|
0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f,
|
||||||
#endif
|
#endif
|
||||||
REG_COMMAND | ILI9341_CMD_SLEEP_OFF,
|
REG_COMMAND | ILI9341_CMD_SLEEP_OFF,
|
||||||
REG_DELAY | 10,
|
REG_DELAY | 10,
|
||||||
REG_COMMAND | ILI9341_CMD_DISPLAY_ON,
|
REG_COMMAND | ILI9341_CMD_DISPLAY_ON,
|
||||||
REG_COMMAND | ILI9341_SET_MEM
|
REG_COMMAND | ILI9341_SET_MEM
|
||||||
};
|
};
|
||||||
|
|
||||||
const gU16 *p;
|
const gU16 *p;
|
||||||
|
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
for(p = initdata; p < &initdata[sizeof(initdata)/sizeof(initdata[0])]; p++) {
|
for(p = initdata; p < &initdata[sizeof(initdata)/sizeof(initdata[0])]; p++) {
|
||||||
switch(*p & REG_TYPEMASK) {
|
switch(*p & REG_TYPEMASK) {
|
||||||
case REG_DATA: write_data(g, *p); break;
|
case REG_DATA: write_data(g, *p); break;
|
||||||
case REG_COMMAND: write_index(g, *p); break;
|
case REG_COMMAND: write_index(g, *p); break;
|
||||||
case REG_DELAY: gfxSleepMilliseconds(*p & 0xFF); break;
|
case REG_DELAY: gfxSleepMilliseconds(*p & 0xFF); break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void init_board(GDisplay *g) {
|
static void init_board(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
|
|
||||||
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); // UART_TX
|
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); // UART_TX
|
||||||
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); // UART_RX
|
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); // UART_RX
|
||||||
palSetPadMode(GPIOF, GPIOF_LCD_DCX, PAL_MODE_ALTERNATE(5));
|
palSetPadMode(GPIOF, GPIOF_LCD_DCX, PAL_MODE_ALTERNATE(5));
|
||||||
palSetPadMode(GPIOF, GPIOF_LCD_DE, PAL_MODE_ALTERNATE(14));
|
palSetPadMode(GPIOF, GPIOF_LCD_DE, PAL_MODE_ALTERNATE(14));
|
||||||
|
|
||||||
#define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */
|
#define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */
|
||||||
#define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */
|
#define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */
|
||||||
#define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */
|
#define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */
|
||||||
#define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */
|
#define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */
|
||||||
#define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */
|
#define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */
|
||||||
#define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */
|
#define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */
|
||||||
|
|
||||||
#define STM32_PLLSAIN_VALUE 192
|
#define STM32_PLLSAIN_VALUE 192
|
||||||
#define STM32_PLLSAIQ_VALUE 7
|
#define STM32_PLLSAIQ_VALUE 7
|
||||||
#define STM32_PLLSAIR_VALUE 4
|
#define STM32_PLLSAIR_VALUE 4
|
||||||
#define STM32_PLLSAIR_POST STM32_SAIR_DIV4
|
#define STM32_PLLSAIR_POST STM32_SAIR_DIV4
|
||||||
|
|
||||||
/* PLLSAI activation.*/
|
/* PLLSAI activation.*/
|
||||||
RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24);
|
RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24);
|
||||||
RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST;
|
RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST;
|
||||||
RCC->CR |= RCC_CR_PLLSAION;
|
RCC->CR |= RCC_CR_PLLSAION;
|
||||||
while(!(RCC->CR & RCC_CR_PLLSAIRDY)); // wait for PLLSAI to lock
|
while(!(RCC->CR & RCC_CR_PLLSAIRDY)); // wait for PLLSAI to lock
|
||||||
|
|
||||||
// Initialise the SDRAM
|
// Initialise the SDRAM
|
||||||
SDRAM_Init();
|
SDRAM_Init();
|
||||||
|
|
||||||
// Clear the SDRAM
|
// Clear the SDRAM
|
||||||
memset((void *)SDRAM_BANK_ADDR, 0, 0x400000);
|
memset((void *)SDRAM_BANK_ADDR, 0, 0x400000);
|
||||||
|
|
||||||
spiStart(SPI_PORT, &spi_cfg);
|
spiStart(SPI_PORT, &spi_cfg);
|
||||||
|
|
||||||
Init9341(g);
|
Init9341(g);
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void post_init_board(GDisplay *g) {
|
static GFXINLINE void post_init_board(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
|
static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
|
||||||
(void) g;
|
(void) g;
|
||||||
(void) percent;
|
(void) percent;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _GDISP_LLD_BOARD_H */
|
#endif /* _GDISP_LLD_BOARD_H */
|
||||||
|
|
|
@ -1,126 +1,126 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
|
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
|
||||||
#define _GINPUT_LLD_MOUSE_BOARD_H
|
#define _GINPUT_LLD_MOUSE_BOARD_H
|
||||||
|
|
||||||
// Resolution and Accuracy Settings
|
// Resolution and Accuracy Settings
|
||||||
#define GMOUSE_STMPE811_PEN_CALIBRATE_ERROR 8
|
#define GMOUSE_STMPE811_PEN_CALIBRATE_ERROR 8
|
||||||
#define GMOUSE_STMPE811_PEN_CLICK_ERROR 6
|
#define GMOUSE_STMPE811_PEN_CLICK_ERROR 6
|
||||||
#define GMOUSE_STMPE811_PEN_MOVE_ERROR 4
|
#define GMOUSE_STMPE811_PEN_MOVE_ERROR 4
|
||||||
#define GMOUSE_STMPE811_FINGER_CALIBRATE_ERROR 14
|
#define GMOUSE_STMPE811_FINGER_CALIBRATE_ERROR 14
|
||||||
#define GMOUSE_STMPE811_FINGER_CLICK_ERROR 18
|
#define GMOUSE_STMPE811_FINGER_CLICK_ERROR 18
|
||||||
#define GMOUSE_STMPE811_FINGER_MOVE_ERROR 14
|
#define GMOUSE_STMPE811_FINGER_MOVE_ERROR 14
|
||||||
|
|
||||||
// How much extra data to allocate at the end of the GMouse structure for the board's use
|
// How much extra data to allocate at the end of the GMouse structure for the board's use
|
||||||
#define GMOUSE_STMPE811_BOARD_DATA_SIZE 0
|
#define GMOUSE_STMPE811_BOARD_DATA_SIZE 0
|
||||||
|
|
||||||
// Options - Leave these commented to make it user configurable in the gfxconf.h
|
// Options - Leave these commented to make it user configurable in the gfxconf.h
|
||||||
//#define GMOUSE_STMPE811_READ_PRESSURE GFXOFF
|
//#define GMOUSE_STMPE811_READ_PRESSURE GFXOFF
|
||||||
//#define GMOUSE_STMPE811_SELF_CALIBRATE GFXOFF
|
//#define GMOUSE_STMPE811_SELF_CALIBRATE GFXOFF
|
||||||
//#define GMOUSE_STMPE811_TEST_MODE GFXOFF
|
//#define GMOUSE_STMPE811_TEST_MODE GFXOFF
|
||||||
|
|
||||||
// Set to GFXOFF because it does not work properly on this board even though the pin exists.
|
// Set to GFXOFF because it does not work properly on this board even though the pin exists.
|
||||||
#define GMOUSE_STMPE811_GPIO_IRQPIN GFXOFF
|
#define GMOUSE_STMPE811_GPIO_IRQPIN GFXOFF
|
||||||
|
|
||||||
// If GFXON this is a really slow CPU and we should always clear the FIFO between reads.
|
// If GFXON this is a really slow CPU and we should always clear the FIFO between reads.
|
||||||
#define GMOUSE_STMPE811_SLOW_CPU GFXOFF
|
#define GMOUSE_STMPE811_SLOW_CPU GFXOFF
|
||||||
|
|
||||||
// Slave address
|
// Slave address
|
||||||
#define STMPE811_ADDR 0x41
|
#define STMPE811_ADDR 0x41
|
||||||
|
|
||||||
// Maximum timeout
|
// Maximum timeout
|
||||||
#define STMPE811_TIMEOUT 0x3000
|
#define STMPE811_TIMEOUT 0x3000
|
||||||
|
|
||||||
static const I2CConfig i2ccfg = {
|
static const I2CConfig i2ccfg = {
|
||||||
OPMODE_I2C,
|
OPMODE_I2C,
|
||||||
400000,
|
400000,
|
||||||
FAST_DUTY_CYCLE_2,
|
FAST_DUTY_CYCLE_2,
|
||||||
};
|
};
|
||||||
|
|
||||||
static gBool init_board(GMouse* m, unsigned driverinstance) {
|
static gBool init_board(GMouse* m, unsigned driverinstance) {
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
// This board only supports one touch panel
|
// This board only supports one touch panel
|
||||||
if (driverinstance)
|
if (driverinstance)
|
||||||
return gFalse;
|
return gFalse;
|
||||||
|
|
||||||
// Set pin modes
|
// Set pin modes
|
||||||
#if CH_KERNEL_MAJOR == 2
|
#if CH_KERNEL_MAJOR == 2
|
||||||
palSetPadMode(GPIOA, 15, PAL_MODE_INPUT | PAL_STM32_PUDR_FLOATING); /* TP IRQ */
|
palSetPadMode(GPIOA, 15, PAL_MODE_INPUT | PAL_STM32_PUDR_FLOATING); /* TP IRQ */
|
||||||
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SCL */
|
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SCL */
|
||||||
palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SDA */
|
palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN); /* SDA */
|
||||||
#else
|
#else
|
||||||
palSetPadMode(GPIOA, 15, PAL_MODE_INPUT | PAL_STM32_PUPDR_FLOATING); /* TP IRQ */
|
palSetPadMode(GPIOA, 15, PAL_MODE_INPUT | PAL_STM32_PUPDR_FLOATING); /* TP IRQ */
|
||||||
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_PUPDR_FLOATING); /* SCL */
|
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_PUPDR_FLOATING); /* SCL */
|
||||||
palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_PUPDR_FLOATING); /* SDA */
|
palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_PUPDR_FLOATING); /* SDA */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// Start the I2C
|
// Start the I2C
|
||||||
i2cStart(&I2CD3, &i2ccfg);
|
i2cStart(&I2CD3, &i2ccfg);
|
||||||
|
|
||||||
return gTrue;
|
return gTrue;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if GMOUSE_STMPE811_GPIO_IRQPIN
|
#if GMOUSE_STMPE811_GPIO_IRQPIN
|
||||||
static gBool getpin_irq(GMouse* m) {
|
static gBool getpin_irq(GMouse* m) {
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
return !palReadPad(GPIOA, 15);
|
return !palReadPad(GPIOA, 15);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static GFXINLINE void aquire_bus(GMouse* m) {
|
static GFXINLINE void aquire_bus(GMouse* m) {
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void release_bus(GMouse* m) {
|
static GFXINLINE void release_bus(GMouse* m) {
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void write_reg(GMouse* m, gU8 reg, gU8 val) {
|
static void write_reg(GMouse* m, gU8 reg, gU8 val) {
|
||||||
gU8 txbuf[2];
|
gU8 txbuf[2];
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
txbuf[0] = reg;
|
txbuf[0] = reg;
|
||||||
txbuf[1] = val;
|
txbuf[1] = val;
|
||||||
|
|
||||||
i2cAcquireBus(&I2CD3);
|
i2cAcquireBus(&I2CD3);
|
||||||
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, txbuf, 2, 0, 0, MS2ST(STMPE811_TIMEOUT));
|
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, txbuf, 2, 0, 0, MS2ST(STMPE811_TIMEOUT));
|
||||||
i2cReleaseBus(&I2CD3);
|
i2cReleaseBus(&I2CD3);
|
||||||
}
|
}
|
||||||
|
|
||||||
static gU8 read_byte(GMouse* m, gU8 reg) {
|
static gU8 read_byte(GMouse* m, gU8 reg) {
|
||||||
gU8 rxbuf[1];
|
gU8 rxbuf[1];
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
rxbuf[0] = 0;
|
rxbuf[0] = 0;
|
||||||
|
|
||||||
i2cAcquireBus(&I2CD3);
|
i2cAcquireBus(&I2CD3);
|
||||||
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, ®, 1, rxbuf, 1, MS2ST(STMPE811_TIMEOUT));
|
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, ®, 1, rxbuf, 1, MS2ST(STMPE811_TIMEOUT));
|
||||||
i2cReleaseBus(&I2CD3);
|
i2cReleaseBus(&I2CD3);
|
||||||
|
|
||||||
return rxbuf[0];
|
return rxbuf[0];
|
||||||
}
|
}
|
||||||
|
|
||||||
static gU16 read_word(GMouse* m, gU8 reg) {
|
static gU16 read_word(GMouse* m, gU8 reg) {
|
||||||
gU8 rxbuf[2];
|
gU8 rxbuf[2];
|
||||||
(void) m;
|
(void) m;
|
||||||
|
|
||||||
rxbuf[0] = 0;
|
rxbuf[0] = 0;
|
||||||
rxbuf[1] = 0;
|
rxbuf[1] = 0;
|
||||||
|
|
||||||
i2cAcquireBus(&I2CD3);
|
i2cAcquireBus(&I2CD3);
|
||||||
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, ®, 1, rxbuf, 2, MS2ST(STMPE811_TIMEOUT));
|
i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, ®, 1, rxbuf, 2, MS2ST(STMPE811_TIMEOUT));
|
||||||
i2cReleaseBus(&I2CD3);
|
i2cReleaseBus(&I2CD3);
|
||||||
|
|
||||||
return (((gU16)rxbuf[0]) << 8) | rxbuf[1];
|
return (((gU16)rxbuf[0]) << 8) | rxbuf[1];
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
|
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,110 +1,110 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
|
#ifndef _GINPUT_LLD_MOUSE_BOARD_H
|
||||||
#define _GINPUT_LLD_MOUSE_BOARD_H
|
#define _GINPUT_LLD_MOUSE_BOARD_H
|
||||||
|
|
||||||
#include "ft6x06.h"
|
#include "ft6x06.h"
|
||||||
#include "stm32f4xx.h"
|
#include "stm32f4xx.h"
|
||||||
#include "stm32f4xx_hal.h"
|
#include "stm32f4xx_hal.h"
|
||||||
|
|
||||||
// Resolution and Accuracy Settings
|
// Resolution and Accuracy Settings
|
||||||
#define GMOUSE_FT6x06_PEN_CALIBRATE_ERROR 40
|
#define GMOUSE_FT6x06_PEN_CALIBRATE_ERROR 40
|
||||||
#define GMOUSE_FT6x06_PEN_CLICK_ERROR 16
|
#define GMOUSE_FT6x06_PEN_CLICK_ERROR 16
|
||||||
#define GMOUSE_FT6x06_PEN_MOVE_ERROR 14
|
#define GMOUSE_FT6x06_PEN_MOVE_ERROR 14
|
||||||
#define GMOUSE_FT6x06_FINGER_CALIBRATE_ERROR 50
|
#define GMOUSE_FT6x06_FINGER_CALIBRATE_ERROR 50
|
||||||
#define GMOUSE_FT6x06_FINGER_CLICK_ERROR 28
|
#define GMOUSE_FT6x06_FINGER_CLICK_ERROR 28
|
||||||
#define GMOUSE_FT6x06_FINGER_MOVE_ERROR 24
|
#define GMOUSE_FT6x06_FINGER_MOVE_ERROR 24
|
||||||
|
|
||||||
// How much extra data to allocate at the end of the GMouse structure for the board's use
|
// How much extra data to allocate at the end of the GMouse structure for the board's use
|
||||||
#define GMOUSE_FT6x06_BOARD_DATA_SIZE 0
|
#define GMOUSE_FT6x06_BOARD_DATA_SIZE 0
|
||||||
|
|
||||||
/* The FT6x06 I2C slave address */
|
/* The FT6x06 I2C slave address */
|
||||||
#define FT6x06_SLAVE_ADDR 0x54
|
#define FT6x06_SLAVE_ADDR 0x54
|
||||||
|
|
||||||
I2C_HandleTypeDef i2cHandle;
|
I2C_HandleTypeDef i2cHandle;
|
||||||
/* Maximum speed (400kHz) */
|
/* Maximum speed (400kHz) */
|
||||||
#define CLOCKSPEED 400000;
|
#define CLOCKSPEED 400000;
|
||||||
|
|
||||||
static gBool init_board(GMouse* m, unsigned instance) {
|
static gBool init_board(GMouse* m, unsigned instance) {
|
||||||
(void)m;
|
(void)m;
|
||||||
(void)instance;
|
(void)instance;
|
||||||
|
|
||||||
GPIO_InitTypeDef gpioInit;
|
GPIO_InitTypeDef gpioInit;
|
||||||
/* I2C1_SCL PB8 */
|
/* I2C1_SCL PB8 */
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE(); // Enable GPIOB clock
|
__HAL_RCC_GPIOB_CLK_ENABLE(); // Enable GPIOB clock
|
||||||
gpioInit.Pin = GPIO_PIN_8;
|
gpioInit.Pin = GPIO_PIN_8;
|
||||||
gpioInit.Mode = GPIO_MODE_AF_OD; // I2C -> Open-drain
|
gpioInit.Mode = GPIO_MODE_AF_OD; // I2C -> Open-drain
|
||||||
gpioInit.Pull = GPIO_NOPULL; // Open-drain -> no pull
|
gpioInit.Pull = GPIO_NOPULL; // Open-drain -> no pull
|
||||||
gpioInit.Speed = GPIO_SPEED_FREQ_HIGH; // High speed
|
gpioInit.Speed = GPIO_SPEED_FREQ_HIGH; // High speed
|
||||||
gpioInit.Alternate = GPIO_AF4_I2C1; // Alternate function 4
|
gpioInit.Alternate = GPIO_AF4_I2C1; // Alternate function 4
|
||||||
HAL_GPIO_Init(GPIOB, &gpioInit);
|
HAL_GPIO_Init(GPIOB, &gpioInit);
|
||||||
|
|
||||||
/* I2C1_SDA PB9 */
|
/* I2C1_SDA PB9 */
|
||||||
gpioInit.Pin = GPIO_PIN_9;
|
gpioInit.Pin = GPIO_PIN_9;
|
||||||
HAL_GPIO_Init(GPIOB, &gpioInit);
|
HAL_GPIO_Init(GPIOB, &gpioInit);
|
||||||
|
|
||||||
/* LCD_INT PJ5 */
|
/* LCD_INT PJ5 */
|
||||||
__HAL_RCC_GPIOJ_CLK_ENABLE();
|
__HAL_RCC_GPIOJ_CLK_ENABLE();
|
||||||
gpioInit.Pin = GPIO_PIN_5;
|
gpioInit.Pin = GPIO_PIN_5;
|
||||||
gpioInit.Mode = GPIO_MODE_INPUT; // Input mode
|
gpioInit.Mode = GPIO_MODE_INPUT; // Input mode
|
||||||
gpioInit.Pull = GPIO_PULLUP; // Pull-up
|
gpioInit.Pull = GPIO_PULLUP; // Pull-up
|
||||||
HAL_GPIO_Init(GPIOJ, &gpioInit);
|
HAL_GPIO_Init(GPIOJ, &gpioInit);
|
||||||
|
|
||||||
/* I2C1 intialization */
|
/* I2C1 intialization */
|
||||||
i2cHandle.Instance = I2C1;
|
i2cHandle.Instance = I2C1;
|
||||||
i2cHandle.Init.ClockSpeed = CLOCKSPEED;
|
i2cHandle.Init.ClockSpeed = CLOCKSPEED;
|
||||||
i2cHandle.Init.DutyCycle = I2C_DUTYCYCLE_2; // Normal duty cycle
|
i2cHandle.Init.DutyCycle = I2C_DUTYCYCLE_2; // Normal duty cycle
|
||||||
i2cHandle.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; // No dual adressing needed
|
i2cHandle.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; // No dual adressing needed
|
||||||
i2cHandle.Init.OwnAddress1 = 0x00;
|
i2cHandle.Init.OwnAddress1 = 0x00;
|
||||||
i2cHandle.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
i2cHandle.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||||||
i2cHandle.Init.OwnAddress2 = 0x00;
|
i2cHandle.Init.OwnAddress2 = 0x00;
|
||||||
i2cHandle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; // All not needed so disabled
|
i2cHandle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; // All not needed so disabled
|
||||||
i2cHandle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
i2cHandle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
||||||
|
|
||||||
__HAL_RCC_I2C1_CLK_ENABLE();
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
||||||
|
|
||||||
if(HAL_I2C_Init(&i2cHandle) == HAL_OK)
|
if(HAL_I2C_Init(&i2cHandle) == HAL_OK)
|
||||||
return gTrue;
|
return gTrue;
|
||||||
|
|
||||||
return gFalse;
|
return gFalse;
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void aquire_bus(GMouse* m) {
|
static GFXINLINE void aquire_bus(GMouse* m) {
|
||||||
(void)m;
|
(void)m;
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void release_bus(GMouse* m) {
|
static GFXINLINE void release_bus(GMouse* m) {
|
||||||
(void)m;
|
(void)m;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void write_reg(GMouse* m, gU8 reg, gU8 val) {
|
static void write_reg(GMouse* m, gU8 reg, gU8 val) {
|
||||||
(void)m;
|
(void)m;
|
||||||
|
|
||||||
HAL_I2C_Mem_Write(&i2cHandle, FT6x06_SLAVE_ADDR, (gU16)reg, I2C_MEMADD_SIZE_8BIT, &val, 1, 1000);
|
HAL_I2C_Mem_Write(&i2cHandle, FT6x06_SLAVE_ADDR, (gU16)reg, I2C_MEMADD_SIZE_8BIT, &val, 1, 1000);
|
||||||
}
|
}
|
||||||
|
|
||||||
static gU8 read_byte(GMouse* m, gU8 reg) {
|
static gU8 read_byte(GMouse* m, gU8 reg) {
|
||||||
(void)m;
|
(void)m;
|
||||||
gU8 result;
|
gU8 result;
|
||||||
|
|
||||||
HAL_I2C_Mem_Read(&i2cHandle, FT6x06_SLAVE_ADDR, (gU16)reg, I2C_MEMADD_SIZE_8BIT, &result, 1, 1000);
|
HAL_I2C_Mem_Read(&i2cHandle, FT6x06_SLAVE_ADDR, (gU16)reg, I2C_MEMADD_SIZE_8BIT, &result, 1, 1000);
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
static gU16 read_word(GMouse* m, gU8 reg) {
|
static gU16 read_word(GMouse* m, gU8 reg) {
|
||||||
(void)m;
|
(void)m;
|
||||||
gU8 result[2];
|
gU8 result[2];
|
||||||
|
|
||||||
HAL_I2C_Mem_Read(&i2cHandle, FT6x06_SLAVE_ADDR, (gU16)reg, I2C_MEMADD_SIZE_8BIT, result, 2, 1000);
|
HAL_I2C_Mem_Read(&i2cHandle, FT6x06_SLAVE_ADDR, (gU16)reg, I2C_MEMADD_SIZE_8BIT, result, 2, 1000);
|
||||||
|
|
||||||
return (result[0]<<8 | result[1]);
|
return (result[0]<<8 | result[1]);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
|
#endif /* _GINPUT_LLD_MOUSE_BOARD_H */
|
||||||
|
|
|
@ -1,454 +1,454 @@
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file otm8009a.c
|
* @file otm8009a.c
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @version V1.0.2
|
* @version V1.0.2
|
||||||
* @date 27-January-2017
|
* @date 27-January-2017
|
||||||
* @brief This file provides the LCD Driver for KoD KM-040TMP-02-0621 (WVGA)
|
* @brief This file provides the LCD Driver for KoD KM-040TMP-02-0621 (WVGA)
|
||||||
* DSI LCD Display OTM8009A.
|
* DSI LCD Display OTM8009A.
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
* are permitted provided that the following conditions are met:
|
* are permitted provided that the following conditions are met:
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer.
|
* this list of conditions and the following disclaimer.
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
* and/or other materials provided with the distribution.
|
* and/or other materials provided with the distribution.
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
* may be used to endorse or promote products derived from this software
|
* may be used to endorse or promote products derived from this software
|
||||||
* without specific prior written permission.
|
* without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "otm8009a.h"
|
#include "otm8009a.h"
|
||||||
|
|
||||||
/** @addtogroup BSP
|
/** @addtogroup BSP
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup Components
|
/** @addtogroup Components
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup OTM8009A OTM8009A
|
/** @defgroup OTM8009A OTM8009A
|
||||||
* @brief This file provides a set of functions needed to drive the
|
* @brief This file provides a set of functions needed to drive the
|
||||||
* otm8009a IC display driver.
|
* otm8009a IC display driver.
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Private types -------------------------------------------------------------*/
|
/* Private types -------------------------------------------------------------*/
|
||||||
/* Private variables ---------------------------------------------------------*/
|
/* Private variables ---------------------------------------------------------*/
|
||||||
/* Private constants ---------------------------------------------------------*/
|
/* Private constants ---------------------------------------------------------*/
|
||||||
/** @defgroup OTM8009A_Private_Constants OTM8009A Private Constants
|
/** @defgroup OTM8009A_Private_Constants OTM8009A Private Constants
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* @brief Constant tables of register settings used to transmit DSI
|
* @brief Constant tables of register settings used to transmit DSI
|
||||||
* command packets as power up initialization sequence of the KoD LCD (OTM8009A LCD Driver)
|
* command packets as power up initialization sequence of the KoD LCD (OTM8009A LCD Driver)
|
||||||
*/
|
*/
|
||||||
const gU8 lcdRegData1[] = {0x80,0x09,0x01,0xFF};
|
const gU8 lcdRegData1[] = {0x80,0x09,0x01,0xFF};
|
||||||
const gU8 lcdRegData2[] = {0x80,0x09,0xFF};
|
const gU8 lcdRegData2[] = {0x80,0x09,0xFF};
|
||||||
const gU8 lcdRegData3[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE1};
|
const gU8 lcdRegData3[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE1};
|
||||||
const gU8 lcdRegData4[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE2};
|
const gU8 lcdRegData4[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE2};
|
||||||
const gU8 lcdRegData5[] = {0x79,0x79,0xD8};
|
const gU8 lcdRegData5[] = {0x79,0x79,0xD8};
|
||||||
const gU8 lcdRegData6[] = {0x00,0x01,0xB3};
|
const gU8 lcdRegData6[] = {0x00,0x01,0xB3};
|
||||||
const gU8 lcdRegData7[] = {0x85,0x01,0x00,0x84,0x01,0x00,0xCE};
|
const gU8 lcdRegData7[] = {0x85,0x01,0x00,0x84,0x01,0x00,0xCE};
|
||||||
const gU8 lcdRegData8[] = {0x18,0x04,0x03,0x39,0x00,0x00,0x00,0x18,0x03,0x03,0x3A,0x00,0x00,0x00,0xCE};
|
const gU8 lcdRegData8[] = {0x18,0x04,0x03,0x39,0x00,0x00,0x00,0x18,0x03,0x03,0x3A,0x00,0x00,0x00,0xCE};
|
||||||
const gU8 lcdRegData9[] = {0x18,0x02,0x03,0x3B,0x00,0x00,0x00,0x18,0x01,0x03,0x3C,0x00,0x00,0x00,0xCE};
|
const gU8 lcdRegData9[] = {0x18,0x02,0x03,0x3B,0x00,0x00,0x00,0x18,0x01,0x03,0x3C,0x00,0x00,0x00,0xCE};
|
||||||
const gU8 lcdRegData10[] = {0x01,0x01,0x20,0x20,0x00,0x00,0x01,0x02,0x00,0x00,0xCF};
|
const gU8 lcdRegData10[] = {0x01,0x01,0x20,0x20,0x00,0x00,0x01,0x02,0x00,0x00,0xCF};
|
||||||
const gU8 lcdRegData11[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
const gU8 lcdRegData11[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
||||||
const gU8 lcdRegData12[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
const gU8 lcdRegData12[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
||||||
const gU8 lcdRegData13[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
const gU8 lcdRegData13[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
||||||
const gU8 lcdRegData14[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
const gU8 lcdRegData14[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
||||||
const gU8 lcdRegData15[] = {0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
const gU8 lcdRegData15[] = {0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
||||||
const gU8 lcdRegData16[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0xCB};
|
const gU8 lcdRegData16[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0xCB};
|
||||||
const gU8 lcdRegData17[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
const gU8 lcdRegData17[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
|
||||||
const gU8 lcdRegData18[] = {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xCB};
|
const gU8 lcdRegData18[] = {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xCB};
|
||||||
const gU8 lcdRegData19[] = {0x00,0x26,0x09,0x0B,0x01,0x25,0x00,0x00,0x00,0x00,0xCC};
|
const gU8 lcdRegData19[] = {0x00,0x26,0x09,0x0B,0x01,0x25,0x00,0x00,0x00,0x00,0xCC};
|
||||||
const gU8 lcdRegData20[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x26,0x0A,0x0C,0x02,0xCC};
|
const gU8 lcdRegData20[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x26,0x0A,0x0C,0x02,0xCC};
|
||||||
const gU8 lcdRegData21[] = {0x25,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC};
|
const gU8 lcdRegData21[] = {0x25,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC};
|
||||||
const gU8 lcdRegData22[] = {0x00,0x25,0x0C,0x0A,0x02,0x26,0x00,0x00,0x00,0x00,0xCC};
|
const gU8 lcdRegData22[] = {0x00,0x25,0x0C,0x0A,0x02,0x26,0x00,0x00,0x00,0x00,0xCC};
|
||||||
const gU8 lcdRegData23[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x25,0x0B,0x09,0x01,0xCC};
|
const gU8 lcdRegData23[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x25,0x0B,0x09,0x01,0xCC};
|
||||||
const gU8 lcdRegData24[] = {0x26,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC};
|
const gU8 lcdRegData24[] = {0x26,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC};
|
||||||
const gU8 lcdRegData25[] = {0xFF,0xFF,0xFF,0xFF};
|
const gU8 lcdRegData25[] = {0xFF,0xFF,0xFF,0xFF};
|
||||||
/*
|
/*
|
||||||
* CASET value (Column Address Set) : X direction LCD GRAM boundaries
|
* CASET value (Column Address Set) : X direction LCD GRAM boundaries
|
||||||
* depending on LCD orientation mode and PASET value (Page Address Set) : Y direction
|
* depending on LCD orientation mode and PASET value (Page Address Set) : Y direction
|
||||||
* LCD GRAM boundaries depending on LCD orientation mode
|
* LCD GRAM boundaries depending on LCD orientation mode
|
||||||
* XS[15:0] = 0x000 = 0, XE[15:0] = 0x31F = 799 for landscape mode : apply to CASET
|
* XS[15:0] = 0x000 = 0, XE[15:0] = 0x31F = 799 for landscape mode : apply to CASET
|
||||||
* YS[15:0] = 0x000 = 0, YE[15:0] = 0x31F = 799 for portrait mode : : apply to PASET
|
* YS[15:0] = 0x000 = 0, YE[15:0] = 0x31F = 799 for portrait mode : : apply to PASET
|
||||||
*/
|
*/
|
||||||
const gU8 lcdRegData27[] = {0x00, 0x00, 0x03, 0x1F, OTM8009A_CMD_CASET};
|
const gU8 lcdRegData27[] = {0x00, 0x00, 0x03, 0x1F, OTM8009A_CMD_CASET};
|
||||||
/*
|
/*
|
||||||
* XS[15:0] = 0x000 = 0, XE[15:0] = 0x1DF = 479 for portrait mode : apply to CASET
|
* XS[15:0] = 0x000 = 0, XE[15:0] = 0x1DF = 479 for portrait mode : apply to CASET
|
||||||
* YS[15:0] = 0x000 = 0, YE[15:0] = 0x1DF = 479 for landscape mode : apply to PASET
|
* YS[15:0] = 0x000 = 0, YE[15:0] = 0x1DF = 479 for landscape mode : apply to PASET
|
||||||
*/
|
*/
|
||||||
const gU8 lcdRegData28[] = {0x00, 0x00, 0x01, 0xDF, OTM8009A_CMD_PASET};
|
const gU8 lcdRegData28[] = {0x00, 0x00, 0x01, 0xDF, OTM8009A_CMD_PASET};
|
||||||
|
|
||||||
|
|
||||||
const gU8 ShortRegData1[] = {OTM8009A_CMD_NOP, 0x00};
|
const gU8 ShortRegData1[] = {OTM8009A_CMD_NOP, 0x00};
|
||||||
const gU8 ShortRegData2[] = {OTM8009A_CMD_NOP, 0x80};
|
const gU8 ShortRegData2[] = {OTM8009A_CMD_NOP, 0x80};
|
||||||
const gU8 ShortRegData3[] = {0xC4, 0x30};
|
const gU8 ShortRegData3[] = {0xC4, 0x30};
|
||||||
const gU8 ShortRegData4[] = {OTM8009A_CMD_NOP, 0x8A};
|
const gU8 ShortRegData4[] = {OTM8009A_CMD_NOP, 0x8A};
|
||||||
const gU8 ShortRegData5[] = {0xC4, 0x40};
|
const gU8 ShortRegData5[] = {0xC4, 0x40};
|
||||||
const gU8 ShortRegData6[] = {OTM8009A_CMD_NOP, 0xB1};
|
const gU8 ShortRegData6[] = {OTM8009A_CMD_NOP, 0xB1};
|
||||||
const gU8 ShortRegData7[] = {0xC5, 0xA9};
|
const gU8 ShortRegData7[] = {0xC5, 0xA9};
|
||||||
const gU8 ShortRegData8[] = {OTM8009A_CMD_NOP, 0x91};
|
const gU8 ShortRegData8[] = {OTM8009A_CMD_NOP, 0x91};
|
||||||
const gU8 ShortRegData9[] = {0xC5, 0x34};
|
const gU8 ShortRegData9[] = {0xC5, 0x34};
|
||||||
const gU8 ShortRegData10[] = {OTM8009A_CMD_NOP, 0xB4};
|
const gU8 ShortRegData10[] = {OTM8009A_CMD_NOP, 0xB4};
|
||||||
const gU8 ShortRegData11[] = {0xC0, 0x50};
|
const gU8 ShortRegData11[] = {0xC0, 0x50};
|
||||||
const gU8 ShortRegData12[] = {0xD9, 0x4E};
|
const gU8 ShortRegData12[] = {0xD9, 0x4E};
|
||||||
const gU8 ShortRegData13[] = {OTM8009A_CMD_NOP, 0x81};
|
const gU8 ShortRegData13[] = {OTM8009A_CMD_NOP, 0x81};
|
||||||
const gU8 ShortRegData14[] = {0xC1, 0x66};
|
const gU8 ShortRegData14[] = {0xC1, 0x66};
|
||||||
const gU8 ShortRegData15[] = {OTM8009A_CMD_NOP, 0xA1};
|
const gU8 ShortRegData15[] = {OTM8009A_CMD_NOP, 0xA1};
|
||||||
const gU8 ShortRegData16[] = {0xC1, 0x08};
|
const gU8 ShortRegData16[] = {0xC1, 0x08};
|
||||||
const gU8 ShortRegData17[] = {OTM8009A_CMD_NOP, 0x92};
|
const gU8 ShortRegData17[] = {OTM8009A_CMD_NOP, 0x92};
|
||||||
const gU8 ShortRegData18[] = {0xC5, 0x01};
|
const gU8 ShortRegData18[] = {0xC5, 0x01};
|
||||||
const gU8 ShortRegData19[] = {OTM8009A_CMD_NOP, 0x95};
|
const gU8 ShortRegData19[] = {OTM8009A_CMD_NOP, 0x95};
|
||||||
const gU8 ShortRegData20[] = {OTM8009A_CMD_NOP, 0x94};
|
const gU8 ShortRegData20[] = {OTM8009A_CMD_NOP, 0x94};
|
||||||
const gU8 ShortRegData21[] = {0xC5, 0x33};
|
const gU8 ShortRegData21[] = {0xC5, 0x33};
|
||||||
const gU8 ShortRegData22[] = {OTM8009A_CMD_NOP, 0xA3};
|
const gU8 ShortRegData22[] = {OTM8009A_CMD_NOP, 0xA3};
|
||||||
const gU8 ShortRegData23[] = {0xC0, 0x1B};
|
const gU8 ShortRegData23[] = {0xC0, 0x1B};
|
||||||
const gU8 ShortRegData24[] = {OTM8009A_CMD_NOP, 0x82};
|
const gU8 ShortRegData24[] = {OTM8009A_CMD_NOP, 0x82};
|
||||||
const gU8 ShortRegData25[] = {0xC5, 0x83};
|
const gU8 ShortRegData25[] = {0xC5, 0x83};
|
||||||
const gU8 ShortRegData26[] = {0xC4, 0x83};
|
const gU8 ShortRegData26[] = {0xC4, 0x83};
|
||||||
const gU8 ShortRegData27[] = {0xC1, 0x0E};
|
const gU8 ShortRegData27[] = {0xC1, 0x0E};
|
||||||
const gU8 ShortRegData28[] = {OTM8009A_CMD_NOP, 0xA6};
|
const gU8 ShortRegData28[] = {OTM8009A_CMD_NOP, 0xA6};
|
||||||
const gU8 ShortRegData29[] = {OTM8009A_CMD_NOP, 0xA0};
|
const gU8 ShortRegData29[] = {OTM8009A_CMD_NOP, 0xA0};
|
||||||
const gU8 ShortRegData30[] = {OTM8009A_CMD_NOP, 0xB0};
|
const gU8 ShortRegData30[] = {OTM8009A_CMD_NOP, 0xB0};
|
||||||
const gU8 ShortRegData31[] = {OTM8009A_CMD_NOP, 0xC0};
|
const gU8 ShortRegData31[] = {OTM8009A_CMD_NOP, 0xC0};
|
||||||
const gU8 ShortRegData32[] = {OTM8009A_CMD_NOP, 0xD0};
|
const gU8 ShortRegData32[] = {OTM8009A_CMD_NOP, 0xD0};
|
||||||
const gU8 ShortRegData33[] = {OTM8009A_CMD_NOP, 0x90};
|
const gU8 ShortRegData33[] = {OTM8009A_CMD_NOP, 0x90};
|
||||||
const gU8 ShortRegData34[] = {OTM8009A_CMD_NOP, 0xE0};
|
const gU8 ShortRegData34[] = {OTM8009A_CMD_NOP, 0xE0};
|
||||||
const gU8 ShortRegData35[] = {OTM8009A_CMD_NOP, 0xF0};
|
const gU8 ShortRegData35[] = {OTM8009A_CMD_NOP, 0xF0};
|
||||||
const gU8 ShortRegData36[] = {OTM8009A_CMD_SLPOUT, 0x00};
|
const gU8 ShortRegData36[] = {OTM8009A_CMD_SLPOUT, 0x00};
|
||||||
const gU8 ShortRegData37[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB565};
|
const gU8 ShortRegData37[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB565};
|
||||||
const gU8 ShortRegData38[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB888};
|
const gU8 ShortRegData38[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB888};
|
||||||
const gU8 ShortRegData39[] = {OTM8009A_CMD_MADCTR, OTM8009A_MADCTR_MODE_LANDSCAPE};
|
const gU8 ShortRegData39[] = {OTM8009A_CMD_MADCTR, OTM8009A_MADCTR_MODE_LANDSCAPE};
|
||||||
const gU8 ShortRegData40[] = {OTM8009A_CMD_WRDISBV, 0x7F};
|
const gU8 ShortRegData40[] = {OTM8009A_CMD_WRDISBV, 0x7F};
|
||||||
const gU8 ShortRegData41[] = {OTM8009A_CMD_WRCTRLD, 0x2C};
|
const gU8 ShortRegData41[] = {OTM8009A_CMD_WRCTRLD, 0x2C};
|
||||||
const gU8 ShortRegData42[] = {OTM8009A_CMD_WRCABC, 0x02};
|
const gU8 ShortRegData42[] = {OTM8009A_CMD_WRCABC, 0x02};
|
||||||
const gU8 ShortRegData43[] = {OTM8009A_CMD_WRCABCMB, 0xFF};
|
const gU8 ShortRegData43[] = {OTM8009A_CMD_WRCABCMB, 0xFF};
|
||||||
const gU8 ShortRegData44[] = {OTM8009A_CMD_DISPON, 0x00};
|
const gU8 ShortRegData44[] = {OTM8009A_CMD_DISPON, 0x00};
|
||||||
const gU8 ShortRegData45[] = {OTM8009A_CMD_RAMWR, 0x00};
|
const gU8 ShortRegData45[] = {OTM8009A_CMD_RAMWR, 0x00};
|
||||||
const gU8 ShortRegData46[] = {0xCF, 0x00};
|
const gU8 ShortRegData46[] = {0xCF, 0x00};
|
||||||
const gU8 ShortRegData47[] = {0xC5, 0x66};
|
const gU8 ShortRegData47[] = {0xC5, 0x66};
|
||||||
const gU8 ShortRegData48[] = {OTM8009A_CMD_NOP, 0xB6};
|
const gU8 ShortRegData48[] = {OTM8009A_CMD_NOP, 0xB6};
|
||||||
const gU8 ShortRegData49[] = {0xF5, 0x06};
|
const gU8 ShortRegData49[] = {0xF5, 0x06};
|
||||||
const gU8 ShortRegData50[] = {OTM8009A_CMD_NOP, 0xB1};
|
const gU8 ShortRegData50[] = {OTM8009A_CMD_NOP, 0xB1};
|
||||||
const gU8 ShortRegData51[] = {0xC6, 0x06};
|
const gU8 ShortRegData51[] = {0xC6, 0x06};
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Private macros ------------------------------------------------------------*/
|
/* Private macros ------------------------------------------------------------*/
|
||||||
/* Private functions ---------------------------------------------------------*/
|
/* Private functions ---------------------------------------------------------*/
|
||||||
/** @defgroup OTM8009A_Exported_Variables
|
/** @defgroup OTM8009A_Exported_Variables
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Exported functions ---------------------------------------------------------*/
|
/* Exported functions ---------------------------------------------------------*/
|
||||||
/** @defgroup OTM8009A_Exported_Functions OTM8009A Exported Functions
|
/** @defgroup OTM8009A_Exported_Functions OTM8009A Exported Functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief DSI IO write short/long command.
|
* @brief DSI IO write short/long command.
|
||||||
* @note : Can be surcharged by application code implementation of the function.
|
* @note : Can be surcharged by application code implementation of the function.
|
||||||
*/
|
*/
|
||||||
__weak void DSI_IO_WriteCmd(gU32 NbrParams, gU8 *pParams)
|
__weak void DSI_IO_WriteCmd(gU32 NbrParams, gU8 *pParams)
|
||||||
{
|
{
|
||||||
/* NOTE : This function Should not be modified, when it is needed,
|
/* NOTE : This function Should not be modified, when it is needed,
|
||||||
the DSI_IO_WriteCmd could be implemented in the user file
|
the DSI_IO_WriteCmd could be implemented in the user file
|
||||||
*/
|
*/
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Initializes the LCD KoD display part by communication in DSI mode in Video Mode
|
* @brief Initializes the LCD KoD display part by communication in DSI mode in Video Mode
|
||||||
* with IC Display Driver OTM8009A (see IC Driver specification for more information).
|
* with IC Display Driver OTM8009A (see IC Driver specification for more information).
|
||||||
* @param hdsi_eval : pointer on DSI configuration structure
|
* @param hdsi_eval : pointer on DSI configuration structure
|
||||||
* @param hdsivideo_handle : pointer on DSI video mode configuration structure
|
* @param hdsivideo_handle : pointer on DSI video mode configuration structure
|
||||||
* @retval Status
|
* @retval Status
|
||||||
*/
|
*/
|
||||||
gU8 OTM8009A_Init(gU32 ColorCoding, gU32 orientation)
|
gU8 OTM8009A_Init(gU32 ColorCoding, gU32 orientation)
|
||||||
{
|
{
|
||||||
/* Enable CMD2 to access vendor specific commands */
|
/* Enable CMD2 to access vendor specific commands */
|
||||||
/* Enter in command 2 mode and set EXTC to enable address shift function (0x00) */
|
/* Enter in command 2 mode and set EXTC to enable address shift function (0x00) */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
||||||
DSI_IO_WriteCmd( 3, (gU8 *)lcdRegData1);
|
DSI_IO_WriteCmd( 3, (gU8 *)lcdRegData1);
|
||||||
|
|
||||||
/* Enter ORISE Command 2 */
|
/* Enter ORISE Command 2 */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2); /* Shift address to 0x80 */
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2); /* Shift address to 0x80 */
|
||||||
DSI_IO_WriteCmd( 2, (gU8 *)lcdRegData2);
|
DSI_IO_WriteCmd( 2, (gU8 *)lcdRegData2);
|
||||||
|
|
||||||
/////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////
|
||||||
/* SD_PCH_CTRL - 0xC480h - 129th parameter - Default 0x00 */
|
/* SD_PCH_CTRL - 0xC480h - 129th parameter - Default 0x00 */
|
||||||
/* Set SD_PT */
|
/* Set SD_PT */
|
||||||
/* -> Source output level during porch and non-display area to GND */
|
/* -> Source output level during porch and non-display area to GND */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData3);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData3);
|
||||||
OTM8009A_IO_Delay(10);
|
OTM8009A_IO_Delay(10);
|
||||||
/* Not documented */
|
/* Not documented */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData4);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData4);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData5);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData5);
|
||||||
OTM8009A_IO_Delay(10);
|
OTM8009A_IO_Delay(10);
|
||||||
/////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
/* PWR_CTRL4 - 0xC4B0h - 178th parameter - Default 0xA8 */
|
/* PWR_CTRL4 - 0xC4B0h - 178th parameter - Default 0xA8 */
|
||||||
/* Set gvdd_en_test */
|
/* Set gvdd_en_test */
|
||||||
/* -> enable GVDD test mode !!! */
|
/* -> enable GVDD test mode !!! */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData6);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData6);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData7);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData7);
|
||||||
|
|
||||||
/* PWR_CTRL2 - 0xC590h - 146th parameter - Default 0x79 */
|
/* PWR_CTRL2 - 0xC590h - 146th parameter - Default 0x79 */
|
||||||
/* Set pump 4 vgh voltage */
|
/* Set pump 4 vgh voltage */
|
||||||
/* -> from 15.0v down to 13.0v */
|
/* -> from 15.0v down to 13.0v */
|
||||||
/* Set pump 5 vgh voltage */
|
/* Set pump 5 vgh voltage */
|
||||||
/* -> from -12.0v downto -9.0v */
|
/* -> from -12.0v downto -9.0v */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData8);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData8);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData9);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData9);
|
||||||
|
|
||||||
/* P_DRV_M - 0xC0B4h - 181th parameter - Default 0x00 */
|
/* P_DRV_M - 0xC0B4h - 181th parameter - Default 0x00 */
|
||||||
/* -> Column inversion */
|
/* -> Column inversion */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData10);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData10);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData11);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData11);
|
||||||
|
|
||||||
/* VCOMDC - 0xD900h - 1st parameter - Default 0x39h */
|
/* VCOMDC - 0xD900h - 1st parameter - Default 0x39h */
|
||||||
/* VCOM Voltage settings */
|
/* VCOM Voltage settings */
|
||||||
/* -> from -1.0000v downto -1.2625v */
|
/* -> from -1.0000v downto -1.2625v */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData12);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData12);
|
||||||
|
|
||||||
/* Oscillator adjustment for Idle/Normal mode (LPDT only) set to 65Hz (default is 60Hz) */
|
/* Oscillator adjustment for Idle/Normal mode (LPDT only) set to 65Hz (default is 60Hz) */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData13);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData13);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData14);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData14);
|
||||||
|
|
||||||
/* Video mode internal */
|
/* Video mode internal */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData15);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData15);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData16);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData16);
|
||||||
|
|
||||||
/* PWR_CTRL2 - 0xC590h - 147h parameter - Default 0x00 */
|
/* PWR_CTRL2 - 0xC590h - 147h parameter - Default 0x00 */
|
||||||
/* Set pump 4&5 x6 */
|
/* Set pump 4&5 x6 */
|
||||||
/* -> ONLY VALID when PUMP4_EN_ASDM_HV = "0" */
|
/* -> ONLY VALID when PUMP4_EN_ASDM_HV = "0" */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData17);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData17);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData18);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData18);
|
||||||
|
|
||||||
/* PWR_CTRL2 - 0xC590h - 150th parameter - Default 0x33h */
|
/* PWR_CTRL2 - 0xC590h - 150th parameter - Default 0x33h */
|
||||||
/* Change pump4 clock ratio */
|
/* Change pump4 clock ratio */
|
||||||
/* -> from 1 line to 1/2 line */
|
/* -> from 1 line to 1/2 line */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData19);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData19);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData9);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData9);
|
||||||
|
|
||||||
/* GVDD/NGVDD settings */
|
/* GVDD/NGVDD settings */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
||||||
DSI_IO_WriteCmd( 2, (gU8 *)lcdRegData5);
|
DSI_IO_WriteCmd( 2, (gU8 *)lcdRegData5);
|
||||||
|
|
||||||
/* PWR_CTRL2 - 0xC590h - 149th parameter - Default 0x33h */
|
/* PWR_CTRL2 - 0xC590h - 149th parameter - Default 0x33h */
|
||||||
/* Rewrite the default value ! */
|
/* Rewrite the default value ! */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData20);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData20);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData21);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData21);
|
||||||
|
|
||||||
/* Panel display timing Setting 3 */
|
/* Panel display timing Setting 3 */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData22);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData22);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData23);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData23);
|
||||||
|
|
||||||
/* Power control 1 */
|
/* Power control 1 */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData24);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData24);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData25);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData25);
|
||||||
|
|
||||||
/* Source driver precharge */
|
/* Source driver precharge */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData13);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData13);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData26);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData26);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData15);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData15);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData27);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData27);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData28);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData28);
|
||||||
DSI_IO_WriteCmd( 2, (gU8 *)lcdRegData6);
|
DSI_IO_WriteCmd( 2, (gU8 *)lcdRegData6);
|
||||||
|
|
||||||
/* GOAVST */
|
/* GOAVST */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2);
|
||||||
DSI_IO_WriteCmd( 6, (gU8 *)lcdRegData7);
|
DSI_IO_WriteCmd( 6, (gU8 *)lcdRegData7);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData29);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData29);
|
||||||
DSI_IO_WriteCmd( 14, (gU8 *)lcdRegData8);
|
DSI_IO_WriteCmd( 14, (gU8 *)lcdRegData8);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData30);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData30);
|
||||||
DSI_IO_WriteCmd( 14, (gU8 *)lcdRegData9);
|
DSI_IO_WriteCmd( 14, (gU8 *)lcdRegData9);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData31);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData31);
|
||||||
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData10);
|
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData10);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData32);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData32);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData46);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData46);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2);
|
||||||
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData11);
|
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData11);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData33);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData33);
|
||||||
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData12);
|
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData12);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData29);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData29);
|
||||||
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData13);
|
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData13);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData30);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData30);
|
||||||
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData14);
|
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData14);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData31);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData31);
|
||||||
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData15);
|
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData15);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData32);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData32);
|
||||||
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData16);
|
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData16);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData34);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData34);
|
||||||
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData17);
|
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData17);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData35);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData35);
|
||||||
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData18);
|
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData18);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData2);
|
||||||
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData19);
|
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData19);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData33);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData33);
|
||||||
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData20);
|
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData20);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData29);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData29);
|
||||||
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData21);
|
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData21);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData30);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData30);
|
||||||
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData22);
|
DSI_IO_WriteCmd( 10, (gU8 *)lcdRegData22);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData31);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData31);
|
||||||
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData23);
|
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData23);
|
||||||
|
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData32);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData32);
|
||||||
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData24);
|
DSI_IO_WriteCmd( 15, (gU8 *)lcdRegData24);
|
||||||
|
|
||||||
/////////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////////
|
||||||
/* PWR_CTRL1 - 0xc580h - 130th parameter - default 0x00 */
|
/* PWR_CTRL1 - 0xc580h - 130th parameter - default 0x00 */
|
||||||
/* Pump 1 min and max DM */
|
/* Pump 1 min and max DM */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData13);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData13);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData47);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData47);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData48);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData48);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData49);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData49);
|
||||||
/////////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
/* CABC LEDPWM frequency adjusted to 19,5kHz */
|
/* CABC LEDPWM frequency adjusted to 19,5kHz */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData50);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData50);
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData51);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData51);
|
||||||
|
|
||||||
/* Exit CMD2 mode */
|
/* Exit CMD2 mode */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
||||||
DSI_IO_WriteCmd( 3, (gU8 *)lcdRegData25);
|
DSI_IO_WriteCmd( 3, (gU8 *)lcdRegData25);
|
||||||
|
|
||||||
/*************************************************************************** */
|
/*************************************************************************** */
|
||||||
/* Standard DCS Initialization TO KEEP CAN BE DONE IN HSDT */
|
/* Standard DCS Initialization TO KEEP CAN BE DONE IN HSDT */
|
||||||
/*************************************************************************** */
|
/*************************************************************************** */
|
||||||
|
|
||||||
/* NOP - goes back to DCS std command ? */
|
/* NOP - goes back to DCS std command ? */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
||||||
|
|
||||||
/* Gamma correction 2.2+ table (HSDT possible) */
|
/* Gamma correction 2.2+ table (HSDT possible) */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
||||||
DSI_IO_WriteCmd( 16, (gU8 *)lcdRegData3);
|
DSI_IO_WriteCmd( 16, (gU8 *)lcdRegData3);
|
||||||
|
|
||||||
/* Gamma correction 2.2- table (HSDT possible) */
|
/* Gamma correction 2.2- table (HSDT possible) */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
||||||
DSI_IO_WriteCmd( 16, (gU8 *)lcdRegData4);
|
DSI_IO_WriteCmd( 16, (gU8 *)lcdRegData4);
|
||||||
|
|
||||||
/* Send Sleep Out command to display : no parameter */
|
/* Send Sleep Out command to display : no parameter */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData36);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData36);
|
||||||
|
|
||||||
/* Wait for sleep out exit */
|
/* Wait for sleep out exit */
|
||||||
OTM8009A_IO_Delay(120);
|
OTM8009A_IO_Delay(120);
|
||||||
|
|
||||||
switch(ColorCoding)
|
switch(ColorCoding)
|
||||||
{
|
{
|
||||||
case OTM8009A_FORMAT_RBG565 :
|
case OTM8009A_FORMAT_RBG565 :
|
||||||
/* Set Pixel color format to RGB565 */
|
/* Set Pixel color format to RGB565 */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData37);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData37);
|
||||||
break;
|
break;
|
||||||
case OTM8009A_FORMAT_RGB888 :
|
case OTM8009A_FORMAT_RGB888 :
|
||||||
/* Set Pixel color format to RGB888 */
|
/* Set Pixel color format to RGB888 */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData38);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData38);
|
||||||
break;
|
break;
|
||||||
default :
|
default :
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Send command to configure display in landscape orientation mode. By default
|
/* Send command to configure display in landscape orientation mode. By default
|
||||||
the orientation mode is portrait */
|
the orientation mode is portrait */
|
||||||
if(orientation == OTM8009A_ORIENTATION_LANDSCAPE)
|
if(orientation == OTM8009A_ORIENTATION_LANDSCAPE)
|
||||||
{
|
{
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData39);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData39);
|
||||||
DSI_IO_WriteCmd( 4, (gU8 *)lcdRegData27);
|
DSI_IO_WriteCmd( 4, (gU8 *)lcdRegData27);
|
||||||
DSI_IO_WriteCmd( 4, (gU8 *)lcdRegData28);
|
DSI_IO_WriteCmd( 4, (gU8 *)lcdRegData28);
|
||||||
}
|
}
|
||||||
|
|
||||||
/** CABC : Content Adaptive Backlight Control section start >> */
|
/** CABC : Content Adaptive Backlight Control section start >> */
|
||||||
/* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */
|
/* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData40);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData40);
|
||||||
|
|
||||||
/* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */
|
/* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData41);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData41);
|
||||||
|
|
||||||
/* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */
|
/* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData42);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData42);
|
||||||
|
|
||||||
/* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */
|
/* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData43);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData43);
|
||||||
|
|
||||||
/** CABC : Content Adaptive Backlight Control section end << */
|
/** CABC : Content Adaptive Backlight Control section end << */
|
||||||
|
|
||||||
/* Send Command Display On */
|
/* Send Command Display On */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData44);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData44);
|
||||||
|
|
||||||
/* NOP command */
|
/* NOP command */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData1);
|
||||||
|
|
||||||
/* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */
|
/* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */
|
||||||
/* DSI host from LTDC incoming pixels in video mode */
|
/* DSI host from LTDC incoming pixels in video mode */
|
||||||
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData45);
|
DSI_IO_WriteCmd(0, (gU8 *)ShortRegData45);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
|
@ -1,224 +1,224 @@
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file otm8009a.h
|
* @file otm8009a.h
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @version V1.0.2
|
* @version V1.0.2
|
||||||
* @date 27-January-2017
|
* @date 27-January-2017
|
||||||
* @brief This file contains all the constants parameters for the OTM8009A
|
* @brief This file contains all the constants parameters for the OTM8009A
|
||||||
* which is the LCD Driver for KoD KM-040TMP-02-0621 (WVGA)
|
* which is the LCD Driver for KoD KM-040TMP-02-0621 (WVGA)
|
||||||
* DSI LCD Display.
|
* DSI LCD Display.
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
* are permitted provided that the following conditions are met:
|
* are permitted provided that the following conditions are met:
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer.
|
* this list of conditions and the following disclaimer.
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
* and/or other materials provided with the distribution.
|
* and/or other materials provided with the distribution.
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
* may be used to endorse or promote products derived from this software
|
* may be used to endorse or promote products derived from this software
|
||||||
* without specific prior written permission.
|
* without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __OTM8009A_H
|
#ifndef __OTM8009A_H
|
||||||
#define __OTM8009A_H
|
#define __OTM8009A_H
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
/** @addtogroup BSP
|
/** @addtogroup BSP
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup Components
|
/** @addtogroup Components
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup otm8009a
|
/** @addtogroup otm8009a
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup OTM8009A_Exported_Variables
|
/** @addtogroup OTM8009A_Exported_Variables
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#if defined ( __GNUC__ )
|
#if defined ( __GNUC__ )
|
||||||
#ifndef __weak
|
#ifndef __weak
|
||||||
#define __weak __attribute__((weak))
|
#define __weak __attribute__((weak))
|
||||||
#endif /* __weak */
|
#endif /* __weak */
|
||||||
#endif /* __GNUC__ */
|
#endif /* __GNUC__ */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief LCD_OrientationTypeDef
|
* @brief LCD_OrientationTypeDef
|
||||||
* Possible values of Display Orientation
|
* Possible values of Display Orientation
|
||||||
*/
|
*/
|
||||||
#define OTM8009A_ORIENTATION_PORTRAIT ((gU32)0x00) /* Portrait orientation choice of LCD screen */
|
#define OTM8009A_ORIENTATION_PORTRAIT ((gU32)0x00) /* Portrait orientation choice of LCD screen */
|
||||||
#define OTM8009A_ORIENTATION_LANDSCAPE ((gU32)0x01) /* Landscape orientation choice of LCD screen */
|
#define OTM8009A_ORIENTATION_LANDSCAPE ((gU32)0x01) /* Landscape orientation choice of LCD screen */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Possible values of
|
* @brief Possible values of
|
||||||
* pixel data format (ie color coding) transmitted on DSI Data lane in DSI packets
|
* pixel data format (ie color coding) transmitted on DSI Data lane in DSI packets
|
||||||
*/
|
*/
|
||||||
#define OTM8009A_FORMAT_RGB888 ((gU32)0x00) /* Pixel format chosen is RGB888 : 24 bpp */
|
#define OTM8009A_FORMAT_RGB888 ((gU32)0x00) /* Pixel format chosen is RGB888 : 24 bpp */
|
||||||
#define OTM8009A_FORMAT_RBG565 ((gU32)0x02) /* Pixel format chosen is RGB565 : 16 bpp */
|
#define OTM8009A_FORMAT_RBG565 ((gU32)0x02) /* Pixel format chosen is RGB565 : 16 bpp */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief otm8009a_480x800 Size
|
* @brief otm8009a_480x800 Size
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Width and Height in Portrait mode */
|
/* Width and Height in Portrait mode */
|
||||||
#define OTM8009A_480X800_WIDTH ((gU16)480) /* LCD PIXEL WIDTH */
|
#define OTM8009A_480X800_WIDTH ((gU16)480) /* LCD PIXEL WIDTH */
|
||||||
#define OTM8009A_480X800_HEIGHT ((gU16)800) /* LCD PIXEL HEIGHT */
|
#define OTM8009A_480X800_HEIGHT ((gU16)800) /* LCD PIXEL HEIGHT */
|
||||||
|
|
||||||
/* Width and Height in Landscape mode */
|
/* Width and Height in Landscape mode */
|
||||||
#define OTM8009A_800X480_WIDTH ((gU16)800) /* LCD PIXEL WIDTH */
|
#define OTM8009A_800X480_WIDTH ((gU16)800) /* LCD PIXEL WIDTH */
|
||||||
#define OTM8009A_800X480_HEIGHT ((gU16)480) /* LCD PIXEL HEIGHT */
|
#define OTM8009A_800X480_HEIGHT ((gU16)480) /* LCD PIXEL HEIGHT */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief OTM8009A_480X800 Timing parameters for Portrait orientation mode
|
* @brief OTM8009A_480X800 Timing parameters for Portrait orientation mode
|
||||||
*/
|
*/
|
||||||
#define OTM8009A_480X800_HSYNC ((gU16)2) /* Horizontal synchronization */
|
#define OTM8009A_480X800_HSYNC ((gU16)2) /* Horizontal synchronization */
|
||||||
#define OTM8009A_480X800_HBP ((gU16)34) /* Horizontal back porch */
|
#define OTM8009A_480X800_HBP ((gU16)34) /* Horizontal back porch */
|
||||||
#define OTM8009A_480X800_HFP ((gU16)34) /* Horizontal front porch */
|
#define OTM8009A_480X800_HFP ((gU16)34) /* Horizontal front porch */
|
||||||
#define OTM8009A_480X800_VSYNC ((gU16)1) /* Vertical synchronization */
|
#define OTM8009A_480X800_VSYNC ((gU16)1) /* Vertical synchronization */
|
||||||
#define OTM8009A_480X800_VBP ((gU16)15) /* Vertical back porch */
|
#define OTM8009A_480X800_VBP ((gU16)15) /* Vertical back porch */
|
||||||
#define OTM8009A_480X800_VFP ((gU16)16) /* Vertical front porch */
|
#define OTM8009A_480X800_VFP ((gU16)16) /* Vertical front porch */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief OTM8009A_800X480 Timing parameters for Landscape orientation mode
|
* @brief OTM8009A_800X480 Timing parameters for Landscape orientation mode
|
||||||
* Same values as for Portrait mode in fact.
|
* Same values as for Portrait mode in fact.
|
||||||
*/
|
*/
|
||||||
#define OTM8009A_800X480_HSYNC OTM8009A_480X800_VSYNC /* Horizontal synchronization */
|
#define OTM8009A_800X480_HSYNC OTM8009A_480X800_VSYNC /* Horizontal synchronization */
|
||||||
#define OTM8009A_800X480_HBP OTM8009A_480X800_VBP /* Horizontal back porch */
|
#define OTM8009A_800X480_HBP OTM8009A_480X800_VBP /* Horizontal back porch */
|
||||||
#define OTM8009A_800X480_HFP OTM8009A_480X800_VFP /* Horizontal front porch */
|
#define OTM8009A_800X480_HFP OTM8009A_480X800_VFP /* Horizontal front porch */
|
||||||
#define OTM8009A_800X480_VSYNC OTM8009A_480X800_HSYNC /* Vertical synchronization */
|
#define OTM8009A_800X480_VSYNC OTM8009A_480X800_HSYNC /* Vertical synchronization */
|
||||||
#define OTM8009A_800X480_VBP OTM8009A_480X800_HBP /* Vertical back porch */
|
#define OTM8009A_800X480_VBP OTM8009A_480X800_HBP /* Vertical back porch */
|
||||||
#define OTM8009A_800X480_VFP OTM8009A_480X800_HFP /* Vertical front porch */
|
#define OTM8009A_800X480_VFP OTM8009A_480X800_HFP /* Vertical front porch */
|
||||||
|
|
||||||
|
|
||||||
/* List of OTM8009A used commands */
|
/* List of OTM8009A used commands */
|
||||||
/* Detailed in OTM8009A Data Sheet 'DATA_SHEET_OTM8009A_V0 92.pdf' */
|
/* Detailed in OTM8009A Data Sheet 'DATA_SHEET_OTM8009A_V0 92.pdf' */
|
||||||
/* Version of 14 June 2012 */
|
/* Version of 14 June 2012 */
|
||||||
#define OTM8009A_CMD_NOP 0x00 /* NOP command */
|
#define OTM8009A_CMD_NOP 0x00 /* NOP command */
|
||||||
#define OTM8009A_CMD_SWRESET 0x01 /* Sw reset command */
|
#define OTM8009A_CMD_SWRESET 0x01 /* Sw reset command */
|
||||||
#define OTM8009A_CMD_RDDMADCTL 0x0B /* Read Display MADCTR command : read memory display access ctrl */
|
#define OTM8009A_CMD_RDDMADCTL 0x0B /* Read Display MADCTR command : read memory display access ctrl */
|
||||||
#define OTM8009A_CMD_RDDCOLMOD 0x0C /* Read Display pixel format */
|
#define OTM8009A_CMD_RDDCOLMOD 0x0C /* Read Display pixel format */
|
||||||
#define OTM8009A_CMD_SLPIN 0x10 /* Sleep In command */
|
#define OTM8009A_CMD_SLPIN 0x10 /* Sleep In command */
|
||||||
#define OTM8009A_CMD_SLPOUT 0x11 /* Sleep Out command */
|
#define OTM8009A_CMD_SLPOUT 0x11 /* Sleep Out command */
|
||||||
#define OTM8009A_CMD_PTLON 0x12 /* Partial mode On command */
|
#define OTM8009A_CMD_PTLON 0x12 /* Partial mode On command */
|
||||||
|
|
||||||
#define OTM8009A_CMD_DISPOFF 0x28 /* Display Off command */
|
#define OTM8009A_CMD_DISPOFF 0x28 /* Display Off command */
|
||||||
#define OTM8009A_CMD_DISPON 0x29 /* Display On command */
|
#define OTM8009A_CMD_DISPON 0x29 /* Display On command */
|
||||||
|
|
||||||
#define OTM8009A_CMD_CASET 0x2A /* Column address set command */
|
#define OTM8009A_CMD_CASET 0x2A /* Column address set command */
|
||||||
#define OTM8009A_CMD_PASET 0x2B /* Page address set command */
|
#define OTM8009A_CMD_PASET 0x2B /* Page address set command */
|
||||||
|
|
||||||
#define OTM8009A_CMD_RAMWR 0x2C /* Memory (GRAM) write command */
|
#define OTM8009A_CMD_RAMWR 0x2C /* Memory (GRAM) write command */
|
||||||
#define OTM8009A_CMD_RAMRD 0x2E /* Memory (GRAM) read command */
|
#define OTM8009A_CMD_RAMRD 0x2E /* Memory (GRAM) read command */
|
||||||
|
|
||||||
#define OTM8009A_CMD_PLTAR 0x30 /* Partial area command (4 parameters) */
|
#define OTM8009A_CMD_PLTAR 0x30 /* Partial area command (4 parameters) */
|
||||||
|
|
||||||
#define OTM8009A_CMD_TEOFF 0x34 /* Tearing Effect Line Off command : command with no parameter */
|
#define OTM8009A_CMD_TEOFF 0x34 /* Tearing Effect Line Off command : command with no parameter */
|
||||||
|
|
||||||
#define OTM8009A_CMD_TEEON 0x35 /* Tearing Effect Line On command : command with 1 parameter 'TELOM' */
|
#define OTM8009A_CMD_TEEON 0x35 /* Tearing Effect Line On command : command with 1 parameter 'TELOM' */
|
||||||
|
|
||||||
/* Parameter TELOM : Tearing Effect Line Output Mode : possible values */
|
/* Parameter TELOM : Tearing Effect Line Output Mode : possible values */
|
||||||
#define OTM8009A_TEEON_TELOM_VBLANKING_INFO_ONLY 0x00
|
#define OTM8009A_TEEON_TELOM_VBLANKING_INFO_ONLY 0x00
|
||||||
#define OTM8009A_TEEON_TELOM_VBLANKING_AND_HBLANKING_INFO 0x01
|
#define OTM8009A_TEEON_TELOM_VBLANKING_AND_HBLANKING_INFO 0x01
|
||||||
|
|
||||||
#define OTM8009A_CMD_MADCTR 0x36 /* Memory Access write control command */
|
#define OTM8009A_CMD_MADCTR 0x36 /* Memory Access write control command */
|
||||||
|
|
||||||
/* Possible used values of MADCTR */
|
/* Possible used values of MADCTR */
|
||||||
#define OTM8009A_MADCTR_MODE_PORTRAIT 0x00
|
#define OTM8009A_MADCTR_MODE_PORTRAIT 0x00
|
||||||
#define OTM8009A_MADCTR_MODE_LANDSCAPE 0x60 /* MY = 0, MX = 1, MV = 1, ML = 0, RGB = 0 */
|
#define OTM8009A_MADCTR_MODE_LANDSCAPE 0x60 /* MY = 0, MX = 1, MV = 1, ML = 0, RGB = 0 */
|
||||||
|
|
||||||
#define OTM8009A_CMD_IDMOFF 0x38 /* Idle mode Off command */
|
#define OTM8009A_CMD_IDMOFF 0x38 /* Idle mode Off command */
|
||||||
#define OTM8009A_CMD_IDMON 0x39 /* Idle mode On command */
|
#define OTM8009A_CMD_IDMON 0x39 /* Idle mode On command */
|
||||||
|
|
||||||
#define OTM8009A_CMD_COLMOD 0x3A /* Interface Pixel format command */
|
#define OTM8009A_CMD_COLMOD 0x3A /* Interface Pixel format command */
|
||||||
|
|
||||||
/* Possible values of COLMOD parameter corresponding to used pixel formats */
|
/* Possible values of COLMOD parameter corresponding to used pixel formats */
|
||||||
#define OTM8009A_COLMOD_RGB565 0x55
|
#define OTM8009A_COLMOD_RGB565 0x55
|
||||||
#define OTM8009A_COLMOD_RGB888 0x77
|
#define OTM8009A_COLMOD_RGB888 0x77
|
||||||
|
|
||||||
#define OTM8009A_CMD_RAMWRC 0x3C /* Memory write continue command */
|
#define OTM8009A_CMD_RAMWRC 0x3C /* Memory write continue command */
|
||||||
#define OTM8009A_CMD_RAMRDC 0x3E /* Memory read continue command */
|
#define OTM8009A_CMD_RAMRDC 0x3E /* Memory read continue command */
|
||||||
|
|
||||||
#define OTM8009A_CMD_WRTESCN 0x44 /* Write Tearing Effect Scan line command */
|
#define OTM8009A_CMD_WRTESCN 0x44 /* Write Tearing Effect Scan line command */
|
||||||
#define OTM8009A_CMD_RDSCNL 0x45 /* Read Tearing Effect Scan line command */
|
#define OTM8009A_CMD_RDSCNL 0x45 /* Read Tearing Effect Scan line command */
|
||||||
|
|
||||||
/* CABC Management : ie : Content Adaptive Back light Control in IC OTM8009a */
|
/* CABC Management : ie : Content Adaptive Back light Control in IC OTM8009a */
|
||||||
#define OTM8009A_CMD_WRDISBV 0x51 /* Write Display Brightness command */
|
#define OTM8009A_CMD_WRDISBV 0x51 /* Write Display Brightness command */
|
||||||
#define OTM8009A_CMD_WRCTRLD 0x53 /* Write CTRL Display command */
|
#define OTM8009A_CMD_WRCTRLD 0x53 /* Write CTRL Display command */
|
||||||
#define OTM8009A_CMD_WRCABC 0x55 /* Write Content Adaptive Brightness command */
|
#define OTM8009A_CMD_WRCABC 0x55 /* Write Content Adaptive Brightness command */
|
||||||
#define OTM8009A_CMD_WRCABCMB 0x5E /* Write CABC Minimum Brightness command */
|
#define OTM8009A_CMD_WRCABCMB 0x5E /* Write CABC Minimum Brightness command */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief OTM8009A_480X800 frequency divider
|
* @brief OTM8009A_480X800 frequency divider
|
||||||
*/
|
*/
|
||||||
#define OTM8009A_480X800_FREQUENCY_DIVIDER 2 /* LCD Frequency divider */
|
#define OTM8009A_480X800_FREQUENCY_DIVIDER 2 /* LCD Frequency divider */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Exported macro ------------------------------------------------------------*/
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
|
||||||
/** @defgroup OTM8009A_Exported_Macros OTM8009A Exported Macros
|
/** @defgroup OTM8009A_Exported_Macros OTM8009A Exported Macros
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Exported functions --------------------------------------------------------*/
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
|
||||||
/** @addtogroup OTM8009A_Exported_Functions
|
/** @addtogroup OTM8009A_Exported_Functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
void DSI_IO_WriteCmd(gU32 NbrParams, gU8 *pParams);
|
void DSI_IO_WriteCmd(gU32 NbrParams, gU8 *pParams);
|
||||||
gU8 OTM8009A_Init(gU32 ColorCoding, gU32 orientation);
|
gU8 OTM8009A_Init(gU32 ColorCoding, gU32 orientation);
|
||||||
void OTM8009A_IO_Delay(gU32 Delay);
|
void OTM8009A_IO_Delay(gU32 Delay);
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __OTM8009A_480X800_H */
|
#endif /* __OTM8009A_480X800_H */
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -1,169 +1,169 @@
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file stm32469i_discovery_sdram.h
|
* @file stm32469i_discovery_sdram.h
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @version V2.0.0
|
* @version V2.0.0
|
||||||
* @date 27-January-2017
|
* @date 27-January-2017
|
||||||
* @brief This file contains the common defines and functions prototypes for
|
* @brief This file contains the common defines and functions prototypes for
|
||||||
* the stm32469i_discovery_sdram.c driver.
|
* the stm32469i_discovery_sdram.c driver.
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
* are permitted provided that the following conditions are met:
|
* are permitted provided that the following conditions are met:
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer.
|
* this list of conditions and the following disclaimer.
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
* and/or other materials provided with the distribution.
|
* and/or other materials provided with the distribution.
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
* may be used to endorse or promote products derived from this software
|
* may be used to endorse or promote products derived from this software
|
||||||
* without specific prior written permission.
|
* without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __STM32469I_DISCOVERY_SDRAM_H
|
#ifndef __STM32469I_DISCOVERY_SDRAM_H
|
||||||
#define __STM32469I_DISCOVERY_SDRAM_H
|
#define __STM32469I_DISCOVERY_SDRAM_H
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "stm32f4xx_hal.h"
|
#include "stm32f4xx_hal.h"
|
||||||
|
|
||||||
/** @addtogroup BSP
|
/** @addtogroup BSP
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32469I_Discovery
|
/** @addtogroup STM32469I_Discovery
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32469I-Discovery_SDRAM
|
/** @addtogroup STM32469I-Discovery_SDRAM
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup STM32469I-Discovery_SDRAM_Exported_Types STM32469I Discovery SDRAM Exported Types
|
/** @defgroup STM32469I-Discovery_SDRAM_Exported_Types STM32469I Discovery SDRAM Exported Types
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief SDRAM status structure definition
|
* @brief SDRAM status structure definition
|
||||||
*/
|
*/
|
||||||
#define SDRAM_OK ((gU8)0x00)
|
#define SDRAM_OK ((gU8)0x00)
|
||||||
#define SDRAM_ERROR ((gU8)0x01)
|
#define SDRAM_ERROR ((gU8)0x01)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup STM32469I-Discovery_SDRAM_Exported_Constants STM32469I Discovery SDRAM Exported Constants
|
/** @defgroup STM32469I-Discovery_SDRAM_Exported_Constants STM32469I Discovery SDRAM Exported Constants
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define SDRAM_DEVICE_ADDR ((gU32)0xC0000000)
|
#define SDRAM_DEVICE_ADDR ((gU32)0xC0000000)
|
||||||
|
|
||||||
/* SDRAM device size in Bytes */
|
/* SDRAM device size in Bytes */
|
||||||
#define SDRAM_DEVICE_SIZE ((gU32)0x1000000)
|
#define SDRAM_DEVICE_SIZE ((gU32)0x1000000)
|
||||||
|
|
||||||
#define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_32
|
#define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_32
|
||||||
#define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_2
|
#define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_2
|
||||||
|
|
||||||
/* SDRAM refresh counter (90 MHz SD clock) */
|
/* SDRAM refresh counter (90 MHz SD clock) */
|
||||||
#define REFRESH_COUNT ((gU32)0x0569)
|
#define REFRESH_COUNT ((gU32)0x0569)
|
||||||
#define SDRAM_TIMEOUT ((gU32)0xFFFF)
|
#define SDRAM_TIMEOUT ((gU32)0xFFFF)
|
||||||
|
|
||||||
/* DMA definitions for SDRAM DMA transfer */
|
/* DMA definitions for SDRAM DMA transfer */
|
||||||
#define __DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
|
#define __DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
|
||||||
#define __DMAx_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
|
#define __DMAx_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
|
||||||
#define SDRAM_DMAx_CHANNEL DMA_CHANNEL_0
|
#define SDRAM_DMAx_CHANNEL DMA_CHANNEL_0
|
||||||
#define SDRAM_DMAx_STREAM DMA2_Stream0
|
#define SDRAM_DMAx_STREAM DMA2_Stream0
|
||||||
#define SDRAM_DMAx_IRQn DMA2_Stream0_IRQn
|
#define SDRAM_DMAx_IRQn DMA2_Stream0_IRQn
|
||||||
#define SDRAM_DMAx_IRQHandler DMA2_Stream0_IRQHandler
|
#define SDRAM_DMAx_IRQHandler DMA2_Stream0_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief FMC SDRAM Mode definition register defines
|
* @brief FMC SDRAM Mode definition register defines
|
||||||
*/
|
*/
|
||||||
#define SDRAM_MODEREG_BURST_LENGTH_1 ((gU16)0x0000)
|
#define SDRAM_MODEREG_BURST_LENGTH_1 ((gU16)0x0000)
|
||||||
#define SDRAM_MODEREG_BURST_LENGTH_2 ((gU16)0x0001)
|
#define SDRAM_MODEREG_BURST_LENGTH_2 ((gU16)0x0001)
|
||||||
#define SDRAM_MODEREG_BURST_LENGTH_4 ((gU16)0x0002)
|
#define SDRAM_MODEREG_BURST_LENGTH_4 ((gU16)0x0002)
|
||||||
#define SDRAM_MODEREG_BURST_LENGTH_8 ((gU16)0x0004)
|
#define SDRAM_MODEREG_BURST_LENGTH_8 ((gU16)0x0004)
|
||||||
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((gU16)0x0000)
|
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((gU16)0x0000)
|
||||||
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((gU16)0x0008)
|
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((gU16)0x0008)
|
||||||
#define SDRAM_MODEREG_CAS_LATENCY_2 ((gU16)0x0020)
|
#define SDRAM_MODEREG_CAS_LATENCY_2 ((gU16)0x0020)
|
||||||
#define SDRAM_MODEREG_CAS_LATENCY_3 ((gU16)0x0030)
|
#define SDRAM_MODEREG_CAS_LATENCY_3 ((gU16)0x0030)
|
||||||
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((gU16)0x0000)
|
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((gU16)0x0000)
|
||||||
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((gU16)0x0000)
|
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((gU16)0x0000)
|
||||||
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((gU16)0x0200)
|
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((gU16)0x0200)
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup STM32469I-Discovery_SDRAM_Exported_Macro STM32469I Discovery SDRAM Exported Macro
|
/** @defgroup STM32469I-Discovery_SDRAM_Exported_Macro STM32469I Discovery SDRAM Exported Macro
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32469I_Discovery_SDRAM_Exported_Functions
|
/** @addtogroup STM32469I_Discovery_SDRAM_Exported_Functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
gU8 BSP_SDRAM_Init(void);
|
gU8 BSP_SDRAM_Init(void);
|
||||||
gU8 BSP_SDRAM_DeInit(void);
|
gU8 BSP_SDRAM_DeInit(void);
|
||||||
void BSP_SDRAM_Initialization_sequence(gU32 RefreshCount);
|
void BSP_SDRAM_Initialization_sequence(gU32 RefreshCount);
|
||||||
gU8 BSP_SDRAM_ReadData(gU32 uwStartAddress, gU32 *pData, gU32 uwDataSize);
|
gU8 BSP_SDRAM_ReadData(gU32 uwStartAddress, gU32 *pData, gU32 uwDataSize);
|
||||||
gU8 BSP_SDRAM_ReadData_DMA(gU32 uwStartAddress, gU32 *pData, gU32 uwDataSize);
|
gU8 BSP_SDRAM_ReadData_DMA(gU32 uwStartAddress, gU32 *pData, gU32 uwDataSize);
|
||||||
gU8 BSP_SDRAM_WriteData(gU32 uwStartAddress, gU32 *pData, gU32 uwDataSize);
|
gU8 BSP_SDRAM_WriteData(gU32 uwStartAddress, gU32 *pData, gU32 uwDataSize);
|
||||||
gU8 BSP_SDRAM_WriteData_DMA(gU32 uwStartAddress, gU32 *pData, gU32 uwDataSize);
|
gU8 BSP_SDRAM_WriteData_DMA(gU32 uwStartAddress, gU32 *pData, gU32 uwDataSize);
|
||||||
gU8 BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd);
|
gU8 BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd);
|
||||||
void BSP_SDRAM_DMA_IRQHandler(void);
|
void BSP_SDRAM_DMA_IRQHandler(void);
|
||||||
|
|
||||||
/* These function can be modified in case the current settings (e.g. DMA stream)
|
/* These function can be modified in case the current settings (e.g. DMA stream)
|
||||||
need to be changed for specific application needs */
|
need to be changed for specific application needs */
|
||||||
void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params);
|
void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params);
|
||||||
void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params);
|
void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __STM32469I_DISCOVERY_SDRAM_H */
|
#endif /* __STM32469I_DISCOVERY_SDRAM_H */
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
|
@ -1,176 +1,176 @@
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file Templates_LL/Src/stm32f4xx_it.c
|
* @file Templates_LL/Src/stm32f4xx_it.c
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @version V1.0.0
|
* @version V1.0.0
|
||||||
* @date 17-February-2017
|
* @date 17-February-2017
|
||||||
* @brief Main Interrupt Service Routines.
|
* @brief Main Interrupt Service Routines.
|
||||||
* This file provides template for all exceptions handler and
|
* This file provides template for all exceptions handler and
|
||||||
* peripherals interrupt service routine.
|
* peripherals interrupt service routine.
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
* are permitted provided that the following conditions are met:
|
* are permitted provided that the following conditions are met:
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer.
|
* this list of conditions and the following disclaimer.
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
* and/or other materials provided with the distribution.
|
* and/or other materials provided with the distribution.
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
* may be used to endorse or promote products derived from this software
|
* may be used to endorse or promote products derived from this software
|
||||||
* without specific prior written permission.
|
* without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "stm32f469i_raw32_it.h"
|
#include "stm32f469i_raw32_it.h"
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_LL_Examples
|
/** @addtogroup STM32F4xx_LL_Examples
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup Templates_LL
|
/** @addtogroup Templates_LL
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Private typedef -----------------------------------------------------------*/
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
/* Private define ------------------------------------------------------------*/
|
/* Private define ------------------------------------------------------------*/
|
||||||
/* Private macro -------------------------------------------------------------*/
|
/* Private macro -------------------------------------------------------------*/
|
||||||
/* Private variables ---------------------------------------------------------*/
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
|
||||||
/* Private function prototypes -----------------------------------------------*/
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
/* Private functions ---------------------------------------------------------*/
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
|
||||||
/******************************************************************************/
|
/******************************************************************************/
|
||||||
/* Cortex-M4 Processor Exceptions Handlers */
|
/* Cortex-M4 Processor Exceptions Handlers */
|
||||||
/******************************************************************************/
|
/******************************************************************************/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles NMI exception.
|
* @brief This function handles NMI exception.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void NMI_Handler(void)
|
void NMI_Handler(void)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles Hard Fault exception.
|
* @brief This function handles Hard Fault exception.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void HardFault_Handler(void)
|
void HardFault_Handler(void)
|
||||||
{
|
{
|
||||||
/* Go to infinite loop when Hard Fault exception occurs */
|
/* Go to infinite loop when Hard Fault exception occurs */
|
||||||
while (1)
|
while (1)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles Memory Manage exception.
|
* @brief This function handles Memory Manage exception.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void MemManage_Handler(void)
|
void MemManage_Handler(void)
|
||||||
{
|
{
|
||||||
/* Go to infinite loop when Memory Manage exception occurs */
|
/* Go to infinite loop when Memory Manage exception occurs */
|
||||||
while (1)
|
while (1)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles Bus Fault exception.
|
* @brief This function handles Bus Fault exception.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void BusFault_Handler(void)
|
void BusFault_Handler(void)
|
||||||
{
|
{
|
||||||
/* Go to infinite loop when Bus Fault exception occurs */
|
/* Go to infinite loop when Bus Fault exception occurs */
|
||||||
while (1)
|
while (1)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles Usage Fault exception.
|
* @brief This function handles Usage Fault exception.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void UsageFault_Handler(void)
|
void UsageFault_Handler(void)
|
||||||
{
|
{
|
||||||
/* Go to infinite loop when Usage Fault exception occurs */
|
/* Go to infinite loop when Usage Fault exception occurs */
|
||||||
while (1)
|
while (1)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles SVCall exception.
|
* @brief This function handles SVCall exception.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void SVC_Handler(void)
|
void SVC_Handler(void)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles Debug Monitor exception.
|
* @brief This function handles Debug Monitor exception.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void DebugMon_Handler(void)
|
void DebugMon_Handler(void)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles PendSVC exception.
|
* @brief This function handles PendSVC exception.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void PendSV_Handler(void)
|
void PendSV_Handler(void)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles SysTick Handler.
|
* @brief This function handles SysTick Handler.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void SysTick_Handler(void)
|
void SysTick_Handler(void)
|
||||||
{
|
{
|
||||||
HAL_IncTick();
|
HAL_IncTick();
|
||||||
}
|
}
|
||||||
|
|
||||||
/******************************************************************************/
|
/******************************************************************************/
|
||||||
/* STM32F4xx Peripherals Interrupt Handlers */
|
/* STM32F4xx Peripherals Interrupt Handlers */
|
||||||
/* Add here the Interrupt Handler for the used peripheral(s) (GPIO), for the */
|
/* Add here the Interrupt Handler for the used peripheral(s) (GPIO), for the */
|
||||||
/* available peripheral interrupt handler's name please refer to the startup */
|
/* available peripheral interrupt handler's name please refer to the startup */
|
||||||
/* file (startup_stm32f4xx.s). */
|
/* file (startup_stm32f4xx.s). */
|
||||||
/******************************************************************************/
|
/******************************************************************************/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
|
@ -1,69 +1,69 @@
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file Templates_LL/Inc/stm32f4xx_it.h
|
* @file Templates_LL/Inc/stm32f4xx_it.h
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @version V1.0.0
|
* @version V1.0.0
|
||||||
* @date 17-February-2017
|
* @date 17-February-2017
|
||||||
* @brief This file contains the headers of the interrupt handlers.
|
* @brief This file contains the headers of the interrupt handlers.
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
* are permitted provided that the following conditions are met:
|
* are permitted provided that the following conditions are met:
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer.
|
* this list of conditions and the following disclaimer.
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
* and/or other materials provided with the distribution.
|
* and/or other materials provided with the distribution.
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
* may be used to endorse or promote products derived from this software
|
* may be used to endorse or promote products derived from this software
|
||||||
* without specific prior written permission.
|
* without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __STM32F4xx_IT_H
|
#ifndef __STM32F4xx_IT_H
|
||||||
#define __STM32F4xx_IT_H
|
#define __STM32F4xx_IT_H
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
|
||||||
/* Exported types ------------------------------------------------------------*/
|
/* Exported types ------------------------------------------------------------*/
|
||||||
/* Exported constants --------------------------------------------------------*/
|
/* Exported constants --------------------------------------------------------*/
|
||||||
/* Exported macro ------------------------------------------------------------*/
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
/* Exported functions ------------------------------------------------------- */
|
/* Exported functions ------------------------------------------------------- */
|
||||||
|
|
||||||
void NMI_Handler(void);
|
void NMI_Handler(void);
|
||||||
void HardFault_Handler(void);
|
void HardFault_Handler(void);
|
||||||
void MemManage_Handler(void);
|
void MemManage_Handler(void);
|
||||||
void BusFault_Handler(void);
|
void BusFault_Handler(void);
|
||||||
void UsageFault_Handler(void);
|
void UsageFault_Handler(void);
|
||||||
void SVC_Handler(void);
|
void SVC_Handler(void);
|
||||||
void DebugMon_Handler(void);
|
void DebugMon_Handler(void);
|
||||||
void PendSV_Handler(void);
|
void PendSV_Handler(void);
|
||||||
void SysTick_Handler(void);
|
void SysTick_Handler(void);
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __STM32F4xx_IT_H */
|
#endif /* __STM32F4xx_IT_H */
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
|
@ -1,450 +1,450 @@
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file system_stm32f4xx.c
|
* @file system_stm32f4xx.c
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @version V1.0.0
|
* @version V1.0.0
|
||||||
* @date 17-February-2017
|
* @date 17-February-2017
|
||||||
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
||||||
*
|
*
|
||||||
* This file provides two functions and one global variable to be called from
|
* This file provides two functions and one global variable to be called from
|
||||||
* user application:
|
* user application:
|
||||||
* - SystemInit(): This function is called at startup just after reset and
|
* - SystemInit(): This function is called at startup just after reset and
|
||||||
* before branch to main program. This call is made inside
|
* before branch to main program. This call is made inside
|
||||||
* the "startup_stm32f4xx.s" file.
|
* the "startup_stm32f4xx.s" file.
|
||||||
*
|
*
|
||||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||||
* by the user application to setup the SysTick
|
* by the user application to setup the SysTick
|
||||||
* timer or configure other parameters.
|
* timer or configure other parameters.
|
||||||
*
|
*
|
||||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
* be called whenever the core clock is changed
|
* be called whenever the core clock is changed
|
||||||
* during program execution.
|
* during program execution.
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
* are permitted provided that the following conditions are met:
|
* are permitted provided that the following conditions are met:
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer.
|
* this list of conditions and the following disclaimer.
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
* and/or other materials provided with the distribution.
|
* and/or other materials provided with the distribution.
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
* may be used to endorse or promote products derived from this software
|
* may be used to endorse or promote products derived from this software
|
||||||
* without specific prior written permission.
|
* without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup CMSIS
|
/** @addtogroup CMSIS
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup stm32f4xx_system
|
/** @addtogroup stm32f4xx_system
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_System_Private_Includes
|
/** @addtogroup STM32F4xx_System_Private_Includes
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
#include "stm32f4xx.h"
|
#include "stm32f4xx.h"
|
||||||
|
|
||||||
#if !defined (HSE_VALUE)
|
#if !defined (HSE_VALUE)
|
||||||
#if defined(USE_STM32469I_DISCO_REVA)
|
#if defined(USE_STM32469I_DISCO_REVA)
|
||||||
#define HSE_VALUE ((gU32)25000000) /*!< Default value of the External oscillator in Hz */
|
#define HSE_VALUE ((gU32)25000000) /*!< Default value of the External oscillator in Hz */
|
||||||
#else
|
#else
|
||||||
#define HSE_VALUE ((gU32)8000000) /*!< Default value of the External oscillator in Hz */
|
#define HSE_VALUE ((gU32)8000000) /*!< Default value of the External oscillator in Hz */
|
||||||
#endif /* USE_STM32469I_DISCO_REVA */
|
#endif /* USE_STM32469I_DISCO_REVA */
|
||||||
#endif /* HSE_VALUE */
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
#if !defined (HSI_VALUE)
|
#if !defined (HSI_VALUE)
|
||||||
#define HSI_VALUE ((gU32)16000000) /*!< Value of the Internal oscillator in Hz*/
|
#define HSI_VALUE ((gU32)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
#endif /* HSI_VALUE */
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
|
/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_System_Private_Defines
|
/** @addtogroup STM32F4xx_System_Private_Defines
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/************************* Miscellaneous Configuration ************************/
|
/************************* Miscellaneous Configuration ************************/
|
||||||
/*!< Uncomment the following line if you need to use external SDRAM mounted
|
/*!< Uncomment the following line if you need to use external SDRAM mounted
|
||||||
on DK as data memory */
|
on DK as data memory */
|
||||||
/* #define DATA_IN_ExtSDRAM */
|
/* #define DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||||
Internal SRAM. */
|
Internal SRAM. */
|
||||||
/* #define VECT_TAB_SRAM */
|
/* #define VECT_TAB_SRAM */
|
||||||
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||||
This value must be a multiple of 0x200. */
|
This value must be a multiple of 0x200. */
|
||||||
/******************************************************************************/
|
/******************************************************************************/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_System_Private_Macros
|
/** @addtogroup STM32F4xx_System_Private_Macros
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_System_Private_Variables
|
/** @addtogroup STM32F4xx_System_Private_Variables
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
/* This variable is updated in three ways:
|
/* This variable is updated in three ways:
|
||||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
Note: If you use this function to configure the system clock; then there
|
Note: If you use this function to configure the system clock; then there
|
||||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
variable is updated automatically.
|
variable is updated automatically.
|
||||||
*/
|
*/
|
||||||
gU32 SystemCoreClock = 16000000;
|
gU32 SystemCoreClock = 16000000;
|
||||||
const gU8 AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
const gU8 AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||||
const gU8 APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
const gU8 APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
|
/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#if defined (DATA_IN_ExtSDRAM)
|
#if defined (DATA_IN_ExtSDRAM)
|
||||||
static void SystemInit_ExtMemCtl(void);
|
static void SystemInit_ExtMemCtl(void);
|
||||||
#endif /* DATA_IN_ExtSDRAM */
|
#endif /* DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_System_Private_Functions
|
/** @addtogroup STM32F4xx_System_Private_Functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Setup the microcontroller system
|
* @brief Setup the microcontroller system
|
||||||
* Initialize the FPU setting, vector table location and External memory
|
* Initialize the FPU setting, vector table location and External memory
|
||||||
* configuration.
|
* configuration.
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void SystemInit(void)
|
void SystemInit(void)
|
||||||
{
|
{
|
||||||
/* FPU settings ------------------------------------------------------------*/
|
/* FPU settings ------------------------------------------------------------*/
|
||||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||||
#endif
|
#endif
|
||||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||||
/* Set HSION bit */
|
/* Set HSION bit */
|
||||||
RCC->CR |= (gU32)0x00000001;
|
RCC->CR |= (gU32)0x00000001;
|
||||||
|
|
||||||
/* Reset CFGR register */
|
/* Reset CFGR register */
|
||||||
RCC->CFGR = 0x00000000;
|
RCC->CFGR = 0x00000000;
|
||||||
|
|
||||||
/* Reset HSEON, CSSON and PLLON bits */
|
/* Reset HSEON, CSSON and PLLON bits */
|
||||||
RCC->CR &= (gU32)0xFEF6FFFF;
|
RCC->CR &= (gU32)0xFEF6FFFF;
|
||||||
|
|
||||||
/* Reset PLLCFGR register */
|
/* Reset PLLCFGR register */
|
||||||
RCC->PLLCFGR = 0x24003010;
|
RCC->PLLCFGR = 0x24003010;
|
||||||
|
|
||||||
/* Reset HSEBYP bit */
|
/* Reset HSEBYP bit */
|
||||||
RCC->CR &= (gU32)0xFFFBFFFF;
|
RCC->CR &= (gU32)0xFFFBFFFF;
|
||||||
|
|
||||||
/* Disable all interrupts */
|
/* Disable all interrupts */
|
||||||
RCC->CIR = 0x00000000;
|
RCC->CIR = 0x00000000;
|
||||||
|
|
||||||
#if defined (DATA_IN_ExtSDRAM)
|
#if defined (DATA_IN_ExtSDRAM)
|
||||||
SystemInit_ExtMemCtl();
|
SystemInit_ExtMemCtl();
|
||||||
#endif /* DATA_IN_ExtSDRAM */
|
#endif /* DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
/* Configure the Vector Table location add offset address ------------------*/
|
/* Configure the Vector Table location add offset address ------------------*/
|
||||||
#ifdef VECT_TAB_SRAM
|
#ifdef VECT_TAB_SRAM
|
||||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||||
#else
|
#else
|
||||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||||
* be used by the user application to setup the SysTick timer or configure
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
* other parameters.
|
* other parameters.
|
||||||
*
|
*
|
||||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
* based on this variable will be incorrect.
|
* based on this variable will be incorrect.
|
||||||
*
|
*
|
||||||
* @note - The system frequency computed by this function is not the real
|
* @note - The system frequency computed by this function is not the real
|
||||||
* frequency in the chip. It is calculated based on the predefined
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
* constant and the selected clock source:
|
* constant and the selected clock source:
|
||||||
*
|
*
|
||||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||||
*
|
*
|
||||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
*
|
*
|
||||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||||
*
|
*
|
||||||
* (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
|
* (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
|
||||||
* 16 MHz) but the real value may vary depending on the variations
|
* 16 MHz) but the real value may vary depending on the variations
|
||||||
* in voltage and temperature.
|
* in voltage and temperature.
|
||||||
*
|
*
|
||||||
* (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
|
* (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
|
||||||
* depends on the application requirements), user has to ensure that HSE_VALUE
|
* depends on the application requirements), user has to ensure that HSE_VALUE
|
||||||
* is same as the real frequency of the crystal used. Otherwise, this function
|
* is same as the real frequency of the crystal used. Otherwise, this function
|
||||||
* may have wrong result.
|
* may have wrong result.
|
||||||
*
|
*
|
||||||
* - The result of this function could be not correct when using fractional
|
* - The result of this function could be not correct when using fractional
|
||||||
* value for HSE crystal.
|
* value for HSE crystal.
|
||||||
*
|
*
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void SystemCoreClockUpdate(void)
|
void SystemCoreClockUpdate(void)
|
||||||
{
|
{
|
||||||
gU32 tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
|
gU32 tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
|
||||||
|
|
||||||
/* Get SYSCLK source -------------------------------------------------------*/
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||||
|
|
||||||
switch (tmp)
|
switch (tmp)
|
||||||
{
|
{
|
||||||
case 0x00: /* HSI used as system clock source */
|
case 0x00: /* HSI used as system clock source */
|
||||||
SystemCoreClock = HSI_VALUE;
|
SystemCoreClock = HSI_VALUE;
|
||||||
break;
|
break;
|
||||||
case 0x04: /* HSE used as system clock source */
|
case 0x04: /* HSE used as system clock source */
|
||||||
SystemCoreClock = HSE_VALUE;
|
SystemCoreClock = HSE_VALUE;
|
||||||
break;
|
break;
|
||||||
case 0x08: /* PLL used as system clock source */
|
case 0x08: /* PLL used as system clock source */
|
||||||
|
|
||||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
|
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
|
||||||
SYSCLK = PLL_VCO / PLL_P
|
SYSCLK = PLL_VCO / PLL_P
|
||||||
*/
|
*/
|
||||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
|
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
|
||||||
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
||||||
|
|
||||||
if (pllsource != 0)
|
if (pllsource != 0)
|
||||||
{
|
{
|
||||||
/* HSE used as PLL clock source */
|
/* HSE used as PLL clock source */
|
||||||
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* HSI used as PLL clock source */
|
/* HSI used as PLL clock source */
|
||||||
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||||
}
|
}
|
||||||
|
|
||||||
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
|
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
|
||||||
SystemCoreClock = pllvco/pllp;
|
SystemCoreClock = pllvco/pllp;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
SystemCoreClock = HSI_VALUE;
|
SystemCoreClock = HSI_VALUE;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
/* Compute HCLK frequency --------------------------------------------------*/
|
/* Compute HCLK frequency --------------------------------------------------*/
|
||||||
/* Get HCLK prescaler */
|
/* Get HCLK prescaler */
|
||||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||||
/* HCLK frequency */
|
/* HCLK frequency */
|
||||||
SystemCoreClock >>= tmp;
|
SystemCoreClock >>= tmp;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined (DATA_IN_ExtSDRAM)
|
#if defined (DATA_IN_ExtSDRAM)
|
||||||
/**
|
/**
|
||||||
* @brief Setup the external memory controller.
|
* @brief Setup the external memory controller.
|
||||||
* Called in startup_stm32f4xx.s before jump to main.
|
* Called in startup_stm32f4xx.s before jump to main.
|
||||||
* This function configures the external memories (SRAM/SDRAM)
|
* This function configures the external memories (SRAM/SDRAM)
|
||||||
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
|
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
|
||||||
* @param None
|
* @param None
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
void SystemInit_ExtMemCtl(void)
|
void SystemInit_ExtMemCtl(void)
|
||||||
{
|
{
|
||||||
register gU32 tmpreg = 0, timeout = 0xFFFF;
|
register gU32 tmpreg = 0, timeout = 0xFFFF;
|
||||||
register __IO gU32 index;
|
register __IO gU32 index;
|
||||||
|
|
||||||
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, and GPIOI interface
|
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, and GPIOI interface
|
||||||
clock */
|
clock */
|
||||||
RCC->AHB1ENR |= 0x000001FC;
|
RCC->AHB1ENR |= 0x000001FC;
|
||||||
|
|
||||||
/* Connect PCx pins to FMC Alternate function */
|
/* Connect PCx pins to FMC Alternate function */
|
||||||
GPIOC->AFR[0] = 0x0000000C;
|
GPIOC->AFR[0] = 0x0000000C;
|
||||||
GPIOC->AFR[1] = 0x00000000;
|
GPIOC->AFR[1] = 0x00000000;
|
||||||
/* Configure PCx pins in Alternate function mode */
|
/* Configure PCx pins in Alternate function mode */
|
||||||
GPIOC->MODER = 0x00000002;
|
GPIOC->MODER = 0x00000002;
|
||||||
/* Configure PCx pins speed to 100 MHz */
|
/* Configure PCx pins speed to 100 MHz */
|
||||||
GPIOC->OSPEEDR = 0x00000003;
|
GPIOC->OSPEEDR = 0x00000003;
|
||||||
/* Configure PCx pins Output type to push-pull */
|
/* Configure PCx pins Output type to push-pull */
|
||||||
GPIOC->OTYPER = 0x00000000;
|
GPIOC->OTYPER = 0x00000000;
|
||||||
/* No pull-up, pull-down for PCx pins */
|
/* No pull-up, pull-down for PCx pins */
|
||||||
GPIOC->PUPDR = 0x00000000;
|
GPIOC->PUPDR = 0x00000000;
|
||||||
|
|
||||||
/* Connect PDx pins to FMC Alternate function */
|
/* Connect PDx pins to FMC Alternate function */
|
||||||
GPIOD->AFR[0] = 0x000000CC;
|
GPIOD->AFR[0] = 0x000000CC;
|
||||||
GPIOD->AFR[1] = 0xCC000CCC;
|
GPIOD->AFR[1] = 0xCC000CCC;
|
||||||
/* Configure PDx pins in Alternate function mode */
|
/* Configure PDx pins in Alternate function mode */
|
||||||
GPIOD->MODER = 0xA02A000A;
|
GPIOD->MODER = 0xA02A000A;
|
||||||
/* Configure PDx pins speed to 100 MHz */
|
/* Configure PDx pins speed to 100 MHz */
|
||||||
GPIOD->OSPEEDR = 0xF03F000F;
|
GPIOD->OSPEEDR = 0xF03F000F;
|
||||||
/* Configure PDx pins Output type to push-pull */
|
/* Configure PDx pins Output type to push-pull */
|
||||||
GPIOD->OTYPER = 0x00000000;
|
GPIOD->OTYPER = 0x00000000;
|
||||||
/* No pull-up, pull-down for PDx pins */
|
/* No pull-up, pull-down for PDx pins */
|
||||||
GPIOD->PUPDR = 0x00000000;
|
GPIOD->PUPDR = 0x00000000;
|
||||||
|
|
||||||
/* Connect PEx pins to FMC Alternate function */
|
/* Connect PEx pins to FMC Alternate function */
|
||||||
GPIOE->AFR[0] = 0xC00000CC;
|
GPIOE->AFR[0] = 0xC00000CC;
|
||||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||||
/* Configure PEx pins in Alternate function mode */
|
/* Configure PEx pins in Alternate function mode */
|
||||||
GPIOE->MODER = 0xAAAA800A;
|
GPIOE->MODER = 0xAAAA800A;
|
||||||
/* Configure PEx pins speed to 100 MHz */
|
/* Configure PEx pins speed to 100 MHz */
|
||||||
GPIOE->OSPEEDR = 0xFFFFC00F;
|
GPIOE->OSPEEDR = 0xFFFFC00F;
|
||||||
/* Configure PEx pins Output type to push-pull */
|
/* Configure PEx pins Output type to push-pull */
|
||||||
GPIOE->OTYPER = 0x00000000;
|
GPIOE->OTYPER = 0x00000000;
|
||||||
/* No pull-up, pull-down for PEx pins */
|
/* No pull-up, pull-down for PEx pins */
|
||||||
GPIOE->PUPDR = 0x00000000;
|
GPIOE->PUPDR = 0x00000000;
|
||||||
|
|
||||||
/* Connect PFx pins to FMC Alternate function */
|
/* Connect PFx pins to FMC Alternate function */
|
||||||
GPIOF->AFR[0] = 0x00CCCCCC;
|
GPIOF->AFR[0] = 0x00CCCCCC;
|
||||||
GPIOF->AFR[1] = 0xCCCCC000;
|
GPIOF->AFR[1] = 0xCCCCC000;
|
||||||
/* Configure PFx pins in Alternate function mode */
|
/* Configure PFx pins in Alternate function mode */
|
||||||
GPIOF->MODER = 0xAA800AAA;
|
GPIOF->MODER = 0xAA800AAA;
|
||||||
/* Configure PFx pins speed to 100 MHz */
|
/* Configure PFx pins speed to 100 MHz */
|
||||||
GPIOF->OSPEEDR = 0xFFC00FFF;
|
GPIOF->OSPEEDR = 0xFFC00FFF;
|
||||||
/* Configure PFx pins Output type to push-pull */
|
/* Configure PFx pins Output type to push-pull */
|
||||||
GPIOF->OTYPER = 0x00000000;
|
GPIOF->OTYPER = 0x00000000;
|
||||||
/* No pull-up, pull-down for PFx pins */
|
/* No pull-up, pull-down for PFx pins */
|
||||||
GPIOF->PUPDR = 0x00000000;
|
GPIOF->PUPDR = 0x00000000;
|
||||||
|
|
||||||
/* Connect PGx pins to FMC Alternate function */
|
/* Connect PGx pins to FMC Alternate function */
|
||||||
GPIOG->AFR[0] = 0x00CC00CC;
|
GPIOG->AFR[0] = 0x00CC00CC;
|
||||||
GPIOG->AFR[1] = 0xC000000C;
|
GPIOG->AFR[1] = 0xC000000C;
|
||||||
/* Configure PGx pins in Alternate function mode */
|
/* Configure PGx pins in Alternate function mode */
|
||||||
GPIOG->MODER = 0x80020A0A;
|
GPIOG->MODER = 0x80020A0A;
|
||||||
/* Configure PGx pins speed to 100 MHz */
|
/* Configure PGx pins speed to 100 MHz */
|
||||||
GPIOG->OSPEEDR = 0xC0030F0F;
|
GPIOG->OSPEEDR = 0xC0030F0F;
|
||||||
/* Configure PGx pins Output type to push-pull */
|
/* Configure PGx pins Output type to push-pull */
|
||||||
GPIOG->OTYPER = 0x00000000;
|
GPIOG->OTYPER = 0x00000000;
|
||||||
/* No pull-up, pull-down for PGx pins */
|
/* No pull-up, pull-down for PGx pins */
|
||||||
GPIOG->PUPDR = 0x00000000;
|
GPIOG->PUPDR = 0x00000000;
|
||||||
|
|
||||||
/* Connect PHx pins to FMC Alternate function */
|
/* Connect PHx pins to FMC Alternate function */
|
||||||
GPIOH->AFR[0] = 0x0000CC00;
|
GPIOH->AFR[0] = 0x0000CC00;
|
||||||
GPIOH->AFR[1] = 0xCCCCCCCC;
|
GPIOH->AFR[1] = 0xCCCCCCCC;
|
||||||
/* Configure PHx pins in Alternate function mode */
|
/* Configure PHx pins in Alternate function mode */
|
||||||
GPIOH->MODER = 0xAAAA00A0;
|
GPIOH->MODER = 0xAAAA00A0;
|
||||||
/* Configure PHx pins speed to 100 MHz */
|
/* Configure PHx pins speed to 100 MHz */
|
||||||
GPIOH->OSPEEDR = 0xFFFF00F0;
|
GPIOH->OSPEEDR = 0xFFFF00F0;
|
||||||
/* Configure PHx pins Output type to push-pull */
|
/* Configure PHx pins Output type to push-pull */
|
||||||
GPIOH->OTYPER = 0x00000000;
|
GPIOH->OTYPER = 0x00000000;
|
||||||
/* No pull-up, pull-down for PHx pins */
|
/* No pull-up, pull-down for PHx pins */
|
||||||
GPIOH->PUPDR = 0x00000000;
|
GPIOH->PUPDR = 0x00000000;
|
||||||
|
|
||||||
/* Connect PIx pins to FMC Alternate function */
|
/* Connect PIx pins to FMC Alternate function */
|
||||||
GPIOI->AFR[0] = 0xCCCCCCCC;
|
GPIOI->AFR[0] = 0xCCCCCCCC;
|
||||||
GPIOI->AFR[1] = 0x00000CC0;
|
GPIOI->AFR[1] = 0x00000CC0;
|
||||||
/* Configure PIx pins in Alternate function mode */
|
/* Configure PIx pins in Alternate function mode */
|
||||||
GPIOI->MODER = 0x0028AAAA;
|
GPIOI->MODER = 0x0028AAAA;
|
||||||
/* Configure PIx pins speed to 100 MHz */
|
/* Configure PIx pins speed to 100 MHz */
|
||||||
GPIOI->OSPEEDR = 0x003CFFFF;
|
GPIOI->OSPEEDR = 0x003CFFFF;
|
||||||
/* Configure PIx pins Output type to push-pull */
|
/* Configure PIx pins Output type to push-pull */
|
||||||
GPIOI->OTYPER = 0x00000000;
|
GPIOI->OTYPER = 0x00000000;
|
||||||
/* No pull-up, pull-down for PIx pins */
|
/* No pull-up, pull-down for PIx pins */
|
||||||
GPIOI->PUPDR = 0x00000000;
|
GPIOI->PUPDR = 0x00000000;
|
||||||
|
|
||||||
/* FMC Configuration */
|
/* FMC Configuration */
|
||||||
/* Enable the FMC interface clock */
|
/* Enable the FMC interface clock */
|
||||||
RCC->AHB3ENR |= 0x00000001;
|
RCC->AHB3ENR |= 0x00000001;
|
||||||
|
|
||||||
/* Configure and enable SDRAM bank2 */
|
/* Configure and enable SDRAM bank2 */
|
||||||
FMC_Bank5_6->SDCR[0] = 0x000019E4;
|
FMC_Bank5_6->SDCR[0] = 0x000019E4;
|
||||||
FMC_Bank5_6->SDTR[0] = 0x01115351;
|
FMC_Bank5_6->SDTR[0] = 0x01115351;
|
||||||
|
|
||||||
/* SDRAM initialization sequence */
|
/* SDRAM initialization sequence */
|
||||||
/* Clock enable command */
|
/* Clock enable command */
|
||||||
FMC_Bank5_6->SDCMR = 0x00000011;
|
FMC_Bank5_6->SDCMR = 0x00000011;
|
||||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
while((tmpreg != 0) && (timeout-- > 0))
|
while((tmpreg != 0) && (timeout-- > 0))
|
||||||
{
|
{
|
||||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Delay */
|
/* Delay */
|
||||||
for (index = 0; index<1000; index++);
|
for (index = 0; index<1000; index++);
|
||||||
|
|
||||||
/* PALL command */
|
/* PALL command */
|
||||||
FMC_Bank5_6->SDCMR = 0x00000012;
|
FMC_Bank5_6->SDCMR = 0x00000012;
|
||||||
timeout = 0xFFFF;
|
timeout = 0xFFFF;
|
||||||
while((tmpreg != 0) && (timeout-- > 0))
|
while((tmpreg != 0) && (timeout-- > 0))
|
||||||
{
|
{
|
||||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Auto refresh command */
|
/* Auto refresh command */
|
||||||
FMC_Bank5_6->SDCMR = 0x000000F3;
|
FMC_Bank5_6->SDCMR = 0x000000F3;
|
||||||
timeout = 0xFFFF;
|
timeout = 0xFFFF;
|
||||||
while((tmpreg != 0) && (timeout-- > 0))
|
while((tmpreg != 0) && (timeout-- > 0))
|
||||||
{
|
{
|
||||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* MRD register program */
|
/* MRD register program */
|
||||||
FMC_Bank5_6->SDCMR = 0x00046014;
|
FMC_Bank5_6->SDCMR = 0x00046014;
|
||||||
timeout = 0xFFFF;
|
timeout = 0xFFFF;
|
||||||
while((tmpreg != 0) && (timeout-- > 0))
|
while((tmpreg != 0) && (timeout-- > 0))
|
||||||
{
|
{
|
||||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set refresh count */
|
/* Set refresh count */
|
||||||
tmpreg = FMC_Bank5_6->SDRTR;
|
tmpreg = FMC_Bank5_6->SDRTR;
|
||||||
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000056A<<1));
|
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000056A<<1));
|
||||||
|
|
||||||
/* Disable write protection */
|
/* Disable write protection */
|
||||||
tmpreg = FMC_Bank5_6->SDCR[0];
|
tmpreg = FMC_Bank5_6->SDCR[0];
|
||||||
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
|
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
|
||||||
}
|
}
|
||||||
#endif /* DATA_IN_ExtSDRAM */
|
#endif /* DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
|
@ -1,69 +1,69 @@
|
||||||
#include "../../../gfx.h"
|
#include "../../../gfx.h"
|
||||||
#if GFX_COMPAT_V2 && GFX_COMPAT_OLDCOLORS
|
#if GFX_COMPAT_V2 && GFX_COMPAT_OLDCOLORS
|
||||||
#undef Red
|
#undef Red
|
||||||
#undef Green
|
#undef Green
|
||||||
#undef Blue
|
#undef Blue
|
||||||
#endif
|
#endif
|
||||||
#include "stm32f7xx_hal.h"
|
#include "stm32f7xx_hal.h"
|
||||||
|
|
||||||
#if GFX_USE_OS_CHIBIOS
|
#if GFX_USE_OS_CHIBIOS
|
||||||
#define HAL_GPIO_Init(port, ptr) palSetGroupMode(port, (ptr)->Pin, 0, (ptr)->Mode|((ptr)->Speed<<3)|((ptr)->Pull<<5)|((ptr)->Alternate<<7))
|
#define HAL_GPIO_Init(port, ptr) palSetGroupMode(port, (ptr)->Pin, 0, (ptr)->Mode|((ptr)->Speed<<3)|((ptr)->Pull<<5)|((ptr)->Alternate<<7))
|
||||||
#else
|
#else
|
||||||
gTicks gfxSystemTicks(void)
|
gTicks gfxSystemTicks(void)
|
||||||
{
|
{
|
||||||
return HAL_GetTick();
|
return HAL_GetTick();
|
||||||
}
|
}
|
||||||
|
|
||||||
gTicks gfxMillisecondsToTicks(gDelay ms)
|
gTicks gfxMillisecondsToTicks(gDelay ms)
|
||||||
{
|
{
|
||||||
return ms;
|
return ms;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
void SystemClock_Config(void)
|
void SystemClock_Config(void)
|
||||||
{
|
{
|
||||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
|
||||||
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||||
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
|
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLM = 25;
|
RCC_OscInitStruct.PLL.PLLM = 25;
|
||||||
RCC_OscInitStruct.PLL.PLLN = 432;
|
RCC_OscInitStruct.PLL.PLLN = 432;
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 9;
|
RCC_OscInitStruct.PLL.PLLQ = 9;
|
||||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||||
|
|
||||||
/* Activate the OverDrive to reach the 216 MHz Frequency */
|
/* Activate the OverDrive to reach the 216 MHz Frequency */
|
||||||
HAL_PWREx_EnableOverDrive();
|
HAL_PWREx_EnableOverDrive();
|
||||||
|
|
||||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
|
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Raw32OSInit(void)
|
void Raw32OSInit(void)
|
||||||
{
|
{
|
||||||
/* Enable the CPU Cache's */
|
/* Enable the CPU Cache's */
|
||||||
SCB_EnableICache(); // Enable I-Cache
|
SCB_EnableICache(); // Enable I-Cache
|
||||||
SCB_EnableDCache(); // Enable D-Cache
|
SCB_EnableDCache(); // Enable D-Cache
|
||||||
|
|
||||||
|
|
||||||
/* STM32F7xx HAL library initialization:
|
/* STM32F7xx HAL library initialization:
|
||||||
- Configure the Flash ART accelerator on ITCM interface
|
- Configure the Flash ART accelerator on ITCM interface
|
||||||
- Configure the Systick to generate an interrupt each 1 msec
|
- Configure the Systick to generate an interrupt each 1 msec
|
||||||
- Set NVIC Group Priority to 4
|
- Set NVIC Group Priority to 4
|
||||||
- Global MSP (MCU Support Package) initialization
|
- Global MSP (MCU Support Package) initialization
|
||||||
*/
|
*/
|
||||||
HAL_Init();
|
HAL_Init();
|
||||||
|
|
||||||
/* Configure the system clock to 216 MHz */
|
/* Configure the system clock to 216 MHz */
|
||||||
SystemClock_Config();
|
SystemClock_Config();
|
||||||
}
|
}
|
||||||
|
|
1026
changelog.txt
1026
changelog.txt
File diff suppressed because it is too large
Load Diff
|
@ -1,78 +0,0 @@
|
||||||
# Define UGFX_ROOT
|
|
||||||
set(UGFX_ROOT ${CMAKE_CURRENT_LIST_DIR}/..)
|
|
||||||
|
|
||||||
# Ensure that UGFX_ROOT is set
|
|
||||||
if(NOT UGFX_ROOT)
|
|
||||||
message(FATAL_ERROR "No UGFX_ROOT specified")
|
|
||||||
endif()
|
|
||||||
|
|
||||||
# Assemble list of components
|
|
||||||
list(APPEND ugfx_COMPONENTS_BUILTIN
|
|
||||||
gadc
|
|
||||||
gaudio
|
|
||||||
gdisp
|
|
||||||
gdriver
|
|
||||||
gevent
|
|
||||||
gfile
|
|
||||||
ginput
|
|
||||||
gmisc
|
|
||||||
gos
|
|
||||||
gqueue
|
|
||||||
gtimer
|
|
||||||
gtrans
|
|
||||||
gwin
|
|
||||||
)
|
|
||||||
|
|
||||||
# Core sources
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${UGFX_ROOT}/src/gfx.c
|
|
||||||
)
|
|
||||||
|
|
||||||
# Core include directories
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${UGFX_ROOT}
|
|
||||||
${UGFX_ROOT}/src
|
|
||||||
)
|
|
||||||
|
|
||||||
# Include each built-in component
|
|
||||||
foreach(component ${ugfx_COMPONENTS_BUILTIN})
|
|
||||||
include(${UGFX_ROOT}/src/${component}/${component}.cmake)
|
|
||||||
endforeach()
|
|
||||||
|
|
||||||
# Include each component
|
|
||||||
foreach(component ${ugfx_FIND_COMPONENTS})
|
|
||||||
include(${UGFX_ROOT}/${component}/driver.cmake)
|
|
||||||
endforeach()
|
|
||||||
|
|
||||||
# Remove duplicates from non-cached variables
|
|
||||||
list(REMOVE_DUPLICATES ugfx_SOURCES)
|
|
||||||
list(REMOVE_DUPLICATES ugfx_INCLUDE_DIRS)
|
|
||||||
|
|
||||||
# Outsource heavy-lifting to cmake
|
|
||||||
include(FindPackageHandleStandardArgs)
|
|
||||||
find_package_handle_standard_args(ugfx DEFAULT_MSG UGFX_ROOT ugfx_SOURCES ugfx_INCLUDE_DIRS)
|
|
||||||
|
|
||||||
# Create the target
|
|
||||||
if(NOT TARGET ugfx)
|
|
||||||
add_library(ugfx INTERFACE IMPORTED)
|
|
||||||
endif()
|
|
||||||
target_include_directories(
|
|
||||||
ugfx
|
|
||||||
INTERFACE
|
|
||||||
${ugfx_INCLUDE_DIRS}
|
|
||||||
)
|
|
||||||
target_sources(
|
|
||||||
ugfx
|
|
||||||
INTERFACE
|
|
||||||
${ugfx_SOURCES}
|
|
||||||
)
|
|
||||||
target_compile_definitions(
|
|
||||||
ugfx
|
|
||||||
INTERFACE
|
|
||||||
${ugfx_DEFS}
|
|
||||||
)
|
|
||||||
target_link_libraries(
|
|
||||||
ugfx
|
|
||||||
INTERFACE
|
|
||||||
${ugfx_LIBS}
|
|
||||||
)
|
|
|
@ -1,45 +1,45 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GFXCONF_H
|
#ifndef _GFXCONF_H
|
||||||
#define _GFXCONF_H
|
#define _GFXCONF_H
|
||||||
|
|
||||||
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
||||||
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
||||||
//#define GFX_USE_OS_WIN32 GFXOFF
|
//#define GFX_USE_OS_WIN32 GFXOFF
|
||||||
//#define GFX_USE_OS_LINUX GFXOFF
|
//#define GFX_USE_OS_LINUX GFXOFF
|
||||||
//#define GFX_USE_OS_OSX GFXOFF
|
//#define GFX_USE_OS_OSX GFXOFF
|
||||||
|
|
||||||
/* GFX sub-systems to turn on */
|
/* GFX sub-systems to turn on */
|
||||||
#define GFX_USE_GDISP GFXON
|
#define GFX_USE_GDISP GFXON
|
||||||
|
|
||||||
/* Features for the GDISP sub-system. */
|
/* Features for the GDISP sub-system. */
|
||||||
#define GDISP_NEED_VALIDATION GFXON
|
#define GDISP_NEED_VALIDATION GFXON
|
||||||
|
|
||||||
#endif /* _GFXCONF_H */
|
#endif /* _GFXCONF_H */
|
||||||
|
|
|
@ -1,83 +1,83 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "gfx.h"
|
#include "gfx.h"
|
||||||
|
|
||||||
void mandelbrot(float x1, float y1, float x2, float y2) {
|
void mandelbrot(float x1, float y1, float x2, float y2) {
|
||||||
unsigned int i,j, width, height;
|
unsigned int i,j, width, height;
|
||||||
gU16 iter;
|
gU16 iter;
|
||||||
gColor color;
|
gColor color;
|
||||||
float fwidth, fheight;
|
float fwidth, fheight;
|
||||||
|
|
||||||
float sy = y2 - y1;
|
float sy = y2 - y1;
|
||||||
float sx = x2 - x1;
|
float sx = x2 - x1;
|
||||||
const int MAX = 512;
|
const int MAX = 512;
|
||||||
|
|
||||||
width = (unsigned int)gdispGetWidth();
|
width = (unsigned int)gdispGetWidth();
|
||||||
height = (unsigned int)gdispGetHeight();
|
height = (unsigned int)gdispGetHeight();
|
||||||
fwidth = width;
|
fwidth = width;
|
||||||
fheight = height;
|
fheight = height;
|
||||||
|
|
||||||
for(i = 0; i < width; i++) {
|
for(i = 0; i < width; i++) {
|
||||||
for(j = 0; j < height; j++) {
|
for(j = 0; j < height; j++) {
|
||||||
float cy = j * sy / fheight + y1;
|
float cy = j * sy / fheight + y1;
|
||||||
float cx = i * sx / fwidth + x1;
|
float cx = i * sx / fwidth + x1;
|
||||||
float x=0.0f, y=0.0f, xx=0.0f, yy=0.0f;
|
float x=0.0f, y=0.0f, xx=0.0f, yy=0.0f;
|
||||||
for(iter=0; iter <= MAX && xx+yy<4.0f; iter++) {
|
for(iter=0; iter <= MAX && xx+yy<4.0f; iter++) {
|
||||||
xx = x*x;
|
xx = x*x;
|
||||||
yy = y*y;
|
yy = y*y;
|
||||||
y = 2.0f*x*y + cy;
|
y = 2.0f*x*y + cy;
|
||||||
x = xx - yy + cx;
|
x = xx - yy + cx;
|
||||||
}
|
}
|
||||||
//color = ((iter << 8) | (iter&0xFF));
|
//color = ((iter << 8) | (iter&0xFF));
|
||||||
color = RGB2COLOR(iter<<7, iter<<4, iter);
|
color = RGB2COLOR(iter<<7, iter<<4, iter);
|
||||||
gdispDrawPixel(i, j, color);
|
gdispDrawPixel(i, j, color);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int main(void) {
|
int main(void) {
|
||||||
float cx, cy;
|
float cx, cy;
|
||||||
float zoom = 1.0f;
|
float zoom = 1.0f;
|
||||||
|
|
||||||
gfxInit();
|
gfxInit();
|
||||||
|
|
||||||
/* where to zoom in */
|
/* where to zoom in */
|
||||||
cx = -0.086f;
|
cx = -0.086f;
|
||||||
cy = 0.85f;
|
cy = 0.85f;
|
||||||
|
|
||||||
while(1) {
|
while(1) {
|
||||||
mandelbrot(-2.0f*zoom+cx, -1.5f*zoom+cy, 2.0f*zoom+cx, 1.5f*zoom+cy);
|
mandelbrot(-2.0f*zoom+cx, -1.5f*zoom+cy, 2.0f*zoom+cx, 1.5f*zoom+cy);
|
||||||
|
|
||||||
zoom *= 0.7f;
|
zoom *= 0.7f;
|
||||||
if(zoom <= 0.00001f)
|
if(zoom <= 0.00001f)
|
||||||
zoom = 1.0f;
|
zoom = 1.0f;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,60 +1,60 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GFXCONF_H
|
#ifndef _GFXCONF_H
|
||||||
#define _GFXCONF_H
|
#define _GFXCONF_H
|
||||||
|
|
||||||
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
||||||
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
||||||
//#define GFX_USE_OS_WIN32 GFXOFF
|
//#define GFX_USE_OS_WIN32 GFXOFF
|
||||||
//#define GFX_USE_OS_LINUX GFXOFF
|
//#define GFX_USE_OS_LINUX GFXOFF
|
||||||
//#define GFX_USE_OS_OSX GFXOFF
|
//#define GFX_USE_OS_OSX GFXOFF
|
||||||
|
|
||||||
/* GFX sub-systems to turn on */
|
/* GFX sub-systems to turn on */
|
||||||
#define GFX_USE_GDISP GFXON
|
#define GFX_USE_GDISP GFXON
|
||||||
#define GFX_USE_GEVENT GFXON
|
#define GFX_USE_GEVENT GFXON
|
||||||
#define GFX_USE_GTIMER GFXON
|
#define GFX_USE_GTIMER GFXON
|
||||||
#define GFX_USE_GINPUT GFXON
|
#define GFX_USE_GINPUT GFXON
|
||||||
|
|
||||||
/* Features for the GDISP sub-system. */
|
/* Features for the GDISP sub-system. */
|
||||||
#define GDISP_NEED_VALIDATION GFXON
|
#define GDISP_NEED_VALIDATION GFXON
|
||||||
#define GDISP_NEED_CLIP GFXON
|
#define GDISP_NEED_CLIP GFXON
|
||||||
#define GDISP_NEED_TEXT GFXON
|
#define GDISP_NEED_TEXT GFXON
|
||||||
#define GDISP_NEED_CIRCLE GFXON
|
#define GDISP_NEED_CIRCLE GFXON
|
||||||
#define GDISP_NEED_MULTITHREAD GFXON
|
#define GDISP_NEED_MULTITHREAD GFXON
|
||||||
|
|
||||||
/* Builtin Fonts */
|
/* Builtin Fonts */
|
||||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS12_AA GFXON
|
#define GDISP_INCLUDE_FONT_DEJAVUSANS12_AA GFXON
|
||||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS24_AA GFXON
|
#define GDISP_INCLUDE_FONT_DEJAVUSANS24_AA GFXON
|
||||||
#define GDISP_NEED_ANTIALIAS GFXON
|
#define GDISP_NEED_ANTIALIAS GFXON
|
||||||
|
|
||||||
/* Features for the GINPUT sub-system. */
|
/* Features for the GINPUT sub-system. */
|
||||||
#define GINPUT_NEED_MOUSE GFXON
|
#define GINPUT_NEED_MOUSE GFXON
|
||||||
|
|
||||||
#endif /* _GFXCONF_H */
|
#endif /* _GFXCONF_H */
|
||||||
|
|
|
@ -1,116 +1,116 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "gfx.h"
|
#include "gfx.h"
|
||||||
|
|
||||||
#define COLOR_SIZE 20
|
#define COLOR_SIZE 20
|
||||||
#define PEN_SIZE 20
|
#define PEN_SIZE 20
|
||||||
#define OFFSET 3
|
#define OFFSET 3
|
||||||
|
|
||||||
#define COLOR_BOX(a) (ev.x >= a && ev.x <= a + COLOR_SIZE)
|
#define COLOR_BOX(a) (ev.x >= a && ev.x <= a + COLOR_SIZE)
|
||||||
#define PEN_BOX(a) (ev.y >= a && ev.y <= a + COLOR_SIZE)
|
#define PEN_BOX(a) (ev.y >= a && ev.y <= a + COLOR_SIZE)
|
||||||
#define GET_COLOR(a) (COLOR_BOX(a * COLOR_SIZE + OFFSET))
|
#define GET_COLOR(a) (COLOR_BOX(a * COLOR_SIZE + OFFSET))
|
||||||
#define GET_PEN(a) (PEN_BOX(a * 2 * PEN_SIZE + OFFSET))
|
#define GET_PEN(a) (PEN_BOX(a * 2 * PEN_SIZE + OFFSET))
|
||||||
#define DRAW_COLOR(a) (a * COLOR_SIZE + OFFSET)
|
#define DRAW_COLOR(a) (a * COLOR_SIZE + OFFSET)
|
||||||
#define DRAW_PEN(a) (a * 2 * PEN_SIZE + OFFSET)
|
#define DRAW_PEN(a) (a * 2 * PEN_SIZE + OFFSET)
|
||||||
#define DRAW_AREA(x, y) (x >= PEN_SIZE + OFFSET + 3 && x <= gdispGetWidth() && \
|
#define DRAW_AREA(x, y) (x >= PEN_SIZE + OFFSET + 3 && x <= gdispGetWidth() && \
|
||||||
y >= COLOR_SIZE + OFFSET + 3 && y <= gdispGetHeight())
|
y >= COLOR_SIZE + OFFSET + 3 && y <= gdispGetHeight())
|
||||||
|
|
||||||
void drawScreen(void) {
|
void drawScreen(void) {
|
||||||
char *msg = "uGFX";
|
char *msg = "uGFX";
|
||||||
gFont font1, font2;
|
gFont font1, font2;
|
||||||
|
|
||||||
font1 = gdispOpenFont("DejaVuSans24*");
|
font1 = gdispOpenFont("DejaVuSans24*");
|
||||||
font2 = gdispOpenFont("DejaVuSans12*");
|
font2 = gdispOpenFont("DejaVuSans12*");
|
||||||
|
|
||||||
gdispClear(GFX_WHITE);
|
gdispClear(GFX_WHITE);
|
||||||
gdispDrawString(gdispGetWidth()-gdispGetStringWidth(msg, font1)-3, 3, msg, font1, GFX_BLACK);
|
gdispDrawString(gdispGetWidth()-gdispGetStringWidth(msg, font1)-3, 3, msg, font1, GFX_BLACK);
|
||||||
|
|
||||||
/* colors */
|
/* colors */
|
||||||
gdispFillArea(0 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_BLACK); /* Black */
|
gdispFillArea(0 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_BLACK); /* Black */
|
||||||
gdispFillArea(1 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_RED); /* Red */
|
gdispFillArea(1 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_RED); /* Red */
|
||||||
gdispFillArea(2 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_YELLOW); /* Yellow */
|
gdispFillArea(2 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_YELLOW); /* Yellow */
|
||||||
gdispFillArea(3 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_GREEN); /* Green */
|
gdispFillArea(3 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_GREEN); /* Green */
|
||||||
gdispFillArea(4 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_BLUE); /* Blue */
|
gdispFillArea(4 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_BLUE); /* Blue */
|
||||||
gdispDrawBox (5 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_WHITE); /* White */
|
gdispDrawBox (5 * COLOR_SIZE + 3, 3, COLOR_SIZE, COLOR_SIZE, GFX_WHITE); /* White */
|
||||||
|
|
||||||
/* pens */
|
/* pens */
|
||||||
gdispFillStringBox(OFFSET * 2, DRAW_PEN(1), PEN_SIZE, PEN_SIZE, "1", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
gdispFillStringBox(OFFSET * 2, DRAW_PEN(1), PEN_SIZE, PEN_SIZE, "1", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
||||||
gdispFillStringBox(OFFSET * 2, DRAW_PEN(2), PEN_SIZE, PEN_SIZE, "2", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
gdispFillStringBox(OFFSET * 2, DRAW_PEN(2), PEN_SIZE, PEN_SIZE, "2", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
||||||
gdispFillStringBox(OFFSET * 2, DRAW_PEN(3), PEN_SIZE, PEN_SIZE, "3", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
gdispFillStringBox(OFFSET * 2, DRAW_PEN(3), PEN_SIZE, PEN_SIZE, "3", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
||||||
gdispFillStringBox(OFFSET * 2, DRAW_PEN(4), PEN_SIZE, PEN_SIZE, "4", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
gdispFillStringBox(OFFSET * 2, DRAW_PEN(4), PEN_SIZE, PEN_SIZE, "4", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
||||||
gdispFillStringBox(OFFSET * 2, DRAW_PEN(5), PEN_SIZE, PEN_SIZE, "5", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
gdispFillStringBox(OFFSET * 2, DRAW_PEN(5), PEN_SIZE, PEN_SIZE, "5", font2, GFX_WHITE, GFX_BLACK, gJustifyCenter);
|
||||||
|
|
||||||
gdispCloseFont(font1);
|
gdispCloseFont(font1);
|
||||||
gdispCloseFont(font2);
|
gdispCloseFont(font2);
|
||||||
}
|
}
|
||||||
|
|
||||||
GEventMouse ev;
|
GEventMouse ev;
|
||||||
|
|
||||||
int main(void) {
|
int main(void) {
|
||||||
gColor color = GFX_BLACK;
|
gColor color = GFX_BLACK;
|
||||||
gU16 pen = 0;
|
gU16 pen = 0;
|
||||||
|
|
||||||
gfxInit();
|
gfxInit();
|
||||||
ginputGetMouse(0);
|
ginputGetMouse(0);
|
||||||
|
|
||||||
drawScreen();
|
drawScreen();
|
||||||
|
|
||||||
while (1) {
|
while (1) {
|
||||||
ginputGetMouseStatus(0, &ev);
|
ginputGetMouseStatus(0, &ev);
|
||||||
if (!(ev.buttons & GINPUT_MOUSE_BTN_LEFT))
|
if (!(ev.buttons & GINPUT_MOUSE_BTN_LEFT))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
/* inside color box ? */
|
/* inside color box ? */
|
||||||
if(ev.y >= OFFSET && ev.y <= COLOR_SIZE) {
|
if(ev.y >= OFFSET && ev.y <= COLOR_SIZE) {
|
||||||
if(GET_COLOR(0)) color = GFX_BLACK;
|
if(GET_COLOR(0)) color = GFX_BLACK;
|
||||||
else if(GET_COLOR(1)) color = GFX_RED;
|
else if(GET_COLOR(1)) color = GFX_RED;
|
||||||
else if(GET_COLOR(2)) color = GFX_YELLOW;
|
else if(GET_COLOR(2)) color = GFX_YELLOW;
|
||||||
else if(GET_COLOR(3)) color = GFX_GREEN;
|
else if(GET_COLOR(3)) color = GFX_GREEN;
|
||||||
else if(GET_COLOR(4)) color = GFX_BLUE;
|
else if(GET_COLOR(4)) color = GFX_BLUE;
|
||||||
else if(GET_COLOR(5)) color = GFX_WHITE;
|
else if(GET_COLOR(5)) color = GFX_WHITE;
|
||||||
|
|
||||||
/* inside pen box ? */
|
/* inside pen box ? */
|
||||||
} else if(ev.x >= OFFSET && ev.x <= PEN_SIZE) {
|
} else if(ev.x >= OFFSET && ev.x <= PEN_SIZE) {
|
||||||
if(GET_PEN(1)) pen = 0;
|
if(GET_PEN(1)) pen = 0;
|
||||||
else if(GET_PEN(2)) pen = 1;
|
else if(GET_PEN(2)) pen = 1;
|
||||||
else if(GET_PEN(3)) pen = 2;
|
else if(GET_PEN(3)) pen = 2;
|
||||||
else if(GET_PEN(4)) pen = 3;
|
else if(GET_PEN(4)) pen = 3;
|
||||||
else if(GET_PEN(5)) pen = 4;
|
else if(GET_PEN(5)) pen = 4;
|
||||||
|
|
||||||
/* inside drawing area ? */
|
/* inside drawing area ? */
|
||||||
} else if(DRAW_AREA(ev.x, ev.y)) {
|
} else if(DRAW_AREA(ev.x, ev.y)) {
|
||||||
if(pen == 0)
|
if(pen == 0)
|
||||||
gdispDrawPixel(ev.x, ev.y, color);
|
gdispDrawPixel(ev.x, ev.y, color);
|
||||||
else
|
else
|
||||||
gdispFillCircle(ev.x, ev.y, pen, color);
|
gdispFillCircle(ev.x, ev.y, pen, color);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,47 +1,47 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GFXCONF_H
|
#ifndef _GFXCONF_H
|
||||||
#define _GFXCONF_H
|
#define _GFXCONF_H
|
||||||
|
|
||||||
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
||||||
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
||||||
//#define GFX_USE_OS_WIN32 GFXOFF
|
//#define GFX_USE_OS_WIN32 GFXOFF
|
||||||
//#define GFX_USE_OS_LINUX GFXOFF
|
//#define GFX_USE_OS_LINUX GFXOFF
|
||||||
//#define GFX_USE_OS_OSX GFXOFF
|
//#define GFX_USE_OS_OSX GFXOFF
|
||||||
|
|
||||||
/* GFX sub-systems to turn on */
|
/* GFX sub-systems to turn on */
|
||||||
#define GFX_USE_GDISP GFXON
|
#define GFX_USE_GDISP GFXON
|
||||||
|
|
||||||
/* Features for the GDISP sub-system. */
|
/* Features for the GDISP sub-system. */
|
||||||
#define GDISP_NEED_VALIDATION GFXON
|
#define GDISP_NEED_VALIDATION GFXON
|
||||||
#define GDISP_NEED_CLIP GFXON
|
#define GDISP_NEED_CLIP GFXON
|
||||||
|
|
||||||
#endif /* _GFXCONF_H */
|
#endif /* _GFXCONF_H */
|
||||||
|
|
||||||
|
|
|
@ -1,55 +1,55 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "gfx.h"
|
#include "gfx.h"
|
||||||
|
|
||||||
int main(void) {
|
int main(void) {
|
||||||
gCoord width, height;
|
gCoord width, height;
|
||||||
gCoord i, j;
|
gCoord i, j;
|
||||||
|
|
||||||
// Initialize and clear the display
|
// Initialize and clear the display
|
||||||
gfxInit();
|
gfxInit();
|
||||||
|
|
||||||
// Get the screen size
|
// Get the screen size
|
||||||
width = gdispGetWidth();
|
width = gdispGetWidth();
|
||||||
height = gdispGetHeight();
|
height = gdispGetHeight();
|
||||||
|
|
||||||
// Code Here
|
// Code Here
|
||||||
gdispDrawBox(10, 10, width/2, height/2, GFX_YELLOW);
|
gdispDrawBox(10, 10, width/2, height/2, GFX_YELLOW);
|
||||||
gdispFillArea(width/2, height/2, width/2-10, height/2-10, GFX_BLUE);
|
gdispFillArea(width/2, height/2, width/2-10, height/2-10, GFX_BLUE);
|
||||||
gdispDrawLine(5, 30, width-50, height-40, GFX_RED);
|
gdispDrawLine(5, 30, width-50, height-40, GFX_RED);
|
||||||
|
|
||||||
for(i = 5, j = 0; i < width && j < height; i += 7, j += i/20)
|
for(i = 5, j = 0; i < width && j < height; i += 7, j += i/20)
|
||||||
gdispDrawPixel(i, j, GFX_WHITE);
|
gdispDrawPixel(i, j, GFX_WHITE);
|
||||||
|
|
||||||
while(1) {
|
while(1) {
|
||||||
gfxSleepMilliseconds(500);
|
gfxSleepMilliseconds(500);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,55 +1,55 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GFXCONF_H
|
#ifndef _GFXCONF_H
|
||||||
#define _GFXCONF_H
|
#define _GFXCONF_H
|
||||||
|
|
||||||
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
||||||
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
||||||
//#define GFX_USE_OS_WIN32 GFXOFF
|
//#define GFX_USE_OS_WIN32 GFXOFF
|
||||||
//#define GFX_USE_OS_LINUX GFXOFF
|
//#define GFX_USE_OS_LINUX GFXOFF
|
||||||
//#define GFX_USE_OS_OSX GFXOFF
|
//#define GFX_USE_OS_OSX GFXOFF
|
||||||
|
|
||||||
/* GFX sub-systems to turn on */
|
/* GFX sub-systems to turn on */
|
||||||
#define GFX_USE_GDISP GFXON
|
#define GFX_USE_GDISP GFXON
|
||||||
#define GFX_USE_GMISC GFXON
|
#define GFX_USE_GMISC GFXON
|
||||||
|
|
||||||
/* Features for the GDISP subsystem. */
|
/* Features for the GDISP subsystem. */
|
||||||
#define GDISP_NEED_VALIDATION GFXON
|
#define GDISP_NEED_VALIDATION GFXON
|
||||||
#define GDISP_NEED_CLIP GFXON
|
#define GDISP_NEED_CLIP GFXON
|
||||||
#define GDISP_NEED_CIRCLE GFXON
|
#define GDISP_NEED_CIRCLE GFXON
|
||||||
#define GDISP_NEED_ELLIPSE GFXON
|
#define GDISP_NEED_ELLIPSE GFXON
|
||||||
#define GDISP_NEED_ARC GFXON
|
#define GDISP_NEED_ARC GFXON
|
||||||
|
|
||||||
/* Features for the GMISC subsystem */
|
/* Features for the GMISC subsystem */
|
||||||
#define GMISC_NEED_FIXEDTRIG GFXON
|
#define GMISC_NEED_FIXEDTRIG GFXON
|
||||||
#define GMISC_NEED_FASTTRIG GFXON
|
#define GMISC_NEED_FASTTRIG GFXON
|
||||||
|
|
||||||
#endif /* _GFXCONF_H */
|
#endif /* _GFXCONF_H */
|
||||||
|
|
||||||
|
|
|
@ -1,54 +1,54 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "gfx.h"
|
#include "gfx.h"
|
||||||
|
|
||||||
int main(void) {
|
int main(void) {
|
||||||
gCoord width, height;
|
gCoord width, height;
|
||||||
|
|
||||||
// Initialize and clear the display
|
// Initialize and clear the display
|
||||||
gfxInit();
|
gfxInit();
|
||||||
|
|
||||||
// Get the screen size
|
// Get the screen size
|
||||||
width = gdispGetWidth();
|
width = gdispGetWidth();
|
||||||
height = gdispGetHeight();
|
height = gdispGetHeight();
|
||||||
|
|
||||||
// Code Here
|
// Code Here
|
||||||
gdispFillArc(width/2, height/2, width/4, -10, -45, GFX_WHITE);
|
gdispFillArc(width/2, height/2, width/4, -10, -45, GFX_WHITE);
|
||||||
gdispDrawCircle(width/2+width/8, height/2-height/8, 13, GFX_GREEN);
|
gdispDrawCircle(width/2+width/8, height/2-height/8, 13, GFX_GREEN);
|
||||||
gdispFillCircle (width/2+width/8, height/2-height/8, 10, GFX_RED);
|
gdispFillCircle (width/2+width/8, height/2-height/8, 10, GFX_RED);
|
||||||
gdispDrawArc(width/2+width/8, height/2-height/8, 20, 25, 115, GFX_GRAY);
|
gdispDrawArc(width/2+width/8, height/2-height/8, 20, 25, 115, GFX_GRAY);
|
||||||
gdispFillEllipse (width-width/6, height-height/6, width/8, height/16, GFX_BLUE);
|
gdispFillEllipse (width-width/6, height-height/6, width/8, height/16, GFX_BLUE);
|
||||||
gdispDrawEllipse (width-width/6, height-height/6, width/16, height/8, GFX_YELLOW);
|
gdispDrawEllipse (width-width/6, height-height/6, width/16, height/8, GFX_YELLOW);
|
||||||
|
|
||||||
while(1) {
|
while(1) {
|
||||||
gfxSleepMilliseconds(500);
|
gfxSleepMilliseconds(500);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,49 +1,49 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "gfx.h"
|
#include "gfx.h"
|
||||||
|
|
||||||
int main(void) {
|
int main(void) {
|
||||||
gFont font1;
|
gFont font1;
|
||||||
|
|
||||||
// Initialize uGFX and the underlying system
|
// Initialize uGFX and the underlying system
|
||||||
gfxInit();
|
gfxInit();
|
||||||
|
|
||||||
// Get the fonts we want to use
|
// Get the fonts we want to use
|
||||||
font1 = gdispOpenFont("Archangelsk Regular 12");
|
font1 = gdispOpenFont("Archangelsk Regular 12");
|
||||||
|
|
||||||
// Demonstrate our other fonts
|
// Demonstrate our other fonts
|
||||||
gdispDrawString(10, 10, "привет мир", font1, GFX_YELLOW);
|
gdispDrawString(10, 10, "привет мир", font1, GFX_YELLOW);
|
||||||
|
|
||||||
// Wait forever
|
// Wait forever
|
||||||
while(1) {
|
while(1) {
|
||||||
gfxSleepMilliseconds(500);
|
gfxSleepMilliseconds(500);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,42 +1,42 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GFXCONF_H
|
#ifndef _GFXCONF_H
|
||||||
#define _GFXCONF_H
|
#define _GFXCONF_H
|
||||||
|
|
||||||
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
/* The operating system to use. One of these must be defined - preferably in your Makefile */
|
||||||
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
//#define GFX_USE_OS_CHIBIOS GFXOFF
|
||||||
//#define GFX_USE_OS_WIN32 GFXOFF
|
//#define GFX_USE_OS_WIN32 GFXOFF
|
||||||
//#define GFX_USE_OS_LINUX GFXOFF
|
//#define GFX_USE_OS_LINUX GFXOFF
|
||||||
//#define GFX_USE_OS_OSX GFXOFF
|
//#define GFX_USE_OS_OSX GFXOFF
|
||||||
|
|
||||||
/* GFX sub-systems to turn on */
|
/* GFX sub-systems to turn on */
|
||||||
#define GFX_USE_GTIMER GFXON
|
#define GFX_USE_GTIMER GFXON
|
||||||
|
|
||||||
#endif /* _GFXCONF_H */
|
#endif /* _GFXCONF_H */
|
||||||
|
|
|
@ -1,65 +1,65 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
* Copyright (c) 2012, 2013, Joel Bodenmann aka Tectu <joel@unormal.org>
|
||||||
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
* Copyright (c) 2012, 2013, Andrew Hannam aka inmarket
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
* * Redistributions of source code must retain the above copyright
|
* * Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* * Redistributions in binary form must reproduce the above copyright
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
* documentation and/or other materials provided with the distribution.
|
* documentation and/or other materials provided with the distribution.
|
||||||
* * Neither the name of the <organization> nor the
|
* * Neither the name of the <organization> nor the
|
||||||
* names of its contributors may be used to endorse or promote products
|
* names of its contributors may be used to endorse or promote products
|
||||||
* derived from this software without specific prior written permission.
|
* derived from this software without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "gfx.h"
|
#include "gfx.h"
|
||||||
|
|
||||||
GTimer GT1, GT2;
|
GTimer GT1, GT2;
|
||||||
|
|
||||||
void callback1(void* arg) {
|
void callback1(void* arg) {
|
||||||
(void)arg;
|
(void)arg;
|
||||||
|
|
||||||
palTogglePad(GPIOD, GPIOD_LED3);
|
palTogglePad(GPIOD, GPIOD_LED3);
|
||||||
}
|
}
|
||||||
|
|
||||||
void callback2(void* arg) {
|
void callback2(void* arg) {
|
||||||
(void)arg;
|
(void)arg;
|
||||||
|
|
||||||
palSetPad(GPIOD, GPIOD_LED4);
|
palSetPad(GPIOD, GPIOD_LED4);
|
||||||
}
|
}
|
||||||
|
|
||||||
int main(void) {
|
int main(void) {
|
||||||
gfxInit();
|
gfxInit();
|
||||||
|
|
||||||
/* initialize the timers */
|
/* initialize the timers */
|
||||||
gtimerInit(>1);
|
gtimerInit(>1);
|
||||||
gtimerInit(>2);
|
gtimerInit(>2);
|
||||||
|
|
||||||
/* continious mode - callback1() called without any argument every 250ms */
|
/* continious mode - callback1() called without any argument every 250ms */
|
||||||
gtimerStart(>1, callback1, 0, gTrue, 250);
|
gtimerStart(>1, callback1, 0, gTrue, 250);
|
||||||
|
|
||||||
/* single shot mode - callback2() called without any argument once after 1s */
|
/* single shot mode - callback2() called without any argument once after 1s */
|
||||||
gtimerStart(>2, callback2, 0, gFalse, 1000);
|
gtimerStart(>2, callback2, 0, gFalse, 1000);
|
||||||
|
|
||||||
while(1) {
|
while(1) {
|
||||||
gfxSleepMilliseconds(500);
|
gfxSleepMilliseconds(500);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -42,6 +42,7 @@
|
||||||
#define GDISP_NEED_VALIDATION GFXON
|
#define GDISP_NEED_VALIDATION GFXON
|
||||||
#define GDISP_NEED_CLIP GFXON
|
#define GDISP_NEED_CLIP GFXON
|
||||||
#define GDISP_NEED_TEXT GFXON
|
#define GDISP_NEED_TEXT GFXON
|
||||||
|
#define GDISP_NEED_ANTIALIAS GFXON
|
||||||
#define GDISP_NEED_UTF8 GFXON
|
#define GDISP_NEED_UTF8 GFXON
|
||||||
#define GDISP_NEED_TEXT_KERNING GFXON
|
#define GDISP_NEED_TEXT_KERNING GFXON
|
||||||
|
|
||||||
|
|
|
@ -62,7 +62,7 @@ static const char* FrenchStrings[] = {
|
||||||
};
|
};
|
||||||
static const transTable FrenchTranslation = { sizeof(FrenchStrings)/sizeof(FrenchStrings[0]), FrenchStrings };
|
static const transTable FrenchTranslation = { sizeof(FrenchStrings)/sizeof(FrenchStrings[0]), FrenchStrings };
|
||||||
|
|
||||||
void updateText(void)
|
void updateText()
|
||||||
{
|
{
|
||||||
gCoord width = 400;
|
gCoord width = 400;
|
||||||
gCoord height = 30;
|
gCoord height = 30;
|
||||||
|
|
|
@ -1,2 +1,2 @@
|
||||||
If there is no html directory containing the HTML version of the API documentation, you
|
If there is no html directory containing the HTML version of the API documentation, you
|
||||||
can find an online version of the documentation at http://api.ugfx.io
|
can find an online version of the documentation at http://api.ugfx.io
|
||||||
|
|
|
@ -1,30 +1,30 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @mainpage uGFX
|
* @mainpage uGFX
|
||||||
*
|
*
|
||||||
* <h2>Authors</h2>
|
* <h2>Authors</h2>
|
||||||
* - Joel Bodenmann<br>
|
* - Joel Bodenmann<br>
|
||||||
* - Andrew Hannam<br>
|
* - Andrew Hannam<br>
|
||||||
*
|
*
|
||||||
* <h2>Website</h2>
|
* <h2>Website</h2>
|
||||||
* - http://ugfx.io
|
* - http://ugfx.io
|
||||||
*
|
*
|
||||||
* <h2>Documentation</h2>
|
* <h2>Documentation</h2>
|
||||||
* - http://wiki.ugfx.io
|
* - http://wiki.ugfx.io
|
||||||
*
|
*
|
||||||
* <h2>API-Reference</h2>
|
* <h2>API-Reference</h2>
|
||||||
* - http://api.ugfx.io
|
* - http://api.ugfx.io
|
||||||
*
|
*
|
||||||
* <h2>Forum</h2>
|
* <h2>Forum</h2>
|
||||||
* - http://community.ugfx.io
|
* - http://community.ugfx.io
|
||||||
*
|
*
|
||||||
* <h2>License</h2>
|
* <h2>License</h2>
|
||||||
* - http://ugfx.io/license.html
|
* - http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
|
@ -1,59 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.io/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
#pragma once
|
|
||||||
|
|
||||||
/**
|
|
||||||
* The command byte to put in front of each page line.
|
|
||||||
*
|
|
||||||
* If this is defined, each page line is prefixed with the specified value in the locally
|
|
||||||
* maintained framebuffer.
|
|
||||||
*
|
|
||||||
* This can be omitted and handled inside of write_data() manually instead.
|
|
||||||
*/
|
|
||||||
#define CH1115_PAGE_PREFIX 0x40 // Co = 0, D/C = 1
|
|
||||||
|
|
||||||
static GFXINLINE void init_board(GDisplay *g)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void post_init_board(GDisplay *g)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void setpin_reset(GDisplay *g, gBool state)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
(void) state;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void acquire_bus(GDisplay *g)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void release_bus(GDisplay *g)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void write_cmd(GDisplay *g, gU8 *data, gU16 length)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
(void) data;
|
|
||||||
(void) length;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void write_data(GDisplay *g, gU8 *data, gU16 length)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
(void) data;
|
|
||||||
(void) length;
|
|
||||||
}
|
|
||||||
|
|
|
@ -1,8 +0,0 @@
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}/gdisp_lld_CH1115.c
|
|
||||||
)
|
|
||||||
|
|
|
@ -1,3 +0,0 @@
|
||||||
GFXINC += $(GFXLIB)/drivers/gdisp/CH1115
|
|
||||||
GFXSRC += $(GFXLIB)/drivers/gdisp/CH1115/gdisp_lld_CH1115.c
|
|
||||||
|
|
|
@ -1,391 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.io/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "gfx.h"
|
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
|
||||||
|
|
||||||
#define GDISP_DRIVER_VMT GDISPVMT_CH1115
|
|
||||||
#include "gdisp_lld_config.h"
|
|
||||||
#include "../../../src/gdisp/gdisp_driver.h"
|
|
||||||
|
|
||||||
#include "board_CH1115.h"
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver local definitions. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
#ifndef GDISP_SCREEN_HEIGHT
|
|
||||||
#define GDISP_SCREEN_HEIGHT 32 // This controller should also support 64 (untested)
|
|
||||||
#endif
|
|
||||||
#ifndef GDISP_SCREEN_WIDTH
|
|
||||||
#define GDISP_SCREEN_WIDTH 128
|
|
||||||
#endif
|
|
||||||
#ifndef GDISP_INITIAL_CONTRAST
|
|
||||||
#define GDISP_INITIAL_CONTRAST 100
|
|
||||||
#endif
|
|
||||||
#ifndef GDISP_INITIAL_BACKLIGHT
|
|
||||||
#define GDISP_INITIAL_BACKLIGHT 100
|
|
||||||
#endif
|
|
||||||
#ifdef CH1115_PAGE_PREFIX
|
|
||||||
#define CH1115_PAGE_WIDTH (GDISP_SCREEN_WIDTH+1)
|
|
||||||
#define CH1115_PAGE_OFFSET 1
|
|
||||||
#else
|
|
||||||
#define CH1115_PAGE_WIDTH GDISP_SCREEN_WIDTH
|
|
||||||
#define CH1115_PAGE_OFFSET 0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define GDISP_FLG_NEEDFLUSH (GDISP_FLG_DRIVER<<0)
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver local functions. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
// Some common routines and macros
|
|
||||||
#define RAM(g) ((gU8 *)g->priv)
|
|
||||||
#define xyaddr(x, y) (CH1115_PAGE_OFFSET + (x) + ((y)>>3)*CH1115_PAGE_WIDTH)
|
|
||||||
#define xybit(y) (1<<((y)&7))
|
|
||||||
|
|
||||||
#define write_cmd_1(g, a) { gU8 cmd[1]; cmd[0] = a; write_cmd(g, cmd, 1); }
|
|
||||||
#define write_cmd_2(g, a, b) { gU8 cmd[2]; cmd[0] = a; cmd[1] = b; write_cmd(g, cmd, 2); }
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver exported functions. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* As this controller can't update on a pixel boundary we need to maintain the
|
|
||||||
* the entire display surface in memory so that we can do the necessary bit
|
|
||||||
* operations. Fortunately it is a small monochrome display.
|
|
||||||
* 64 * 128 / 8 = 1024 bytes.
|
|
||||||
*/
|
|
||||||
|
|
||||||
LLDSPEC gBool gdisp_lld_init(GDisplay *g)
|
|
||||||
{
|
|
||||||
// The private area is the display surface.
|
|
||||||
g->priv = gfxAlloc(GDISP_SCREEN_HEIGHT/8 * CH1115_PAGE_WIDTH);
|
|
||||||
if (!g->priv)
|
|
||||||
return gFalse;
|
|
||||||
|
|
||||||
// Fill in the prefix command byte on each page line of the display buffer
|
|
||||||
// We can do this during initialisation as we're being careful that this byte is never overwritten.
|
|
||||||
#ifdef CH1115_PAGE_PREFIX
|
|
||||||
for (unsigned i = 0; i < GDISP_SCREEN_HEIGHT/8 * CH1115_PAGE_WIDTH; i += CH1115_PAGE_WIDTH)
|
|
||||||
RAM(g)[i] = CH1115_PAGE_PREFIX;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Initialise the board interface
|
|
||||||
init_board(g);
|
|
||||||
|
|
||||||
// Hardware reset
|
|
||||||
setpin_reset(g, gTrue);
|
|
||||||
gfxSleepMilliseconds(20);
|
|
||||||
setpin_reset(g, gFalse);
|
|
||||||
gfxSleepMilliseconds(200);
|
|
||||||
|
|
||||||
acquire_bus(g);
|
|
||||||
|
|
||||||
// Configuration
|
|
||||||
// This might require display module vendor specific changes
|
|
||||||
{
|
|
||||||
// Display off
|
|
||||||
write_cmd_1(g, 0xAE);
|
|
||||||
|
|
||||||
// Clock divider
|
|
||||||
write_cmd_2(g, 0xD5, 0x80);
|
|
||||||
|
|
||||||
// Multiplex ratio
|
|
||||||
write_cmd_2(g, 0xA8, 0x1F);
|
|
||||||
|
|
||||||
// Display offset
|
|
||||||
write_cmd_2(g, 0xD3, 0x30);
|
|
||||||
|
|
||||||
// Display start line
|
|
||||||
write_cmd_1(g, 0x40);
|
|
||||||
|
|
||||||
// Charge pump
|
|
||||||
write_cmd_2(g, 0x8D, 0x72); // 0x10 if Vcc externally supplied
|
|
||||||
|
|
||||||
// Segment re-map
|
|
||||||
write_cmd_1(g, 0xA1);
|
|
||||||
|
|
||||||
// COM output scan direction
|
|
||||||
write_cmd_1(g, 0xC0);
|
|
||||||
|
|
||||||
// COM pin hardware configuration
|
|
||||||
write_cmd_2(g, 0xDA, 0x10);
|
|
||||||
|
|
||||||
// Set internal/external current reference
|
|
||||||
write_cmd_2(g, 0xAD, 0x50);
|
|
||||||
|
|
||||||
// Set contract
|
|
||||||
write_cmd_2(g, 0x81, 0x17);
|
|
||||||
|
|
||||||
// Set pre-charge period
|
|
||||||
write_cmd_2(g, 0xD9, 0xF1);
|
|
||||||
|
|
||||||
// Set VCOMH select level
|
|
||||||
write_cmd_2(g, 0xDB, 0x30);
|
|
||||||
|
|
||||||
// Set entire display on/off
|
|
||||||
write_cmd_1(g, 0xA4);
|
|
||||||
|
|
||||||
// Set normal/inverse display
|
|
||||||
write_cmd_1(g, 0xA6);
|
|
||||||
|
|
||||||
// Page addressing mode
|
|
||||||
write_cmd_2(g, 0x20, 0x02);
|
|
||||||
|
|
||||||
// Display on
|
|
||||||
write_cmd_1(g, 0xAF);
|
|
||||||
}
|
|
||||||
|
|
||||||
release_bus(g);
|
|
||||||
|
|
||||||
// Finish Init
|
|
||||||
post_init_board(g);
|
|
||||||
|
|
||||||
// Initialise the GDISP structure
|
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
|
||||||
g->g.Orientation = gOrientation0;
|
|
||||||
g->g.Powermode = gPowerOn;
|
|
||||||
g->g.Backlight = GDISP_INITIAL_BACKLIGHT;
|
|
||||||
g->g.Contrast = GDISP_INITIAL_CONTRAST;
|
|
||||||
|
|
||||||
return gTrue;
|
|
||||||
}
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_FLUSH
|
|
||||||
LLDSPEC void gdisp_lld_flush(GDisplay *g)
|
|
||||||
{
|
|
||||||
gU8 * ram;
|
|
||||||
unsigned pages;
|
|
||||||
|
|
||||||
// Only flush if necessary
|
|
||||||
if (!(g->flags & GDISP_FLG_NEEDFLUSH))
|
|
||||||
return;
|
|
||||||
|
|
||||||
ram = RAM(g);
|
|
||||||
pages = GDISP_SCREEN_HEIGHT/8;
|
|
||||||
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_1(g, 0x40 | 0);
|
|
||||||
while (pages--) {
|
|
||||||
write_cmd_1(g, 0xB0 + (((GDISP_SCREEN_HEIGHT/8)-1)-pages));
|
|
||||||
write_cmd_1(g, 0x00);
|
|
||||||
write_cmd_1(g, 0x10);
|
|
||||||
write_data(g, ram, CH1115_PAGE_WIDTH);
|
|
||||||
ram += CH1115_PAGE_WIDTH;
|
|
||||||
}
|
|
||||||
release_bus(g);
|
|
||||||
|
|
||||||
g->flags &= ~GDISP_FLG_NEEDFLUSH;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_DRAWPIXEL
|
|
||||||
LLDSPEC void gdisp_lld_draw_pixel(GDisplay *g)
|
|
||||||
{
|
|
||||||
gCoord x, y;
|
|
||||||
|
|
||||||
switch(g->g.Orientation) {
|
|
||||||
default:
|
|
||||||
case gOrientation0:
|
|
||||||
x = g->p.x;
|
|
||||||
y = g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation90:
|
|
||||||
x = g->p.y;
|
|
||||||
y = GDISP_SCREEN_HEIGHT-1 - g->p.x;
|
|
||||||
break;
|
|
||||||
case gOrientation180:
|
|
||||||
x = GDISP_SCREEN_WIDTH-1 - g->p.x;
|
|
||||||
y = GDISP_SCREEN_HEIGHT-1 - g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation270:
|
|
||||||
x = GDISP_SCREEN_WIDTH-1 - g->p.y;
|
|
||||||
y = g->p.x;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
if (gdispColor2Native(g->p.color) != gdispColor2Native(GFX_BLACK))
|
|
||||||
RAM(g)[xyaddr(x, y)] |= xybit(y);
|
|
||||||
else
|
|
||||||
RAM(g)[xyaddr(x, y)] &= ~xybit(y);
|
|
||||||
g->flags |= GDISP_FLG_NEEDFLUSH;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_PIXELREAD
|
|
||||||
LLDSPEC gColor gdisp_lld_get_pixel_color(GDisplay *g)
|
|
||||||
{
|
|
||||||
gCoord x, y;
|
|
||||||
|
|
||||||
switch(g->g.Orientation) {
|
|
||||||
default:
|
|
||||||
case gOrientation0:
|
|
||||||
x = g->p.x;
|
|
||||||
y = g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation90:
|
|
||||||
x = g->p.y;
|
|
||||||
y = GDISP_SCREEN_HEIGHT-1 - g->p.x;
|
|
||||||
break;
|
|
||||||
case gOrientation180:
|
|
||||||
x = GDISP_SCREEN_WIDTH-1 - g->p.x;
|
|
||||||
y = GDISP_SCREEN_HEIGHT-1 - g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation270:
|
|
||||||
x = GDISP_SCREEN_WIDTH-1 - g->p.y;
|
|
||||||
y = g->p.x;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
return (RAM(g)[xyaddr(x, y)] & xybit(y)) ? GFX_WHITE : GFX_BLACK;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_FILLS
|
|
||||||
LLDSPEC void gdisp_lld_fill_area(GDisplay *g)
|
|
||||||
{
|
|
||||||
gCoord sy, ey;
|
|
||||||
gCoord sx, ex;
|
|
||||||
gCoord col;
|
|
||||||
unsigned spage, zpages;
|
|
||||||
gU8 * base;
|
|
||||||
gU8 mask;
|
|
||||||
|
|
||||||
switch(g->g.Orientation) {
|
|
||||||
default:
|
|
||||||
case gOrientation0:
|
|
||||||
sx = g->p.x;
|
|
||||||
ex = g->p.x + g->p.cx - 1;
|
|
||||||
sy = g->p.y;
|
|
||||||
ey = sy + g->p.cy - 1;
|
|
||||||
break;
|
|
||||||
case gOrientation90:
|
|
||||||
sx = g->p.y;
|
|
||||||
ex = g->p.y + g->p.cy - 1;
|
|
||||||
sy = GDISP_SCREEN_HEIGHT - g->p.x - g->p.cx;
|
|
||||||
ey = GDISP_SCREEN_HEIGHT-1 - g->p.x;
|
|
||||||
break;
|
|
||||||
case gOrientation180:
|
|
||||||
sx = GDISP_SCREEN_WIDTH - g->p.x - g->p.cx;
|
|
||||||
ex = GDISP_SCREEN_WIDTH-1 - g->p.x;
|
|
||||||
sy = GDISP_SCREEN_HEIGHT - g->p.y - g->p.cy;
|
|
||||||
ey = GDISP_SCREEN_HEIGHT-1 - g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation270:
|
|
||||||
sx = GDISP_SCREEN_WIDTH - g->p.y - g->p.cy;
|
|
||||||
ex = GDISP_SCREEN_WIDTH-1 - g->p.y;
|
|
||||||
sy = g->p.x;
|
|
||||||
ey = g->p.x + g->p.cx - 1;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
spage = sy / 8;
|
|
||||||
base = RAM(g) + CH1115_PAGE_OFFSET + CH1115_PAGE_WIDTH * spage;
|
|
||||||
mask = 0xff << (sy&7);
|
|
||||||
zpages = (ey / 8) - spage;
|
|
||||||
|
|
||||||
if (gdispColor2Native(g->p.color) == gdispColor2Native(GFX_BLACK)) {
|
|
||||||
while (zpages--) {
|
|
||||||
for (col = sx; col <= ex; col++)
|
|
||||||
base[col] &= ~mask;
|
|
||||||
mask = 0xff;
|
|
||||||
base += CH1115_PAGE_WIDTH;
|
|
||||||
}
|
|
||||||
mask &= (0xff >> (7 - (ey&7)));
|
|
||||||
for (col = sx; col <= ex; col++)
|
|
||||||
base[col] &= ~mask;
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
while (zpages--) {
|
|
||||||
for (col = sx; col <= ex; col++)
|
|
||||||
base[col] |= mask;
|
|
||||||
mask = 0xff;
|
|
||||||
base += CH1115_PAGE_WIDTH;
|
|
||||||
}
|
|
||||||
mask &= (0xff >> (7 - (ey&7)));
|
|
||||||
for (col = sx; col <= ex; col++)
|
|
||||||
base[col] |= mask;
|
|
||||||
}
|
|
||||||
g->flags |= GDISP_FLG_NEEDFLUSH;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
|
|
||||||
LLDSPEC void gdisp_lld_control(GDisplay *g)
|
|
||||||
{
|
|
||||||
switch(g->p.x) {
|
|
||||||
case GDISP_CONTROL_POWER:
|
|
||||||
if (g->g.Powermode == (gPowermode)g->p.ptr)
|
|
||||||
return;
|
|
||||||
switch((gPowermode)g->p.ptr) {
|
|
||||||
case gPowerOff:
|
|
||||||
case gPowerSleep:
|
|
||||||
case gPowerDeepSleep:
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_1(g, 0xAE);
|
|
||||||
release_bus(g);
|
|
||||||
break;
|
|
||||||
case gPowerOn:
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_1(g, 0xAF);
|
|
||||||
release_bus(g);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
g->g.Powermode = (gPowermode)g->p.ptr;
|
|
||||||
return;
|
|
||||||
|
|
||||||
case GDISP_CONTROL_ORIENTATION:
|
|
||||||
if (g->g.Orientation == (gOrientation)g->p.ptr)
|
|
||||||
return;
|
|
||||||
|
|
||||||
switch((gOrientation)g->p.ptr) {
|
|
||||||
// Rotation is handled by the drawing routines
|
|
||||||
case gOrientation0:
|
|
||||||
case gOrientation180:
|
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
|
||||||
break;
|
|
||||||
case gOrientation90:
|
|
||||||
case gOrientation270:
|
|
||||||
g->g.Height = GDISP_SCREEN_WIDTH;
|
|
||||||
g->g.Width = GDISP_SCREEN_HEIGHT;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
g->g.Orientation = (gOrientation)g->p.ptr;
|
|
||||||
return;
|
|
||||||
|
|
||||||
case GDISP_CONTROL_CONTRAST:
|
|
||||||
if ((unsigned)g->p.ptr > 100)
|
|
||||||
g->p.ptr = (void *)100;
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_2(g, 0x81, (((unsigned)g->p.ptr)<<8)/101);
|
|
||||||
release_bus(g);
|
|
||||||
g->g.Contrast = (unsigned)g->p.ptr;
|
|
||||||
return;
|
|
||||||
|
|
||||||
// Our own special controller code to inverse the display
|
|
||||||
// 0 = normal, 1 = inverse
|
|
||||||
case GDISP_CONTROL_INVERSE:
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_1(g, g->p.ptr ? 0xA7: 0xA6);
|
|
||||||
release_bus(g);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif // GDISP_NEED_CONTROL
|
|
||||||
|
|
||||||
#endif // GFX_USE_GDISP
|
|
||||||
|
|
|
@ -1,31 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.io/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_CONFIG_H
|
|
||||||
#define _GDISP_LLD_CONFIG_H
|
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver hardware support. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
#define GDISP_HARDWARE_FLUSH GFXON // This controller requires flushing
|
|
||||||
#define GDISP_HARDWARE_DRAWPIXEL GFXON
|
|
||||||
#define GDISP_HARDWARE_PIXELREAD GFXON
|
|
||||||
#define GDISP_HARDWARE_CONTROL GFXON
|
|
||||||
#define GDISP_HARDWARE_FILLS GFXON
|
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO
|
|
||||||
|
|
||||||
// This controller supports a special gdispControl() to inverse the display.
|
|
||||||
// Pass a parameter of 1 for inverse and 0 for normal.
|
|
||||||
#define GDISP_CONTROL_INVERSE (GDISP_CONTROL_LLD+0)
|
|
||||||
|
|
||||||
#endif // GFX_USE_GDISP
|
|
||||||
|
|
||||||
#endif // _GDISP_LLD_CONFIG_H
|
|
|
@ -1,134 +1,134 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _HX8347D_H
|
#ifndef _HX8347D_H
|
||||||
#define _HX8347D_H
|
#define _HX8347D_H
|
||||||
|
|
||||||
/* HX8347D registers */
|
/* HX8347D registers */
|
||||||
|
|
||||||
/* page 0 registers */
|
/* page 0 registers */
|
||||||
#define HX8347D_REG_HID 0x00 /* Himax ID */
|
#define HX8347D_REG_HID 0x00 /* Himax ID */
|
||||||
#define HX8347D_REG_DMODE 0x01 /* Display mode control */
|
#define HX8347D_REG_DMODE 0x01 /* Display mode control */
|
||||||
#define HX8347D_REG_SCH 0x02 /* Column address start high */
|
#define HX8347D_REG_SCH 0x02 /* Column address start high */
|
||||||
#define HX8347D_REG_SCL 0x03 /* Column address start low */
|
#define HX8347D_REG_SCL 0x03 /* Column address start low */
|
||||||
#define HX8347D_REG_ECH 0x04 /* Column address end high */
|
#define HX8347D_REG_ECH 0x04 /* Column address end high */
|
||||||
#define HX8347D_REG_ECL 0x05 /* Column address end low */
|
#define HX8347D_REG_ECL 0x05 /* Column address end low */
|
||||||
#define HX8347D_REG_SPH 0x06 /* Row address start high */
|
#define HX8347D_REG_SPH 0x06 /* Row address start high */
|
||||||
#define HX8347D_REG_SPL 0x07 /* Row address start low */
|
#define HX8347D_REG_SPL 0x07 /* Row address start low */
|
||||||
#define HX8347D_REG_EPH 0x08 /* Row address end high */
|
#define HX8347D_REG_EPH 0x08 /* Row address end high */
|
||||||
#define HX8347D_REG_EPL 0x09 /* Row address end low */
|
#define HX8347D_REG_EPL 0x09 /* Row address end low */
|
||||||
#define HX8347D_REG_PSLH 0x0a /* Partial area start row high */
|
#define HX8347D_REG_PSLH 0x0a /* Partial area start row high */
|
||||||
#define HX8347D_REG_PSLL 0x0b /* Partial area start row low */
|
#define HX8347D_REG_PSLL 0x0b /* Partial area start row low */
|
||||||
#define HX8347D_REG_PELH 0x0c /* Partial area end row high */
|
#define HX8347D_REG_PELH 0x0c /* Partial area end row high */
|
||||||
#define HX8347D_REG_PELL 0x0d /* Partial area end row low */
|
#define HX8347D_REG_PELL 0x0d /* Partial area end row low */
|
||||||
#define HX8347D_REG_TFAH 0x0e /* Vertical scroll top fixed area high */
|
#define HX8347D_REG_TFAH 0x0e /* Vertical scroll top fixed area high */
|
||||||
#define HX8347D_REG_TFAL 0x0f /* Vertical scroll top fixed area low */
|
#define HX8347D_REG_TFAL 0x0f /* Vertical scroll top fixed area low */
|
||||||
|
|
||||||
#define HX8347D_REG_VSAH 0x10 /* Vertical scroll height area high */
|
#define HX8347D_REG_VSAH 0x10 /* Vertical scroll height area high */
|
||||||
#define HX8347D_REG_VSAL 0x11 /* Vertical scroll height area low */
|
#define HX8347D_REG_VSAL 0x11 /* Vertical scroll height area low */
|
||||||
#define HX8347D_REG_BFAH 0x12 /* Vertical scroll button area high */
|
#define HX8347D_REG_BFAH 0x12 /* Vertical scroll button area high */
|
||||||
#define HX8347D_REG_BFAL 0x13 /* Vertical scroll button area low */
|
#define HX8347D_REG_BFAL 0x13 /* Vertical scroll button area low */
|
||||||
#define HX8347D_REG_VSPH 0x14 /* Vertical scroll start address high */
|
#define HX8347D_REG_VSPH 0x14 /* Vertical scroll start address high */
|
||||||
#define HX8347D_REG_VSPL 0x15 /* Vertical scroll start address low */
|
#define HX8347D_REG_VSPL 0x15 /* Vertical scroll start address low */
|
||||||
#define HX8347D_REG_MAC 0x16 /* Memory access control */
|
#define HX8347D_REG_MAC 0x16 /* Memory access control */
|
||||||
#define HX8347D_REG_COLMOD 0x17 /* COLMOD */
|
#define HX8347D_REG_COLMOD 0x17 /* COLMOD */
|
||||||
#define HX8347D_REG_OSCCH 0x18 /* OSC control 2 */
|
#define HX8347D_REG_OSCCH 0x18 /* OSC control 2 */
|
||||||
#define HX8347D_REG_OSCCL 0x19 /* OSC control 1 */
|
#define HX8347D_REG_OSCCL 0x19 /* OSC control 1 */
|
||||||
#define HX8347D_REG_PWC1 0x1a /* Power control 1 */
|
#define HX8347D_REG_PWC1 0x1a /* Power control 1 */
|
||||||
#define HX8347D_REG_PWC2 0x1b /* Power control 2 */
|
#define HX8347D_REG_PWC2 0x1b /* Power control 2 */
|
||||||
#define HX8347D_REG_PWC3 0x1c /* Power control 3 */
|
#define HX8347D_REG_PWC3 0x1c /* Power control 3 */
|
||||||
#define HX8347D_REG_PWC4 0x1d /* Power control 4 */
|
#define HX8347D_REG_PWC4 0x1d /* Power control 4 */
|
||||||
#define HX8347D_REG_PWC5 0x1e /* Power control 5 */
|
#define HX8347D_REG_PWC5 0x1e /* Power control 5 */
|
||||||
#define HX8347D_REG_PWC6 0x1f /* Power control 6 */
|
#define HX8347D_REG_PWC6 0x1f /* Power control 6 */
|
||||||
|
|
||||||
#define HX8347D_REG_SRAMWC 0x22 /* SRAM write control */
|
#define HX8347D_REG_SRAMWC 0x22 /* SRAM write control */
|
||||||
#define HX8347D_REG_VMF 0x23 /* VCOM control 1 */
|
#define HX8347D_REG_VMF 0x23 /* VCOM control 1 */
|
||||||
#define HX8347D_REG_VMH 0x24 /* VCOM control 2 */
|
#define HX8347D_REG_VMH 0x24 /* VCOM control 2 */
|
||||||
#define HX8347D_REG_VML 0x25 /* VCOM control 3 */
|
#define HX8347D_REG_VML 0x25 /* VCOM control 3 */
|
||||||
#define HX8347D_REG_DC1 0x26 /* Display control 1 */
|
#define HX8347D_REG_DC1 0x26 /* Display control 1 */
|
||||||
#define HX8347D_REG_DC2 0x27 /* Display control 2 */
|
#define HX8347D_REG_DC2 0x27 /* Display control 2 */
|
||||||
#define HX8347D_REG_DC3 0x28 /* Display control 3 */
|
#define HX8347D_REG_DC3 0x28 /* Display control 3 */
|
||||||
#define HX8347D_REG_FRC1 0x29 /* Frame rate control 1 */
|
#define HX8347D_REG_FRC1 0x29 /* Frame rate control 1 */
|
||||||
#define HX8347D_REG_FRC2 0x2a /* Frame rate control 2 */
|
#define HX8347D_REG_FRC2 0x2a /* Frame rate control 2 */
|
||||||
#define HX8347D_REG_FRC3 0x2b /* Frame rate control 3 */
|
#define HX8347D_REG_FRC3 0x2b /* Frame rate control 3 */
|
||||||
#define HX8347D_REG_FRC4 0x2c /* Frame rate control 4 */
|
#define HX8347D_REG_FRC4 0x2c /* Frame rate control 4 */
|
||||||
#define HX8347D_REG_GDON 0x2d /* Cycle control 1 */
|
#define HX8347D_REG_GDON 0x2d /* Cycle control 1 */
|
||||||
#define HX8347D_REG_GDOF 0x2e /* Cycle control 2 */
|
#define HX8347D_REG_GDOF 0x2e /* Cycle control 2 */
|
||||||
#define HX8347D_REG_DINV 0x2f /* Display inversion */
|
#define HX8347D_REG_DINV 0x2f /* Display inversion */
|
||||||
|
|
||||||
#define HX8347D_REG_RGB1 0x31 /* RGB interface control 1 */
|
#define HX8347D_REG_RGB1 0x31 /* RGB interface control 1 */
|
||||||
#define HX8347D_REG_RGB2 0x32 /* RGB interface control 2 */
|
#define HX8347D_REG_RGB2 0x32 /* RGB interface control 2 */
|
||||||
#define HX8347D_REG_RGB3 0x33 /* RGB interface control 3 */
|
#define HX8347D_REG_RGB3 0x33 /* RGB interface control 3 */
|
||||||
#define HX8347D_REG_RGB4 0x34 /* RGB interface control 4 */
|
#define HX8347D_REG_RGB4 0x34 /* RGB interface control 4 */
|
||||||
#define HX8347D_REG_PCH 0x36 /* Panel characteristic */
|
#define HX8347D_REG_PCH 0x36 /* Panel characteristic */
|
||||||
#define HX8347D_REG_OTP1 0x38 /* OTP control 1 */
|
#define HX8347D_REG_OTP1 0x38 /* OTP control 1 */
|
||||||
#define HX8347D_REG_OTP2 0x39 /* OTP control 2 */
|
#define HX8347D_REG_OTP2 0x39 /* OTP control 2 */
|
||||||
#define HX8347D_REG_OTP3 0x3a /* OTP control 3 */
|
#define HX8347D_REG_OTP3 0x3a /* OTP control 3 */
|
||||||
#define HX8347D_REG_CABC1 0x3c /* CABC control 1 */
|
#define HX8347D_REG_CABC1 0x3c /* CABC control 1 */
|
||||||
#define HX8347D_REG_CABC2 0x3d /* CABC control 2 */
|
#define HX8347D_REG_CABC2 0x3d /* CABC control 2 */
|
||||||
#define HX8347D_REG_CABC3 0x3e /* CABC control 3 */
|
#define HX8347D_REG_CABC3 0x3e /* CABC control 3 */
|
||||||
#define HX8347D_REG_CABC4 0x3f /* CABC control 4 */
|
#define HX8347D_REG_CABC4 0x3f /* CABC control 4 */
|
||||||
|
|
||||||
#define HX8347D_REG_VRP0 0x40 /* Gamma control 1 */
|
#define HX8347D_REG_VRP0 0x40 /* Gamma control 1 */
|
||||||
#define HX8347D_REG_VRP1 0x41 /* Gamma control 2 */
|
#define HX8347D_REG_VRP1 0x41 /* Gamma control 2 */
|
||||||
#define HX8347D_REG_VRP2 0x42 /* Gamma control 3 */
|
#define HX8347D_REG_VRP2 0x42 /* Gamma control 3 */
|
||||||
#define HX8347D_REG_VRP3 0x43 /* Gamma control 4 */
|
#define HX8347D_REG_VRP3 0x43 /* Gamma control 4 */
|
||||||
#define HX8347D_REG_VRP4 0x44 /* Gamma control 5 */
|
#define HX8347D_REG_VRP4 0x44 /* Gamma control 5 */
|
||||||
#define HX8347D_REG_VRP5 0x45 /* Gamma control 6 */
|
#define HX8347D_REG_VRP5 0x45 /* Gamma control 6 */
|
||||||
#define HX8347D_REG_PRP0 0x46 /* Gamma control 7 */
|
#define HX8347D_REG_PRP0 0x46 /* Gamma control 7 */
|
||||||
#define HX8347D_REG_PRP1 0x47 /* Gamma control 8 */
|
#define HX8347D_REG_PRP1 0x47 /* Gamma control 8 */
|
||||||
#define HX8347D_REG_PKP0 0x48 /* Gamma control 9 */
|
#define HX8347D_REG_PKP0 0x48 /* Gamma control 9 */
|
||||||
#define HX8347D_REG_PKP1 0x49 /* Gamma control 10 */
|
#define HX8347D_REG_PKP1 0x49 /* Gamma control 10 */
|
||||||
#define HX8347D_REG_PKP2 0x4a /* Gamma control 11 */
|
#define HX8347D_REG_PKP2 0x4a /* Gamma control 11 */
|
||||||
#define HX8347D_REG_PKP3 0x4b /* Gamma control 12 */
|
#define HX8347D_REG_PKP3 0x4b /* Gamma control 12 */
|
||||||
#define HX8347D_REG_PKP4 0x4c /* Gamma control 13 */
|
#define HX8347D_REG_PKP4 0x4c /* Gamma control 13 */
|
||||||
|
|
||||||
#define HX8347D_REG_VRN0 0x50 /* Gamma control 14 */
|
#define HX8347D_REG_VRN0 0x50 /* Gamma control 14 */
|
||||||
#define HX8347D_REG_VRN1 0x51 /* Gamma control 15 */
|
#define HX8347D_REG_VRN1 0x51 /* Gamma control 15 */
|
||||||
#define HX8347D_REG_VRN2 0x52 /* Gamma control 16 */
|
#define HX8347D_REG_VRN2 0x52 /* Gamma control 16 */
|
||||||
#define HX8347D_REG_VRN3 0x53 /* Gamma control 17 */
|
#define HX8347D_REG_VRN3 0x53 /* Gamma control 17 */
|
||||||
#define HX8347D_REG_VRN4 0x54 /* Gamma control 18 */
|
#define HX8347D_REG_VRN4 0x54 /* Gamma control 18 */
|
||||||
#define HX8347D_REG_VRN5 0x55 /* Gamma control 19 */
|
#define HX8347D_REG_VRN5 0x55 /* Gamma control 19 */
|
||||||
#define HX8347D_REG_PRN0 0x56 /* Gamma control 20 */
|
#define HX8347D_REG_PRN0 0x56 /* Gamma control 20 */
|
||||||
#define HX8347D_REG_PRN1 0x57 /* Gamma control 21 */
|
#define HX8347D_REG_PRN1 0x57 /* Gamma control 21 */
|
||||||
#define HX8347D_REG_PKN0 0x58 /* Gamma control 22 */
|
#define HX8347D_REG_PKN0 0x58 /* Gamma control 22 */
|
||||||
#define HX8347D_REG_PKN1 0x59 /* Gamma control 23 */
|
#define HX8347D_REG_PKN1 0x59 /* Gamma control 23 */
|
||||||
#define HX8347D_REG_PKN2 0x5a /* Gamma control 24 */
|
#define HX8347D_REG_PKN2 0x5a /* Gamma control 24 */
|
||||||
#define HX8347D_REG_PKN3 0x5b /* Gamma control 25 */
|
#define HX8347D_REG_PKN3 0x5b /* Gamma control 25 */
|
||||||
#define HX8347D_REG_PKN4 0x5c /* Gamma control 26 */
|
#define HX8347D_REG_PKN4 0x5c /* Gamma control 26 */
|
||||||
#define HX8347D_REG_CGM 0x5d /* Gamma control 27 */
|
#define HX8347D_REG_CGM 0x5d /* Gamma control 27 */
|
||||||
|
|
||||||
#define HX8347D_REG_TEC 0x60 /* TE control */
|
#define HX8347D_REG_TEC 0x60 /* TE control */
|
||||||
|
|
||||||
#define HX8347D_REG_PS1 0xe4 /* Power saving 1 */
|
#define HX8347D_REG_PS1 0xe4 /* Power saving 1 */
|
||||||
#define HX8347D_REG_PS2 0xe5 /* Power saving 2 */
|
#define HX8347D_REG_PS2 0xe5 /* Power saving 2 */
|
||||||
#define HX8347D_REG_PS3 0xe6 /* Power saving 3 */
|
#define HX8347D_REG_PS3 0xe6 /* Power saving 3 */
|
||||||
#define HX8347D_REG_PS4 0xe7 /* Power saving 4 */
|
#define HX8347D_REG_PS4 0xe7 /* Power saving 4 */
|
||||||
#define HX8347D_REG_OPONN 0xe8 /* Source OP control normal */
|
#define HX8347D_REG_OPONN 0xe8 /* Source OP control normal */
|
||||||
#define HX8347D_REG_OPONI 0xe9 /* Source OP control idle */
|
#define HX8347D_REG_OPONI 0xe9 /* Source OP control idle */
|
||||||
#define HX8347D_REG_STBAH 0xea /* Power control internal use 1 */
|
#define HX8347D_REG_STBAH 0xea /* Power control internal use 1 */
|
||||||
#define HX8347D_REG_STBAL 0xeb /* Power control internal use 2 */
|
#define HX8347D_REG_STBAL 0xeb /* Power control internal use 2 */
|
||||||
#define HX8347D_REG_PTBAH 0xec /* Source control internal use 1 */
|
#define HX8347D_REG_PTBAH 0xec /* Source control internal use 1 */
|
||||||
#define HX8347D_REG_PTBAL 0xed /* Source control internal use 2 */
|
#define HX8347D_REG_PTBAL 0xed /* Source control internal use 2 */
|
||||||
|
|
||||||
/* page 1 registers */
|
/* page 1 registers */
|
||||||
#define HX8347D_REG_CABC5 0xc3 /* CABC control 5 */
|
#define HX8347D_REG_CABC5 0xc3 /* CABC control 5 */
|
||||||
#define HX8347D_REG_CABC6 0xc5 /* CABC control 6 */
|
#define HX8347D_REG_CABC6 0xc5 /* CABC control 6 */
|
||||||
#define HX8347D_REG_CABC7 0xc7 /* CABC control 7 */
|
#define HX8347D_REG_CABC7 0xc7 /* CABC control 7 */
|
||||||
#define HX8347D_REG_DBG0 0xcb /* Gain select register 0 */
|
#define HX8347D_REG_DBG0 0xcb /* Gain select register 0 */
|
||||||
#define HX8347D_REG_DBG1 0xcc /* Gain select register 1 */
|
#define HX8347D_REG_DBG1 0xcc /* Gain select register 1 */
|
||||||
#define HX8347D_REG_DBG2 0xcd /* Gain select register 2 */
|
#define HX8347D_REG_DBG2 0xcd /* Gain select register 2 */
|
||||||
#define HX8347D_REG_DBG3 0xce /* Gain select register 3 */
|
#define HX8347D_REG_DBG3 0xce /* Gain select register 3 */
|
||||||
#define HX8347D_REG_DBG4 0xcf /* Gain select register 4 */
|
#define HX8347D_REG_DBG4 0xcf /* Gain select register 4 */
|
||||||
#define HX8347D_REG_DBG5 0xd0 /* Gain select register 5 */
|
#define HX8347D_REG_DBG5 0xd0 /* Gain select register 5 */
|
||||||
#define HX8347D_REG_DBG6 0xd1 /* Gain select register 6 */
|
#define HX8347D_REG_DBG6 0xd1 /* Gain select register 6 */
|
||||||
#define HX8347D_REG_DBG7 0xd2 /* Gain select register 7 */
|
#define HX8347D_REG_DBG7 0xd2 /* Gain select register 7 */
|
||||||
#define HX8347D_REG_DBG8 0xd3 /* Gain select register 8 */
|
#define HX8347D_REG_DBG8 0xd3 /* Gain select register 8 */
|
||||||
|
|
||||||
#define HX8347D_REG_PGSEL 0xff /* Page select */
|
#define HX8347D_REG_PGSEL 0xff /* Page select */
|
||||||
|
|
||||||
#endif /* _HX8347D_H */
|
#endif /* _HX8347D_H */
|
||||||
|
|
|
@ -1,24 +1,24 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_CONFIG_H
|
#ifndef _GDISP_LLD_CONFIG_H
|
||||||
#define _GDISP_LLD_CONFIG_H
|
#define _GDISP_LLD_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
#if GFX_USE_GDISP
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver hardware support. */
|
/* Driver hardware support. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define GDISP_HARDWARE_STREAM_WRITE GFXON
|
#define GDISP_HARDWARE_STREAM_WRITE GFXON
|
||||||
#define GDISP_HARDWARE_CONTROL GFXON
|
#define GDISP_HARDWARE_CONTROL GFXON
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
||||||
#endif /* _GDISP_LLD_CONFIG_H */
|
#endif /* _GDISP_LLD_CONFIG_H */
|
||||||
|
|
|
@ -4,23 +4,23 @@
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef GDISP_LLD_CONFIG_H
|
#ifndef GDISP_LLD_CONFIG_H
|
||||||
#define GDISP_LLD_CONFIG_H
|
#define GDISP_LLD_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
#if GFX_USE_GDISP
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver hardware support. */
|
/* Driver hardware support. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define GDISP_HARDWARE_STREAM_WRITE GFXON
|
#define GDISP_HARDWARE_STREAM_WRITE GFXON
|
||||||
#define GDISP_HARDWARE_STREAM_READ GFXON
|
#define GDISP_HARDWARE_STREAM_READ GFXON
|
||||||
#define GDISP_HARDWARE_STREAM_POS GFXON
|
#define GDISP_HARDWARE_STREAM_POS GFXON
|
||||||
#define GDISP_HARDWARE_CONTROL GFXON
|
#define GDISP_HARDWARE_CONTROL GFXON
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
||||||
#endif /* _GDISP_LLD_CONFIG_H */
|
#endif /* _GDISP_LLD_CONFIG_H */
|
||||||
|
|
|
@ -55,12 +55,6 @@
|
||||||
#define dummy_read(g) { volatile gU16 dummy; dummy = read_data(g); (void) dummy; }
|
#define dummy_read(g) { volatile gU16 dummy; dummy = read_data(g); (void) dummy; }
|
||||||
#define write_reg(g, reg, data) { write_index(g, reg); write_data(g, data); }
|
#define write_reg(g, reg, data) { write_index(g, reg); write_data(g, data); }
|
||||||
|
|
||||||
// Serial write data for fast fill.
|
|
||||||
#ifndef write_data_repeat
|
|
||||||
#define write_data_repeat(g, data, count) { int i; for (i = 0; i < count; ++i) write_data (g, data) }
|
|
||||||
/* TODO: should use DMA mem2mem */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static void set_cursor(GDisplay *g) {
|
static void set_cursor(GDisplay *g) {
|
||||||
switch(g->g.Orientation) {
|
switch(g->g.Orientation) {
|
||||||
default:
|
default:
|
||||||
|
@ -84,18 +78,18 @@ static void set_viewport(GDisplay* g) {
|
||||||
default:
|
default:
|
||||||
case gOrientation0:
|
case gOrientation0:
|
||||||
case gOrientation180:
|
case gOrientation180:
|
||||||
write_reg(g, LGDP4532_HORIZONTAL_WINDOW_ADDR1, g->p.x);
|
write_reg(g, 0x50, g->p.x);
|
||||||
write_reg(g, LGDP4532_HORIZONTAL_WINDOW_ADDR2, g->p.x + g->p.cx - 1);
|
write_reg(g, 0x51, g->p.x + g->p.cx - 1);
|
||||||
write_reg(g, LGDP4532_VERTICAL_WINDOW_ADDR1, g->p.y);
|
write_reg(g, 0x52, g->p.y);
|
||||||
write_reg(g, LGDP4532_VERTICAL_WINDOW_ADDR2, g->p.y + g->p.cy - 1);
|
write_reg(g, 0x53, g->p.y + g->p.cy - 1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case gOrientation90:
|
case gOrientation90:
|
||||||
case gOrientation270:
|
case gOrientation270:
|
||||||
write_reg(g, LGDP4532_HORIZONTAL_WINDOW_ADDR1, g->p.y);
|
write_reg(g, 0x50, g->p.y);
|
||||||
write_reg(g, LGDP4532_HORIZONTAL_WINDOW_ADDR2, g->p.y + g->p.cy - 1);
|
write_reg(g, 0x51, g->p.y + g->p.cy - 1);
|
||||||
write_reg(g, LGDP4532_VERTICAL_WINDOW_ADDR1, g->p.x);
|
write_reg(g, 0x52, g->p.x);
|
||||||
write_reg(g, LGDP4532_VERTICAL_WINDOW_ADDR2, g->p.x + g->p.cx - 1);
|
write_reg(g, 0x53, g->p.x + g->p.cx - 1);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -116,6 +110,8 @@ LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
setwritemode(g);
|
setwritemode(g);
|
||||||
|
|
||||||
|
// chinese code starts here
|
||||||
|
//############# void Power_Set(void) ################//
|
||||||
write_reg(g, 0x00, 0x0001);
|
write_reg(g, 0x00, 0x0001);
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
|
|
||||||
|
@ -128,24 +124,25 @@ LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
||||||
write_reg(g, 0x12, 0x0010);
|
write_reg(g, 0x12, 0x0010);
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
write_reg(g, 0x10, 0x2620);
|
write_reg(g, 0x10, 0x2620);
|
||||||
write_reg(g, 0x13, 0x344d);
|
write_reg(g, 0x13, 0x344d); //304d
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
|
|
||||||
write_reg(g, 0x01, 0x0100);
|
write_reg(g, 0x01, 0x0100);
|
||||||
write_reg(g, 0x02, 0x0300);
|
write_reg(g, 0x02, 0x0300);
|
||||||
write_reg(g, 0x03, 0x1030);
|
write_reg(g, 0x03, 0x1038);//0x1030
|
||||||
write_reg(g, 0x08, 0x0604);
|
write_reg(g, 0x08, 0x0604);
|
||||||
write_reg(g, 0x09, 0x0000);
|
write_reg(g, 0x09, 0x0000);
|
||||||
write_reg(g, 0x0A, 0x0008);
|
write_reg(g, 0x0A, 0x0008);
|
||||||
|
|
||||||
write_reg(g, 0x41, 0x0002);
|
write_reg(g, 0x41, 0x0002);
|
||||||
write_reg(g, 0x60, 0x2700);
|
write_reg(g, 0x60, 0xA700);
|
||||||
write_reg(g, 0x61, 0x0001);
|
write_reg(g, 0x61, 0x0001);
|
||||||
write_reg(g, 0x90, 0x0182);
|
write_reg(g, 0x90, 0x0182);
|
||||||
write_reg(g, 0x93, 0x0001);
|
write_reg(g, 0x93, 0x0001);
|
||||||
write_reg(g, 0xa3, 0x0010);
|
write_reg(g, 0xa3, 0x0010);
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
|
|
||||||
|
//################# void Gamma_Set(void) ####################//
|
||||||
write_reg(g, 0x30, 0x0000);
|
write_reg(g, 0x30, 0x0000);
|
||||||
write_reg(g, 0x31, 0x0502);
|
write_reg(g, 0x31, 0x0502);
|
||||||
write_reg(g, 0x32, 0x0307);
|
write_reg(g, 0x32, 0x0307);
|
||||||
|
@ -158,6 +155,7 @@ LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
||||||
write_reg(g, 0x39, 0x1505);
|
write_reg(g, 0x39, 0x1505);
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
|
|
||||||
|
//################## void Display_ON(void) ####################//
|
||||||
write_reg(g, 0x07, 0x0001);
|
write_reg(g, 0x07, 0x0001);
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
write_reg(g, 0x07, 0x0021);
|
write_reg(g, 0x07, 0x0021);
|
||||||
|
@ -166,6 +164,7 @@ LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
||||||
write_reg(g, 0x07, 0x0033);
|
write_reg(g, 0x07, 0x0033);
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
write_reg(g, 0x07, 0x0133);
|
write_reg(g, 0x07, 0x0133);
|
||||||
|
// chinese code ends here
|
||||||
|
|
||||||
// Finish Init
|
// Finish Init
|
||||||
post_init_board(g);
|
post_init_board(g);
|
||||||
|
@ -358,36 +357,4 @@ LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
LLDSPEC void gdisp_lld_draw_pixel(GDisplay *g) {
|
|
||||||
set_cursor(g);
|
|
||||||
gdisp_lld_write_color (g);
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_FILLS
|
|
||||||
LLDSPEC void gdisp_lld_fill_area(GDisplay *g) {
|
|
||||||
LLDCOLOR_TYPE c = gdispColor2Native(g->p.color);
|
|
||||||
|
|
||||||
acquire_bus(g);
|
|
||||||
|
|
||||||
// Set view port if drawing more than 1 line, or write not started
|
|
||||||
if (g->p.cy != 1 || !ws) {
|
|
||||||
set_viewport(g);
|
|
||||||
}
|
|
||||||
|
|
||||||
set_cursor(g);
|
|
||||||
write_data_repeat (g,c,g->p.cx*g->p.cy);
|
|
||||||
|
|
||||||
// Restore view port if write started and drawed more than 1 line
|
|
||||||
if (g->p.cy != 1 && ws)
|
|
||||||
{
|
|
||||||
write_reg(g, LGDP4532_HORIZONTAL_WINDOW_ADDR2, svx);
|
|
||||||
write_reg(g, LGDP4532_HORIZONTAL_WINDOW_ADDR1, svx + svcx - 1);
|
|
||||||
write_reg(g, LGDP4532_VERTICAL_WINDOW_ADDR2, svy);
|
|
||||||
write_reg(g, LGDP4532_VERTICAL_WINDOW_ADDR1, svy + svcy - 1);
|
|
||||||
}
|
|
||||||
release_bus(g);
|
|
||||||
}
|
|
||||||
#endif // GDISP_HARDWARE_FILLS
|
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
|
@ -14,18 +14,8 @@
|
||||||
#define GDISP_HARDWARE_STREAM_READ GFXON
|
#define GDISP_HARDWARE_STREAM_READ GFXON
|
||||||
#define GDISP_HARDWARE_STREAM_POS GFXON
|
#define GDISP_HARDWARE_STREAM_POS GFXON
|
||||||
#define GDISP_HARDWARE_CONTROL GFXON
|
#define GDISP_HARDWARE_CONTROL GFXON
|
||||||
#define GDISP_HARDWARE_FILLS GFXON
|
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
||||||
|
|
||||||
/* Horizontal Address Start Position */
|
|
||||||
#define LGDP4532_HORIZONTAL_WINDOW_ADDR1 (0x50u)
|
|
||||||
/* Horizontal Address End Position */
|
|
||||||
#define LGDP4532_HORIZONTAL_WINDOW_ADDR2 (0x51u)
|
|
||||||
/* Vertical Address Start Position */
|
|
||||||
#define LGDP4532_VERTICAL_WINDOW_ADDR1 (0x52u)
|
|
||||||
/* Vertical Address End Position */
|
|
||||||
#define LGDP4532_VERTICAL_WINDOW_ADDR2 (0x53u)
|
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
#endif /* _GDISP_LLD_CONFIG_H */
|
#endif /* _GDISP_LLD_CONFIG_H */
|
||||||
|
|
|
@ -4,65 +4,65 @@
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef GE12_H
|
#ifndef GE12_H
|
||||||
#define GE12_H
|
#define GE12_H
|
||||||
|
|
||||||
// *************************************************************************************
|
// *************************************************************************************
|
||||||
// LCD Include File for Philips PCF8833 STN RGB- 132x132x3 Driver (GE12)
|
// LCD Include File for Philips PCF8833 STN RGB- 132x132x3 Driver (GE12)
|
||||||
//
|
//
|
||||||
// Taken from Philips data sheet Feb 14, 2003
|
// Taken from Philips data sheet Feb 14, 2003
|
||||||
// *************************************************************************************
|
// *************************************************************************************
|
||||||
|
|
||||||
// Philips PCF8833 LCD controller command codes
|
// Philips PCF8833 LCD controller command codes
|
||||||
#define NOP 0x00 // nop
|
#define NOP 0x00 // nop
|
||||||
#define SWRESET 0x01 // software reset
|
#define SWRESET 0x01 // software reset
|
||||||
#define BSTROFF 0x02 // booster voltage OFF
|
#define BSTROFF 0x02 // booster voltage OFF
|
||||||
#define BSTRON 0x03 // booster voltage ON
|
#define BSTRON 0x03 // booster voltage ON
|
||||||
#define RDDIDIF 0x04 // read display identification
|
#define RDDIDIF 0x04 // read display identification
|
||||||
#define RDDST 0x09 // read display status
|
#define RDDST 0x09 // read display status
|
||||||
#define SLEEPIN 0x10 // sleep in
|
#define SLEEPIN 0x10 // sleep in
|
||||||
#define SLEEPOUT 0x11 // sleep out
|
#define SLEEPOUT 0x11 // sleep out
|
||||||
#define PTLON 0x12 // partial display mode
|
#define PTLON 0x12 // partial display mode
|
||||||
#define NORON 0x13 // display normal mode
|
#define NORON 0x13 // display normal mode
|
||||||
#define INVOFF 0x20 // inversion OFF
|
#define INVOFF 0x20 // inversion OFF
|
||||||
#define INVON 0x21 // inversion ON
|
#define INVON 0x21 // inversion ON
|
||||||
#define DALO 0x22 // all pixel OFF
|
#define DALO 0x22 // all pixel OFF
|
||||||
#define DAL 0x23 // all pixel ON
|
#define DAL 0x23 // all pixel ON
|
||||||
#define SETCON 0x25 // write contrast
|
#define SETCON 0x25 // write contrast
|
||||||
#define DISPOFF 0x28 // display OFF
|
#define DISPOFF 0x28 // display OFF
|
||||||
#define DISPON 0x29 // display ON
|
#define DISPON 0x29 // display ON
|
||||||
#define CASET 0x2A // column address set
|
#define CASET 0x2A // column address set
|
||||||
#define PASET 0x2B // page address set
|
#define PASET 0x2B // page address set
|
||||||
#define RAMWR 0x2C // memory write
|
#define RAMWR 0x2C // memory write
|
||||||
#define RGBSET 0x2D // colour set
|
#define RGBSET 0x2D // colour set
|
||||||
#define PTLAR 0x30 // partial area
|
#define PTLAR 0x30 // partial area
|
||||||
#define VSCRDEF 0x33 // vertical scrolling definition
|
#define VSCRDEF 0x33 // vertical scrolling definition
|
||||||
#define TEOFF 0x34 // test mode
|
#define TEOFF 0x34 // test mode
|
||||||
#define TEON 0x35 // test mode
|
#define TEON 0x35 // test mode
|
||||||
#define MADCTL 0x36 // memory access control
|
#define MADCTL 0x36 // memory access control
|
||||||
#define SEP 0x37 // vertical scrolling start address
|
#define SEP 0x37 // vertical scrolling start address
|
||||||
#define IDMOFF 0x38 // idle mode OFF
|
#define IDMOFF 0x38 // idle mode OFF
|
||||||
#define IDMON 0x39 // idle mode ON
|
#define IDMON 0x39 // idle mode ON
|
||||||
#define COLMOD 0x3A // interface pixel format
|
#define COLMOD 0x3A // interface pixel format
|
||||||
#define SETVOP 0xB0 // set Vop
|
#define SETVOP 0xB0 // set Vop
|
||||||
#define BRS 0xB4 // bottom row swap
|
#define BRS 0xB4 // bottom row swap
|
||||||
#define TRS 0xB6 // top row swap
|
#define TRS 0xB6 // top row swap
|
||||||
#define DISCTR 0xB9 // display control
|
#define DISCTR 0xB9 // display control
|
||||||
#define DOR 0xBA // data order
|
#define DOR 0xBA // data order
|
||||||
#define TCDFE 0xBD // enable/disable DF temperature compensation
|
#define TCDFE 0xBD // enable/disable DF temperature compensation
|
||||||
#define TCVOPE 0xBF // enable/disable Vop temp comp
|
#define TCVOPE 0xBF // enable/disable Vop temp comp
|
||||||
#define EC 0xC0 // internal or external oscillator
|
#define EC 0xC0 // internal or external oscillator
|
||||||
#define SETMUL 0xC2 // set multiplication factor
|
#define SETMUL 0xC2 // set multiplication factor
|
||||||
#define TCVOPAB 0xC3 // set TCVOP slopes A and B
|
#define TCVOPAB 0xC3 // set TCVOP slopes A and B
|
||||||
#define TCVOPCD 0xC4 // set TCVOP slopes c and d
|
#define TCVOPCD 0xC4 // set TCVOP slopes c and d
|
||||||
#define TCDF 0xC5 // set divider frequency
|
#define TCDF 0xC5 // set divider frequency
|
||||||
#define DF8COLOR 0xC6 // set divider frequency 8-color mode
|
#define DF8COLOR 0xC6 // set divider frequency 8-color mode
|
||||||
#define SETBS 0xC7 // set bias system
|
#define SETBS 0xC7 // set bias system
|
||||||
#define RDTEMP 0xC8 // temperature read back
|
#define RDTEMP 0xC8 // temperature read back
|
||||||
#define NLI 0xC9 // n-line inversion
|
#define NLI 0xC9 // n-line inversion
|
||||||
#define RDID1 0xDA // read ID1
|
#define RDID1 0xDA // read ID1
|
||||||
#define RDID2 0xDB // read ID2
|
#define RDID2 0xDB // read ID2
|
||||||
#define RDID3 0xDC // read ID3
|
#define RDID3 0xDC // read ID3
|
||||||
|
|
||||||
#endif /* GE12_H */
|
#endif /* GE12_H */
|
||||||
|
|
|
@ -4,21 +4,21 @@
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_CONFIG_H
|
#ifndef _GDISP_LLD_CONFIG_H
|
||||||
#define _GDISP_LLD_CONFIG_H
|
#define _GDISP_LLD_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
#if GFX_USE_GDISP
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver hardware support. */
|
/* Driver hardware support. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define GDISP_HARDWARE_CONTROL GFXON
|
#define GDISP_HARDWARE_CONTROL GFXON
|
||||||
#define GDISP_HARDWARE_STREAM_WRITE GFXON
|
#define GDISP_HARDWARE_STREAM_WRITE GFXON
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB444
|
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB444
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
||||||
#endif /* _GDISP_LLD_CONFIG_H */
|
#endif /* _GDISP_LLD_CONFIG_H */
|
||||||
|
|
|
@ -1,320 +1,320 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* RA6963 Driver
|
/* RA6963 Driver
|
||||||
* Pinout:
|
* Pinout:
|
||||||
* Version 1:
|
* Version 1:
|
||||||
* 1 - Vee Negative Voltage Output
|
* 1 - Vee Negative Voltage Output
|
||||||
* 2 - GND GND
|
* 2 - GND GND
|
||||||
* 3 - +5V
|
* 3 - +5V
|
||||||
* 4 - Vo LCD Driver Supply (10-20k Pot between +5V and Vee)
|
* 4 - Vo LCD Driver Supply (10-20k Pot between +5V and Vee)
|
||||||
* 5 - /WR Write (Low active)
|
* 5 - /WR Write (Low active)
|
||||||
* 6 - /RD Read (Low active)
|
* 6 - /RD Read (Low active)
|
||||||
* 7 - /CE Chip Enable (Low active)
|
* 7 - /CE Chip Enable (Low active)
|
||||||
* 8 - C/D Command or Data
|
* 8 - C/D Command or Data
|
||||||
* 9 - /RST Reset (Low active)
|
* 9 - /RST Reset (Low active)
|
||||||
* 10..17 - D0..7
|
* 10..17 - D0..7
|
||||||
* 18 - FS Font Select
|
* 18 - FS Font Select
|
||||||
* 19 - A Backlight Anode (~4.3V)
|
* 19 - A Backlight Anode (~4.3V)
|
||||||
* 20 - K Backlight Cathode (GND)
|
* 20 - K Backlight Cathode (GND)
|
||||||
*/
|
*/
|
||||||
#ifndef _GDISP_LLD_BOARD_H
|
#ifndef _GDISP_LLD_BOARD_H
|
||||||
#define _GDISP_LLD_BOARD_H
|
#define _GDISP_LLD_BOARD_H
|
||||||
|
|
||||||
// My Settings
|
// My Settings
|
||||||
#define RA6963_NEED_READ GFXOFF //works, but is very slow!
|
#define RA6963_NEED_READ GFXOFF //works, but is very slow!
|
||||||
#define RA6963_HAS_RESET GFXOFF
|
#define RA6963_HAS_RESET GFXOFF
|
||||||
#define RA6963_NEED_FONT_SELECT GFXOFF
|
#define RA6963_NEED_FONT_SELECT GFXOFF
|
||||||
#define RA6963_NEED_BACKLIGHT GFXOFF
|
#define RA6963_NEED_BACKLIGHT GFXOFF
|
||||||
#define RA6963_NEED_PWMBACKLIGHT GFXOFF
|
#define RA6963_NEED_PWMBACKLIGHT GFXOFF
|
||||||
#define GDISP_SCREEN_HEIGHT 64
|
#define GDISP_SCREEN_HEIGHT 64
|
||||||
#define GDISP_SCREEN_WIDTH 128
|
#define GDISP_SCREEN_WIDTH 128
|
||||||
#define GDISP_INITIAL_CONTRAST 50
|
#define GDISP_INITIAL_CONTRAST 50
|
||||||
#define GDISP_INITIAL_BACKLIGHT 100
|
#define GDISP_INITIAL_BACKLIGHT 100
|
||||||
|
|
||||||
#define RA6963_delay(n) {asm("nop");asm("nop");asm("nop");asm("nop");}
|
#define RA6963_delay(n) {asm("nop");asm("nop");asm("nop");asm("nop");}
|
||||||
|
|
||||||
#define LINE_WR PAL_LINE(GPIOB, 8U)
|
#define LINE_WR PAL_LINE(GPIOB, 8U)
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
#define LINE_RD PAL_LINE(GPIOB, 9U)
|
#define LINE_RD PAL_LINE(GPIOB, 9U)
|
||||||
#endif
|
#endif
|
||||||
#define LINE_CE PAL_LINE(GPIOB, 10U)
|
#define LINE_CE PAL_LINE(GPIOB, 10U)
|
||||||
#define LINE_CD PAL_LINE(GPIOB, 11U)
|
#define LINE_CD PAL_LINE(GPIOB, 11U)
|
||||||
#if RA6963_HAS_RESET
|
#if RA6963_HAS_RESET
|
||||||
#define LINE_RST PAL_LINE(GPIOB, 12U)
|
#define LINE_RST PAL_LINE(GPIOB, 12U)
|
||||||
#endif
|
#endif
|
||||||
#define LINE_D0 PAL_LINE(GPIOB, 0U)
|
#define LINE_D0 PAL_LINE(GPIOB, 0U)
|
||||||
#define LINE_D1 PAL_LINE(GPIOB, 1U)
|
#define LINE_D1 PAL_LINE(GPIOB, 1U)
|
||||||
#define LINE_D2 PAL_LINE(GPIOB, 2U)
|
#define LINE_D2 PAL_LINE(GPIOB, 2U)
|
||||||
#define LINE_D3 PAL_LINE(GPIOB, 3U)
|
#define LINE_D3 PAL_LINE(GPIOB, 3U)
|
||||||
#define LINE_D4 PAL_LINE(GPIOB, 4U)
|
#define LINE_D4 PAL_LINE(GPIOB, 4U)
|
||||||
#define LINE_D5 PAL_LINE(GPIOB, 5U)
|
#define LINE_D5 PAL_LINE(GPIOB, 5U)
|
||||||
#define LINE_D6 PAL_LINE(GPIOB, 6U)
|
#define LINE_D6 PAL_LINE(GPIOB, 6U)
|
||||||
#define LINE_D7 PAL_LINE(GPIOB, 7U)
|
#define LINE_D7 PAL_LINE(GPIOB, 7U)
|
||||||
#if RA6963_NEED_FONT_SELECT
|
#if RA6963_NEED_FONT_SELECT
|
||||||
#define LINE_FS PAL_LINE(GPIOA, 13U)
|
#define LINE_FS PAL_LINE(GPIOA, 13U)
|
||||||
#endif
|
#endif
|
||||||
#if RA6963_NEED_BACKLIGHT
|
#if RA6963_NEED_BACKLIGHT
|
||||||
#define LINE_BL PAL_LINE(GPIOA, 14U)
|
#define LINE_BL PAL_LINE(GPIOA, 14U)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
ioline_t WR; //Write PIN
|
ioline_t WR; //Write PIN
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
ioline_t RD; //Read PIN (tie to +5V if not needed)
|
ioline_t RD; //Read PIN (tie to +5V if not needed)
|
||||||
#endif
|
#endif
|
||||||
ioline_t CE; //Chip Enable PIN
|
ioline_t CE; //Chip Enable PIN
|
||||||
ioline_t CD; //Command/Data Select PIN
|
ioline_t CD; //Command/Data Select PIN
|
||||||
#if RA6963_HAS_RESET
|
#if RA6963_HAS_RESET
|
||||||
ioline_t RST; //Reset PIN (tie to +5V if not needed)
|
ioline_t RST; //Reset PIN (tie to +5V if not needed)
|
||||||
#endif
|
#endif
|
||||||
ioline_t D[8]; //Data PINs
|
ioline_t D[8]; //Data PINs
|
||||||
#if RA6963_NEED_BACKLIGHT
|
#if RA6963_NEED_BACKLIGHT
|
||||||
ioline_t BL; //Backlight PIN
|
ioline_t BL; //Backlight PIN
|
||||||
#endif
|
#endif
|
||||||
#if RA6963_NEED_FONT_SELECT
|
#if RA6963_NEED_FONT_SELECT
|
||||||
ioline_t FS; //Font Select PIN (tie to GND if not needed)
|
ioline_t FS; //Font Select PIN (tie to GND if not needed)
|
||||||
#endif
|
#endif
|
||||||
} lcd_pins_t;
|
} lcd_pins_t;
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver local variables. */
|
/* Driver local variables. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
static const lcd_pins_t lcdpins = {
|
static const lcd_pins_t lcdpins = {
|
||||||
LINE_WR,
|
LINE_WR,
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
LINE_RD,
|
LINE_RD,
|
||||||
#endif
|
#endif
|
||||||
LINE_CE,
|
LINE_CE,
|
||||||
LINE_CD,
|
LINE_CD,
|
||||||
#if RA6963_HAS_RESET
|
#if RA6963_HAS_RESET
|
||||||
LINE_RST,
|
LINE_RST,
|
||||||
#endif
|
#endif
|
||||||
{
|
{
|
||||||
LINE_D0,
|
LINE_D0,
|
||||||
LINE_D1,
|
LINE_D1,
|
||||||
LINE_D2,
|
LINE_D2,
|
||||||
LINE_D3,
|
LINE_D3,
|
||||||
LINE_D4,
|
LINE_D4,
|
||||||
LINE_D5,
|
LINE_D5,
|
||||||
LINE_D6,
|
LINE_D6,
|
||||||
LINE_D7
|
LINE_D7
|
||||||
},
|
},
|
||||||
#if RA6963_NEED_BACKLIGHT
|
#if RA6963_NEED_BACKLIGHT
|
||||||
LINE_BL,
|
LINE_BL,
|
||||||
#endif
|
#endif
|
||||||
#if RA6963_NEED_FONT_SELECT
|
#if RA6963_NEED_FONT_SELECT
|
||||||
LINE_FS,
|
LINE_FS,
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
static GFXINLINE void init_board(GDisplay* g){
|
static GFXINLINE void init_board(GDisplay* g){
|
||||||
(void) g;
|
(void) g;
|
||||||
g->board = 0;
|
g->board = 0;
|
||||||
int ii;
|
int ii;
|
||||||
//################################DEBUG#######################################
|
//################################DEBUG#######################################
|
||||||
#define DEB13_ON palClearLine(PAL_LINE(GPIOB, 13U))
|
#define DEB13_ON palClearLine(PAL_LINE(GPIOB, 13U))
|
||||||
#define DEB13_OFF palSetLine(PAL_LINE(GPIOB, 13U))
|
#define DEB13_OFF palSetLine(PAL_LINE(GPIOB, 13U))
|
||||||
#define DEB14_ON palClearLine(PAL_LINE(GPIOB, 14U))
|
#define DEB14_ON palClearLine(PAL_LINE(GPIOB, 14U))
|
||||||
#define DEB14_OFF palSetLine(PAL_LINE(GPIOB, 14U))
|
#define DEB14_OFF palSetLine(PAL_LINE(GPIOB, 14U))
|
||||||
|
|
||||||
palSetLineMode(PAL_LINE(GPIOB, 13U), PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(PAL_LINE(GPIOB, 13U), PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
DEB13_OFF;
|
DEB13_OFF;
|
||||||
palSetLineMode(PAL_LINE(GPIOB, 14U), PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(PAL_LINE(GPIOB, 14U), PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
DEB14_OFF;
|
DEB14_OFF;
|
||||||
|
|
||||||
//################################DEBUG#######################################
|
//################################DEBUG#######################################
|
||||||
|
|
||||||
palSetLineMode(lcdpins.WR, PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(lcdpins.WR, PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
palSetLine(lcdpins.WR);
|
palSetLine(lcdpins.WR);
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
palSetLineMode(lcdpins.RD, PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(lcdpins.RD, PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
palSetLine(lcdpins.RD);
|
palSetLine(lcdpins.RD);
|
||||||
#endif
|
#endif
|
||||||
palSetLineMode(lcdpins.CE, PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(lcdpins.CE, PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
palSetLine(lcdpins.CE);
|
palSetLine(lcdpins.CE);
|
||||||
palSetLineMode(lcdpins.CD, PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(lcdpins.CD, PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
palSetLine(lcdpins.CD);
|
palSetLine(lcdpins.CD);
|
||||||
#if RA6963_HAS_RESET
|
#if RA6963_HAS_RESET
|
||||||
palSetLine(lcdpins.RST);
|
palSetLine(lcdpins.RST);
|
||||||
palSetLineMode(lcdpins.RST, PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(lcdpins.RST, PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
for(ii = 0; ii < 8; ii++) {
|
for(ii = 0; ii < 8; ii++) {
|
||||||
palSetLineMode(lcdpins.D[ii], PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(lcdpins.D[ii], PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
palClearLine(lcdpins.D[ii]);
|
palClearLine(lcdpins.D[ii]);
|
||||||
}
|
}
|
||||||
#if RA6963_NEED_BACKLIGHT
|
#if RA6963_NEED_BACKLIGHT
|
||||||
#if RA6963_NEED_PWMBACKLIGHT
|
#if RA6963_NEED_PWMBACKLIGHT
|
||||||
palSetLineMode(lcdpins.BL, PAL_MODE_ALTERNATE(1));
|
palSetLineMode(lcdpins.BL, PAL_MODE_ALTERNATE(1));
|
||||||
#else
|
#else
|
||||||
palSetLineMode(lcdpins.BL, PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(lcdpins.BL, PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
#if RA6963_NEED_FONT_SELECT
|
#if RA6963_NEED_FONT_SELECT
|
||||||
palSetLineMode(lcdpins.FS, PAL_MODE_OUTPUT_PUSHPULL);
|
palSetLineMode(lcdpins.FS, PAL_MODE_OUTPUT_PUSHPULL);
|
||||||
palSetLine(lcdpins.FS);
|
palSetLine(lcdpins.FS);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void post_init_board(GDisplay *g) {
|
static GFXINLINE void post_init_board(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
|
static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
|
||||||
(void) g;
|
(void) g;
|
||||||
#if RA6963_HAS_RESET //Make Hardware Reset
|
#if RA6963_HAS_RESET //Make Hardware Reset
|
||||||
if (state)
|
if (state)
|
||||||
palClearLine(lcdpins.RST);
|
palClearLine(lcdpins.RST);
|
||||||
else
|
else
|
||||||
palSetLine(lcdpins.RST);
|
palSetLine(lcdpins.RST);
|
||||||
#else
|
#else
|
||||||
(void) state;
|
(void) state;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
|
static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
|
||||||
(void) g;
|
(void) g;
|
||||||
(void) percent;
|
(void) percent;
|
||||||
#if RA6963_NEED_BACKLIGHT
|
#if RA6963_NEED_BACKLIGHT
|
||||||
#if RA6963_NEED_PWMBACKLIGHT
|
#if RA6963_NEED_PWMBACKLIGHT
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void acquire_bus(GDisplay *g) {
|
static GFXINLINE void acquire_bus(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void release_bus(GDisplay *g) {
|
static GFXINLINE void release_bus(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
static GFXINLINE gU8 RA6963_busy_wait(gU8 pattern, gBool lh){
|
static GFXINLINE gU8 RA6963_busy_wait(gU8 pattern, gBool lh){
|
||||||
|
|
||||||
gU8 data;
|
gU8 data;
|
||||||
int ii;
|
int ii;
|
||||||
|
|
||||||
for(ii = 0; ii < 2; ii++) //Only interested in Bit 0 and 1
|
for(ii = 0; ii < 2; ii++) //Only interested in Bit 0 and 1
|
||||||
palSetLineMode(lcdpins.D[ii], PAL_MODE_INPUT); //Set pads to input
|
palSetLineMode(lcdpins.D[ii], PAL_MODE_INPUT); //Set pads to input
|
||||||
|
|
||||||
palClearLine(lcdpins.CE);
|
palClearLine(lcdpins.CE);
|
||||||
palClearLine(lcdpins.RD);
|
palClearLine(lcdpins.RD);
|
||||||
do{
|
do{
|
||||||
data = 0;
|
data = 0;
|
||||||
|
|
||||||
for(ii = 0; ii < 2; ii++){
|
for(ii = 0; ii < 2; ii++){
|
||||||
if (palReadLine(lcdpins.D[ii]) == PAL_HIGH){ //Read output
|
if (palReadLine(lcdpins.D[ii]) == PAL_HIGH){ //Read output
|
||||||
data |= (1<<ii);
|
data |= (1<<ii);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} while ((data & pattern) == lh);
|
} while ((data & pattern) == lh);
|
||||||
|
|
||||||
palSetLine(lcdpins.CE);
|
palSetLine(lcdpins.CE);
|
||||||
palSetLine(lcdpins.RD);
|
palSetLine(lcdpins.RD);
|
||||||
for(ii = 0; ii < 2; ii++) {
|
for(ii = 0; ii < 2; ii++) {
|
||||||
palSetLineMode(lcdpins.D[ii], PAL_MODE_OUTPUT_PUSHPULL); //Set pads to output
|
palSetLineMode(lcdpins.D[ii], PAL_MODE_OUTPUT_PUSHPULL); //Set pads to output
|
||||||
}
|
}
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static GFXINLINE void RA6963_write(gU8 value){
|
static GFXINLINE void RA6963_write(gU8 value){
|
||||||
int ii;
|
int ii;
|
||||||
for(ii = 0; ii < 8; ii++){
|
for(ii = 0; ii < 8; ii++){
|
||||||
if(value & (1 << ii))
|
if(value & (1 << ii))
|
||||||
palSetLine(lcdpins.D[ii]);
|
palSetLine(lcdpins.D[ii]);
|
||||||
else
|
else
|
||||||
palClearLine(lcdpins.D[ii]);
|
palClearLine(lcdpins.D[ii]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void write_data(GDisplay* g, gU8 data){
|
static GFXINLINE void write_data(GDisplay* g, gU8 data){
|
||||||
(void)g;
|
(void)g;
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
RA6963_busy_wait(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2, ~(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2));
|
RA6963_busy_wait(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2, ~(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2));
|
||||||
#endif
|
#endif
|
||||||
RA6963_write(data);
|
RA6963_write(data);
|
||||||
palClearLine(lcdpins.CD);
|
palClearLine(lcdpins.CD);
|
||||||
palClearLine(lcdpins.CE);
|
palClearLine(lcdpins.CE);
|
||||||
palClearLine(lcdpins.WR);
|
palClearLine(lcdpins.WR);
|
||||||
RA6963_delay(1);
|
RA6963_delay(1);
|
||||||
palSetLine(lcdpins.WR);
|
palSetLine(lcdpins.WR);
|
||||||
palSetLine(lcdpins.CE);
|
palSetLine(lcdpins.CE);
|
||||||
palSetLine(lcdpins.CD);
|
palSetLine(lcdpins.CD);
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void write_cmd(GDisplay* g, gU8 data){
|
static GFXINLINE void write_cmd(GDisplay* g, gU8 data){
|
||||||
(void)g;
|
(void)g;
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
RA6963_busy_wait(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2, ~(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2));
|
RA6963_busy_wait(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2, ~(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2));
|
||||||
#endif
|
#endif
|
||||||
RA6963_write(data);
|
RA6963_write(data);
|
||||||
palClearLine(lcdpins.CE);
|
palClearLine(lcdpins.CE);
|
||||||
palClearLine(lcdpins.WR);
|
palClearLine(lcdpins.WR);
|
||||||
RA6963_delay(1);
|
RA6963_delay(1);
|
||||||
palSetLine(lcdpins.WR);
|
palSetLine(lcdpins.WR);
|
||||||
palSetLine(lcdpins.CE);
|
palSetLine(lcdpins.CE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void setreadmode(GDisplay *g) {
|
static GFXINLINE void setreadmode(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE void setwritemode(GDisplay *g) {
|
static GFXINLINE void setwritemode(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
}
|
}
|
||||||
|
|
||||||
static GFXINLINE gU8 read_data(GDisplay *g) {
|
static GFXINLINE gU8 read_data(GDisplay *g) {
|
||||||
(void) g;
|
(void) g;
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
int ii;
|
int ii;
|
||||||
gU8 data;
|
gU8 data;
|
||||||
write_cmd(g, RA6963_DATA_READ_AND_NONVARIABLE);
|
write_cmd(g, RA6963_DATA_READ_AND_NONVARIABLE);
|
||||||
//RA6963_busy_wait(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2, ~(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2));
|
//RA6963_busy_wait(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2, ~(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2));
|
||||||
|
|
||||||
for(ii = 0; ii < 8; ii++)
|
for(ii = 0; ii < 8; ii++)
|
||||||
palSetLineMode(lcdpins.D[ii], PAL_MODE_INPUT); //Set pads to input
|
palSetLineMode(lcdpins.D[ii], PAL_MODE_INPUT); //Set pads to input
|
||||||
|
|
||||||
palClearLine(lcdpins.CE);
|
palClearLine(lcdpins.CE);
|
||||||
palClearLine(lcdpins.RD);
|
palClearLine(lcdpins.RD);
|
||||||
do{
|
do{
|
||||||
data = 0;
|
data = 0;
|
||||||
|
|
||||||
for(ii = 0; ii < 2; ii++){
|
for(ii = 0; ii < 2; ii++){
|
||||||
if (palReadLine(lcdpins.D[ii]) == PAL_HIGH){ //Read output
|
if (palReadLine(lcdpins.D[ii]) == PAL_HIGH){ //Read output
|
||||||
data |= (1<<ii);
|
data |= (1<<ii);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} while ((data & (RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2)) == ~(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2));
|
} while ((data & (RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2)) == ~(RA6963_STATUS_BUSY1 | RA6963_STATUS_BUSY2));
|
||||||
|
|
||||||
palClearLine(lcdpins.CD);
|
palClearLine(lcdpins.CD);
|
||||||
// RA6963_delay(1);
|
// RA6963_delay(1);
|
||||||
data = 0;
|
data = 0;
|
||||||
for(ii = 0; ii < 8; ii++){
|
for(ii = 0; ii < 8; ii++){
|
||||||
if (palReadLine(lcdpins.D[ii]) == PAL_HIGH){ //Read output
|
if (palReadLine(lcdpins.D[ii]) == PAL_HIGH){ //Read output
|
||||||
data |= (1<<ii);
|
data |= (1<<ii);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
palSetLine(lcdpins.CE);
|
palSetLine(lcdpins.CE);
|
||||||
palSetLine(lcdpins.RD);
|
palSetLine(lcdpins.RD);
|
||||||
palSetLine(lcdpins.CD);
|
palSetLine(lcdpins.CD);
|
||||||
for(ii = 0; ii < 8; ii++) {
|
for(ii = 0; ii < 8; ii++) {
|
||||||
palSetLineMode(lcdpins.D[ii], PAL_MODE_OUTPUT_PUSHPULL); //Set pads to output
|
palSetLineMode(lcdpins.D[ii], PAL_MODE_OUTPUT_PUSHPULL); //Set pads to output
|
||||||
}
|
}
|
||||||
return data;
|
return data;
|
||||||
#else
|
#else
|
||||||
return 0;
|
return 0;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
#endif /* _GDISP_LLD_BOARD_H */
|
#endif /* _GDISP_LLD_BOARD_H */
|
||||||
|
|
|
@ -1,413 +1,413 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
/* Robert Offner 2017
|
/* Robert Offner 2017
|
||||||
* This is a driver for the RA6963 or T6963 Displays.
|
* This is a driver for the RA6963 or T6963 Displays.
|
||||||
* It should work with displays up to 240 pixel in width and 64 pixel in height
|
* It should work with displays up to 240 pixel in width and 64 pixel in height
|
||||||
* ATTENTION some newer displays on ebay look like T6963 Type but they're not!
|
* ATTENTION some newer displays on ebay look like T6963 Type but they're not!
|
||||||
* They use a new controller: ST7920. These are easy to identify: NO CS pin but
|
* They use a new controller: ST7920. These are easy to identify: NO CS pin but
|
||||||
* a PSB Pin which switches from parallel to serial communication mode.
|
* a PSB Pin which switches from parallel to serial communication mode.
|
||||||
* If it cost less than 10.- it is probably a ST7920.
|
* If it cost less than 10.- it is probably a ST7920.
|
||||||
*
|
*
|
||||||
* Version: 0.1
|
* Version: 0.1
|
||||||
*
|
*
|
||||||
* History:
|
* History:
|
||||||
*
|
*
|
||||||
* v0.1 Initial Release
|
* v0.1 Initial Release
|
||||||
* .) tested with readback and without on a 72MHz STM32F103. Display ws a 128x64
|
* .) tested with readback and without on a 72MHz STM32F103. Display ws a 128x64
|
||||||
* type Graphic LCD (Looks like KS0108 Types). STREAM_READ is not implemented.
|
* type Graphic LCD (Looks like KS0108 Types). STREAM_READ is not implemented.
|
||||||
*/
|
*/
|
||||||
#include "gfx.h"
|
#include "gfx.h"
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
#if GFX_USE_GDISP
|
||||||
#define GDISP_DRIVER_VMT GDISPVMT_RA6963
|
#define GDISP_DRIVER_VMT GDISPVMT_RA6963
|
||||||
|
|
||||||
#include "gdisp_lld_config.h"
|
#include "gdisp_lld_config.h"
|
||||||
#include "src/gdisp/gdisp_driver.h"
|
#include "src/gdisp/gdisp_driver.h"
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver local definitions. */
|
/* Driver local definitions. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
#if defined(GDISP_SCREEN_HEIGHT) || defined(GDISP_SCREEN_HEIGHT)
|
#if defined(GDISP_SCREEN_HEIGHT) || defined(GDISP_SCREEN_HEIGHT)
|
||||||
#if GFX_COMPILER_WARNING_TYPE == GFX_COMPILER_WARNING_DIRECT
|
#if GFX_COMPILER_WARNING_TYPE == GFX_COMPILER_WARNING_DIRECT
|
||||||
#warning "GDISP: This low level driver does not support setting a screen size. It is being ignored."
|
#warning "GDISP: This low level driver does not support setting a screen size. It is being ignored."
|
||||||
#elif GFX_COMPILER_WARNING_TYPE == GFX_COMPILER_WARNING_MACRO
|
#elif GFX_COMPILER_WARNING_TYPE == GFX_COMPILER_WARNING_MACRO
|
||||||
COMPILER_WARNING("GDISP: This low level driver does not support setting a screen size. It is being ignored.")
|
COMPILER_WARNING("GDISP: This low level driver does not support setting a screen size. It is being ignored.")
|
||||||
#endif
|
#endif
|
||||||
#undef GDISP_SCREEN_WIDTH
|
#undef GDISP_SCREEN_WIDTH
|
||||||
#undef GDISP_SCREEN_HEIGHT
|
#undef GDISP_SCREEN_HEIGHT
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#include "board_RA6963.h"
|
#include "board_RA6963.h"
|
||||||
|
|
||||||
// RA6963 Commands
|
// RA6963 Commands
|
||||||
//Register Setting
|
//Register Setting
|
||||||
#define RA6963_SET_CURSOR_POINTER 0x21
|
#define RA6963_SET_CURSOR_POINTER 0x21
|
||||||
#define RA6963_SET_OFFSET_REGISTER 0x22
|
#define RA6963_SET_OFFSET_REGISTER 0x22
|
||||||
#define RA6963_SET_ADDRESS_POINTER 0x24
|
#define RA6963_SET_ADDRESS_POINTER 0x24
|
||||||
//Set Control Word
|
//Set Control Word
|
||||||
#define RA6963_SET_TEXT_HOME_ADDRESS 0x40
|
#define RA6963_SET_TEXT_HOME_ADDRESS 0x40
|
||||||
#define RA6963_SET_TEXT_AREA 0x41
|
#define RA6963_SET_TEXT_AREA 0x41
|
||||||
#define RA6963_SET_GRAPHIC_HOME_ADDRESS 0x42
|
#define RA6963_SET_GRAPHIC_HOME_ADDRESS 0x42
|
||||||
#define RA6963_SET_GRAPHIC_AREA 0x43
|
#define RA6963_SET_GRAPHIC_AREA 0x43
|
||||||
//Mode Set
|
//Mode Set
|
||||||
#define RA6963_MODE_SET 0x80
|
#define RA6963_MODE_SET 0x80
|
||||||
#define RA6963_MODE_OR 0x00
|
#define RA6963_MODE_OR 0x00
|
||||||
#define RA6963_MODE_XOR 0x01
|
#define RA6963_MODE_XOR 0x01
|
||||||
#define RA6963_MODE_AND 0x03
|
#define RA6963_MODE_AND 0x03
|
||||||
#define RA6963_MODE_TEXT_ATTRIBUTE 0x04
|
#define RA6963_MODE_TEXT_ATTRIBUTE 0x04
|
||||||
#define RA6963_MODE_INTERNAL_CGROM 0x00
|
#define RA6963_MODE_INTERNAL_CGROM 0x00
|
||||||
#define RA6963_MODE_EXTERNAL_CGRAM 0x08
|
#define RA6963_MODE_EXTERNAL_CGRAM 0x08
|
||||||
//Display Mode
|
//Display Mode
|
||||||
#define RA6963_DISPLAY_MODE 0x90
|
#define RA6963_DISPLAY_MODE 0x90
|
||||||
#define RA6963_CURSOR_BLINK_ON 0x01
|
#define RA6963_CURSOR_BLINK_ON 0x01
|
||||||
#define RA6963_CURSOR_DISPLAY_ON 0x02
|
#define RA6963_CURSOR_DISPLAY_ON 0x02
|
||||||
#define RA6963_TEXT_DISPLAY_ON 0x04
|
#define RA6963_TEXT_DISPLAY_ON 0x04
|
||||||
#define RA6963_GRAPHIC_DISPLAY_ON 0x08
|
#define RA6963_GRAPHIC_DISPLAY_ON 0x08
|
||||||
//Cursor Pattern Select
|
//Cursor Pattern Select
|
||||||
#define RA6963_CURSOR_PATTERN_SELECT 0xA0
|
#define RA6963_CURSOR_PATTERN_SELECT 0xA0
|
||||||
#define RA6963_CURSOR_1_LINE 0x00
|
#define RA6963_CURSOR_1_LINE 0x00
|
||||||
#define RA6963_CURSOR_2_LINE 0x01
|
#define RA6963_CURSOR_2_LINE 0x01
|
||||||
#define RA6963_CURSOR_3_LINE 0x02
|
#define RA6963_CURSOR_3_LINE 0x02
|
||||||
#define RA6963_CURSOR_4_LINE 0x03
|
#define RA6963_CURSOR_4_LINE 0x03
|
||||||
#define RA6963_CURSOR_5_LINE 0x04
|
#define RA6963_CURSOR_5_LINE 0x04
|
||||||
#define RA6963_CURSOR_6_LINE 0x05
|
#define RA6963_CURSOR_6_LINE 0x05
|
||||||
#define RA6963_CURSOR_7_LINE 0x06
|
#define RA6963_CURSOR_7_LINE 0x06
|
||||||
#define RA6963_CURSOR_8_LINE 0x07
|
#define RA6963_CURSOR_8_LINE 0x07
|
||||||
//Data Read/Write
|
//Data Read/Write
|
||||||
#define RA6963_DATA_WRITE_AND_INCREMENT 0xC0
|
#define RA6963_DATA_WRITE_AND_INCREMENT 0xC0
|
||||||
#define RA6963_DATA_READ_AND_INCREMENT 0xC1
|
#define RA6963_DATA_READ_AND_INCREMENT 0xC1
|
||||||
#define RA6963_DATA_WRITE_AND_DECREMENT 0xC2
|
#define RA6963_DATA_WRITE_AND_DECREMENT 0xC2
|
||||||
#define RA6963_DATA_READ_AND_DECREMENT 0xC3
|
#define RA6963_DATA_READ_AND_DECREMENT 0xC3
|
||||||
#define RA6963_DATA_WRITE_AND_NONVARIALBE 0xC4
|
#define RA6963_DATA_WRITE_AND_NONVARIALBE 0xC4
|
||||||
#define RA6963_DATA_READ_AND_NONVARIABLE 0xC5
|
#define RA6963_DATA_READ_AND_NONVARIABLE 0xC5
|
||||||
//Data auto Read/Write
|
//Data auto Read/Write
|
||||||
#define RA6963_SET_DATA_AUTO_WRITE 0xB0
|
#define RA6963_SET_DATA_AUTO_WRITE 0xB0
|
||||||
#define RA6963_SET_DATA_AUTO_READ 0xB1
|
#define RA6963_SET_DATA_AUTO_READ 0xB1
|
||||||
#define RA6963_AUTO_RESET 0xB2
|
#define RA6963_AUTO_RESET 0xB2
|
||||||
//Screen Peek
|
//Screen Peek
|
||||||
#define RA6963_SCREEN_PEEK 0xE0
|
#define RA6963_SCREEN_PEEK 0xE0
|
||||||
//Screen copy
|
//Screen copy
|
||||||
#define RA6963_SCREEN_COPY 0xE8
|
#define RA6963_SCREEN_COPY 0xE8
|
||||||
// Status Register Bits
|
// Status Register Bits
|
||||||
#define RA6963_STATUS_BUSY1 0x01
|
#define RA6963_STATUS_BUSY1 0x01
|
||||||
#define RA6963_STATUS_BUSY2 0x02
|
#define RA6963_STATUS_BUSY2 0x02
|
||||||
#define RA6963_STATUS_DARRDY 0x04
|
#define RA6963_STATUS_DARRDY 0x04
|
||||||
#define RA6963_STATUS_DAWRDY 0x08
|
#define RA6963_STATUS_DAWRDY 0x08
|
||||||
|
|
||||||
#ifndef GDISP_SCREEN_HEIGHT
|
#ifndef GDISP_SCREEN_HEIGHT
|
||||||
#define GDISP_SCREEN_HEIGHT 64
|
#define GDISP_SCREEN_HEIGHT 64
|
||||||
#endif
|
#endif
|
||||||
#ifndef GDISP_SCREEN_WIDTH
|
#ifndef GDISP_SCREEN_WIDTH
|
||||||
#define GDISP_SCREEN_WIDTH 128
|
#define GDISP_SCREEN_WIDTH 128
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define RA6963_FONT_WIDTH 8
|
#define RA6963_FONT_WIDTH 8
|
||||||
|
|
||||||
#define RA6963_GRAPHIC_AREA (GDISP_SCREEN_WIDTH / RA6963_FONT_WIDTH) //16
|
#define RA6963_GRAPHIC_AREA (GDISP_SCREEN_WIDTH / RA6963_FONT_WIDTH) //16
|
||||||
#define RA6963_TEXT_AREA (GDISP_SCREEN_WIDTH / RA6963_FONT_WIDTH) //16
|
#define RA6963_TEXT_AREA (GDISP_SCREEN_WIDTH / RA6963_FONT_WIDTH) //16
|
||||||
#define RA6963_GRAPHIC_SIZE (RA6963_GRAPHIC_AREA * GDISP_SCREEN_HEIGHT) //1024
|
#define RA6963_GRAPHIC_SIZE (RA6963_GRAPHIC_AREA * GDISP_SCREEN_HEIGHT) //1024
|
||||||
#define RA6963_TEXT_SIZE (RA6963_TEXT_AREA * (GDISP_SCREEN_HEIGHT/8))//128
|
#define RA6963_TEXT_SIZE (RA6963_TEXT_AREA * (GDISP_SCREEN_HEIGHT/8))//128
|
||||||
//#define RA6963_TEXT_HOME 0
|
//#define RA6963_TEXT_HOME 0
|
||||||
//#define RA6963_GRAPHIC_HOME (RA6963_TEXT_HOME + RA6963_TEXT_SIZE) //128
|
//#define RA6963_GRAPHIC_HOME (RA6963_TEXT_HOME + RA6963_TEXT_SIZE) //128
|
||||||
#define RA6963_GRAPHIC_HOME 0
|
#define RA6963_GRAPHIC_HOME 0
|
||||||
#define RA6963_TEXT_HOME (RA6963_GRAPHIC_HOME + RA6963_GRAPHIC_SIZE)
|
#define RA6963_TEXT_HOME (RA6963_GRAPHIC_HOME + RA6963_GRAPHIC_SIZE)
|
||||||
//#define RA6963_OFFSET_REGISTER 2
|
//#define RA6963_OFFSET_REGISTER 2
|
||||||
|
|
||||||
#if !RA6963_NEED_READ
|
#if !RA6963_NEED_READ
|
||||||
#define BUFFSZ (RA6963_GRAPHIC_SIZE)
|
#define BUFFSZ (RA6963_GRAPHIC_SIZE)
|
||||||
#define RAM(g) ((gU8 *)g->priv)
|
#define RAM(g) ((gU8 *)g->priv)
|
||||||
#define POS (((g->p.x) / RA6963_FONT_WIDTH) + ((g->p.y) * RA6963_GRAPHIC_AREA))
|
#define POS (((g->p.x) / RA6963_FONT_WIDTH) + ((g->p.y) * RA6963_GRAPHIC_AREA))
|
||||||
#endif
|
#endif
|
||||||
#ifndef GDISP_INITIAL_CONTRAST
|
#ifndef GDISP_INITIAL_CONTRAST
|
||||||
#define GDISP_INITIAL_CONTRAST 50
|
#define GDISP_INITIAL_CONTRAST 50
|
||||||
#endif
|
#endif
|
||||||
#ifndef GDISP_INITIAL_BACKLIGHT
|
#ifndef GDISP_INITIAL_BACKLIGHT
|
||||||
#define GDISP_INITIAL_BACKLIGHT 100
|
#define GDISP_INITIAL_BACKLIGHT 100
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver local functions. */
|
/* Driver local functions. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
#ifndef write_data_repeat
|
#ifndef write_data_repeat
|
||||||
#define write_data_repeat(g, data, count) { int i; for (i = 0; i < count; ++i) write_data (g, data); }
|
#define write_data_repeat(g, data, count) { int i; for (i = 0; i < count; ++i) write_data (g, data); }
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver exported functions. */
|
/* Driver exported functions. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
g->priv = 0;
|
g->priv = 0;
|
||||||
#else
|
#else
|
||||||
// The private area is the display surface.
|
// The private area is the display surface.
|
||||||
g->priv = gfxAlloc(BUFFSZ);
|
g->priv = gfxAlloc(BUFFSZ);
|
||||||
#endif
|
#endif
|
||||||
// Initialise the board interface
|
// Initialise the board interface
|
||||||
init_board(g);
|
init_board(g);
|
||||||
|
|
||||||
#if RA6963_HAS_RESET //Make Hardware Reset
|
#if RA6963_HAS_RESET //Make Hardware Reset
|
||||||
setpin_reset(g, gTrue);
|
setpin_reset(g, gTrue);
|
||||||
gfxSleepMilliseconds(100);
|
gfxSleepMilliseconds(100);
|
||||||
setpin_reset(g, gFalse);
|
setpin_reset(g, gFalse);
|
||||||
#endif
|
#endif
|
||||||
gfxSleepMilliseconds(50);
|
gfxSleepMilliseconds(50);
|
||||||
//RA6963 needs Data first THEN command!
|
//RA6963 needs Data first THEN command!
|
||||||
|
|
||||||
write_data(g, (gU8)RA6963_GRAPHIC_HOME); //0
|
write_data(g, (gU8)RA6963_GRAPHIC_HOME); //0
|
||||||
write_data(g, (gU8)(RA6963_GRAPHIC_HOME>>8)); //0
|
write_data(g, (gU8)(RA6963_GRAPHIC_HOME>>8)); //0
|
||||||
write_cmd(g, RA6963_SET_GRAPHIC_HOME_ADDRESS); //0x42
|
write_cmd(g, RA6963_SET_GRAPHIC_HOME_ADDRESS); //0x42
|
||||||
|
|
||||||
write_data(g, (gU8)RA6963_GRAPHIC_AREA); //16
|
write_data(g, (gU8)RA6963_GRAPHIC_AREA); //16
|
||||||
write_data(g, 0); //0
|
write_data(g, 0); //0
|
||||||
write_cmd(g, RA6963_SET_GRAPHIC_AREA); //0x43
|
write_cmd(g, RA6963_SET_GRAPHIC_AREA); //0x43
|
||||||
|
|
||||||
write_data(g, (gU8)RA6963_TEXT_HOME); //0x00
|
write_data(g, (gU8)RA6963_TEXT_HOME); //0x00
|
||||||
write_data(g, (gU8)(RA6963_TEXT_HOME>>8)); //0x04 = 0x400
|
write_data(g, (gU8)(RA6963_TEXT_HOME>>8)); //0x04 = 0x400
|
||||||
write_cmd(g, RA6963_SET_TEXT_HOME_ADDRESS); //0x40
|
write_cmd(g, RA6963_SET_TEXT_HOME_ADDRESS); //0x40
|
||||||
|
|
||||||
write_data(g, (gU8)RA6963_TEXT_AREA); //16
|
write_data(g, (gU8)RA6963_TEXT_AREA); //16
|
||||||
write_data(g, (gU8)(RA6963_TEXT_AREA>>8)); //0
|
write_data(g, (gU8)(RA6963_TEXT_AREA>>8)); //0
|
||||||
write_cmd(g, RA6963_SET_TEXT_AREA); //0x41
|
write_cmd(g, RA6963_SET_TEXT_AREA); //0x41
|
||||||
|
|
||||||
/* write_data(g, (gU8)RA6963_OFFSET_REGISTER);
|
/* write_data(g, (gU8)RA6963_OFFSET_REGISTER);
|
||||||
write_data(g, 0);
|
write_data(g, 0);
|
||||||
write_cmd(g, RA6963_SET_OFFSET_REGISTER);*/
|
write_cmd(g, RA6963_SET_OFFSET_REGISTER);*/
|
||||||
|
|
||||||
write_data(g, 0x00);
|
write_data(g, 0x00);
|
||||||
write_data(g, 0x00);
|
write_data(g, 0x00);
|
||||||
write_cmd(g, RA6963_SET_ADDRESS_POINTER);
|
write_cmd(g, RA6963_SET_ADDRESS_POINTER);
|
||||||
|
|
||||||
write_data(g, 0x00);
|
write_data(g, 0x00);
|
||||||
write_data(g, 0x00);
|
write_data(g, 0x00);
|
||||||
write_cmd(g, RA6963_SET_CURSOR_POINTER);
|
write_cmd(g, RA6963_SET_CURSOR_POINTER);
|
||||||
|
|
||||||
|
|
||||||
//write_cmd(g, RA6963_CURSOR_PATTERN_SELECT | RA6963_CURSOR_1_LINE);
|
//write_cmd(g, RA6963_CURSOR_PATTERN_SELECT | RA6963_CURSOR_1_LINE);
|
||||||
write_cmd(g, RA6963_MODE_SET | RA6963_MODE_OR);
|
write_cmd(g, RA6963_MODE_SET | RA6963_MODE_OR);
|
||||||
//write_cmd(g, RA6963_DISPLAY_MODE | RA6963_TEXT_DISPLAY_ON | RA6963_GRAPHIC_DISPLAY_ON);
|
//write_cmd(g, RA6963_DISPLAY_MODE | RA6963_TEXT_DISPLAY_ON | RA6963_GRAPHIC_DISPLAY_ON);
|
||||||
write_cmd(g, RA6963_DISPLAY_MODE | RA6963_GRAPHIC_DISPLAY_ON);
|
write_cmd(g, RA6963_DISPLAY_MODE | RA6963_GRAPHIC_DISPLAY_ON);
|
||||||
|
|
||||||
// Finish Init
|
// Finish Init
|
||||||
post_init_board(g);
|
post_init_board(g);
|
||||||
#if RA6963_NEED_BACKLIGHT
|
#if RA6963_NEED_BACKLIGHT
|
||||||
// Turn on the back-light
|
// Turn on the back-light
|
||||||
set_backlight(g, GDISP_INITIAL_BACKLIGHT);
|
set_backlight(g, GDISP_INITIAL_BACKLIGHT);
|
||||||
#endif
|
#endif
|
||||||
// Initialise the GDISP structure
|
// Initialise the GDISP structure
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
g->g.Height = GDISP_SCREEN_HEIGHT;
|
||||||
g->g.Orientation = gOrientation0;
|
g->g.Orientation = gOrientation0;
|
||||||
g->g.Powermode = gPowerOn;
|
g->g.Powermode = gPowerOn;
|
||||||
g->g.Backlight = GDISP_INITIAL_BACKLIGHT;
|
g->g.Backlight = GDISP_INITIAL_BACKLIGHT;
|
||||||
g->g.Contrast = GDISP_INITIAL_CONTRAST;
|
g->g.Contrast = GDISP_INITIAL_CONTRAST;
|
||||||
|
|
||||||
return gTrue;
|
return gTrue;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void set_viewport(GDisplay *g) {
|
static void set_viewport(GDisplay *g) {
|
||||||
if ((g->p.x >= GDISP_SCREEN_WIDTH) || (g->p.y >= GDISP_SCREEN_HEIGHT))
|
if ((g->p.x >= GDISP_SCREEN_WIDTH) || (g->p.y >= GDISP_SCREEN_HEIGHT))
|
||||||
return; // 0 + ( x / 8 ) + ( y * 16 )
|
return; // 0 + ( x / 8 ) + ( y * 16 )
|
||||||
//gU16 addr = (RA6963_GRAPHIC_HOME + ((g->p.x) / RA6963_FONT_WIDTH) + ((g->p.y) * RA6963_GRAPHIC_AREA));
|
//gU16 addr = (RA6963_GRAPHIC_HOME + ((g->p.x) / RA6963_FONT_WIDTH) + ((g->p.y) * RA6963_GRAPHIC_AREA));
|
||||||
gU16 addr = (RA6963_GRAPHIC_HOME + ((g->p.x >> 3) + (g->p.y << 4)));
|
gU16 addr = (RA6963_GRAPHIC_HOME + ((g->p.x >> 3) + (g->p.y << 4)));
|
||||||
#if GFX_COMPILER_WARNING_TYPE == GFX_COMPILER_WARNING_DIRECT
|
#if GFX_COMPILER_WARNING_TYPE == GFX_COMPILER_WARNING_DIRECT
|
||||||
#warning "check function set_viewport about the shift operations if you change the resolution!"
|
#warning "check function set_viewport about the shift operations if you change the resolution!"
|
||||||
#elif GFX_COMPILER_WARNING_TYPE == GFX_COMPILER_WARNING_MACRO
|
#elif GFX_COMPILER_WARNING_TYPE == GFX_COMPILER_WARNING_MACRO
|
||||||
COMPILER_WARNING("check function set_viewport about the shift operations if you change the resolution!")
|
COMPILER_WARNING("check function set_viewport about the shift operations if you change the resolution!")
|
||||||
#endif
|
#endif
|
||||||
write_data(g, (gU8)addr);
|
write_data(g, (gU8)addr);
|
||||||
write_data(g, (gU8)(addr>>8));
|
write_data(g, (gU8)(addr>>8));
|
||||||
write_cmd(g, RA6963_SET_ADDRESS_POINTER);
|
write_cmd(g, RA6963_SET_ADDRESS_POINTER);
|
||||||
}
|
}
|
||||||
|
|
||||||
LLDSPEC void gdisp_lld_write_color(GDisplay *g) {
|
LLDSPEC void gdisp_lld_write_color(GDisplay *g) {
|
||||||
gU8 temp;
|
gU8 temp;
|
||||||
|
|
||||||
#if RA6963_NEED_READ
|
#if RA6963_NEED_READ
|
||||||
temp = read_data(g);
|
temp = read_data(g);
|
||||||
#else
|
#else
|
||||||
temp = RAM(g)[POS];
|
temp = RAM(g)[POS];
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (g->p.color != GFX_WHITE) {
|
if (g->p.color != GFX_WHITE) {
|
||||||
temp |= (1 << (RA6963_FONT_WIDTH - 1 - ((g->p.x) % RA6963_FONT_WIDTH)));
|
temp |= (1 << (RA6963_FONT_WIDTH - 1 - ((g->p.x) % RA6963_FONT_WIDTH)));
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
temp &= ~(1 << (RA6963_FONT_WIDTH - 1 - ((g->p.x) % RA6963_FONT_WIDTH)));
|
temp &= ~(1 << (RA6963_FONT_WIDTH - 1 - ((g->p.x) % RA6963_FONT_WIDTH)));
|
||||||
}
|
}
|
||||||
|
|
||||||
write_data(g, temp);
|
write_data(g, temp);
|
||||||
#if !RA6963_NEED_READ
|
#if !RA6963_NEED_READ
|
||||||
RAM(g)[POS] = temp;
|
RAM(g)[POS] = temp;
|
||||||
#endif
|
#endif
|
||||||
//write_cmd(g, RA6963_DATA_WRITE_AND_INCREMENT);
|
//write_cmd(g, RA6963_DATA_WRITE_AND_INCREMENT);
|
||||||
write_cmd(g, RA6963_DATA_WRITE_AND_NONVARIALBE);
|
write_cmd(g, RA6963_DATA_WRITE_AND_NONVARIALBE);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
LLDSPEC void gdisp_lld_draw_pixel(GDisplay *g) {
|
LLDSPEC void gdisp_lld_draw_pixel(GDisplay *g) {
|
||||||
set_viewport(g);
|
set_viewport(g);
|
||||||
gdisp_lld_write_color(g);
|
gdisp_lld_write_color(g);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if GDISP_HARDWARE_STREAM_WRITE
|
#if GDISP_HARDWARE_STREAM_WRITE
|
||||||
LLDSPEC void gdisp_lld_write_start(GDisplay *g) {
|
LLDSPEC void gdisp_lld_write_start(GDisplay *g) {
|
||||||
//acquire_bus(g);
|
//acquire_bus(g);
|
||||||
set_viewport(g);
|
set_viewport(g);
|
||||||
}
|
}
|
||||||
|
|
||||||
LLDSPEC void gdisp_lld_write_stop(GDisplay *g) {
|
LLDSPEC void gdisp_lld_write_stop(GDisplay *g) {
|
||||||
//release_bus(g);
|
//release_bus(g);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if GDISP_HARDWARE_STREAM_READ
|
#if GDISP_HARDWARE_STREAM_READ
|
||||||
LLDSPEC void gdisp_lld_read_start(GDisplay *g) {
|
LLDSPEC void gdisp_lld_read_start(GDisplay *g) {
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
set_viewport(g);
|
set_viewport(g);
|
||||||
setreadmode(g);
|
setreadmode(g);
|
||||||
dummy_read(g);
|
dummy_read(g);
|
||||||
}
|
}
|
||||||
|
|
||||||
LLDSPEC gColor gdisp_lld_read_color(GDisplay *g) {
|
LLDSPEC gColor gdisp_lld_read_color(GDisplay *g) {
|
||||||
gU16 data;
|
gU16 data;
|
||||||
|
|
||||||
data = read_data(g);
|
data = read_data(g);
|
||||||
return gdispNative2Color(data);
|
return gdispNative2Color(data);
|
||||||
}
|
}
|
||||||
|
|
||||||
LLDSPEC void gdisp_lld_read_stop(GDisplay *g) {
|
LLDSPEC void gdisp_lld_read_stop(GDisplay *g) {
|
||||||
setwritemode(g);
|
setwritemode(g);
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if GDISP_HARDWARE_FILLS
|
#if GDISP_HARDWARE_FILLS
|
||||||
LLDSPEC void gdisp_lld_fill_area(GDisplay *g) {
|
LLDSPEC void gdisp_lld_fill_area(GDisplay *g) {
|
||||||
gU8 data, j;
|
gU8 data, j;
|
||||||
set_viewport(g);
|
set_viewport(g);
|
||||||
|
|
||||||
if (g->p.color != GFX_WHITE) {
|
if (g->p.color != GFX_WHITE) {
|
||||||
data = 0xFF; // set dot
|
data = 0xFF; // set dot
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
data = 0; // clr dot
|
data = 0; // clr dot
|
||||||
}
|
}
|
||||||
for (j=0; j < (g->p.cy)/8; j++) {
|
for (j=0; j < (g->p.cy)/8; j++) {
|
||||||
write_data_repeat(g, data, (g->p.cx));
|
write_data_repeat(g, data, (g->p.cx));
|
||||||
(g->p.cy) +=8;
|
(g->p.cy) +=8;
|
||||||
set_viewport(g);
|
set_viewport(g);
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
#endif // GDISP_HARDWARE_FILLS
|
#endif // GDISP_HARDWARE_FILLS
|
||||||
|
|
||||||
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
|
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
|
||||||
LLDSPEC void gdisp_lld_control(GDisplay *g) {
|
LLDSPEC void gdisp_lld_control(GDisplay *g) {
|
||||||
switch(g->p.x) {
|
switch(g->p.x) {
|
||||||
case GDISP_CONTROL_POWER:
|
case GDISP_CONTROL_POWER:
|
||||||
if (g->g.Powermode == (gPowermode)g->p.ptr)
|
if (g->g.Powermode == (gPowermode)g->p.ptr)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
switch((gPowermode)g->p.ptr) {
|
switch((gPowermode)g->p.ptr) {
|
||||||
case gPowerOff:
|
case gPowerOff:
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
write_index(g, 0x28);
|
write_index(g, 0x28);
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
write_index(g, 0x10);
|
write_index(g, 0x10);
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case gPowerOn:
|
case gPowerOn:
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
write_index(g, 0x11);
|
write_index(g, 0x11);
|
||||||
gfxSleepMilliseconds(120);
|
gfxSleepMilliseconds(120);
|
||||||
write_index(g, 0x29);
|
write_index(g, 0x29);
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
if (g->g.Powermode != gPowerSleep)
|
if (g->g.Powermode != gPowerSleep)
|
||||||
gdisp_lld_init(g);
|
gdisp_lld_init(g);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case gPowerSleep:
|
case gPowerSleep:
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
write_index(g, 0x28);
|
write_index(g, 0x28);
|
||||||
gfxSleepMilliseconds(10);
|
gfxSleepMilliseconds(10);
|
||||||
write_index(g, 0x10);
|
write_index(g, 0x10);
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
g->g.Powermode = (gPowermode)g->p.ptr;
|
g->g.Powermode = (gPowermode)g->p.ptr;
|
||||||
return;
|
return;
|
||||||
|
|
||||||
case GDISP_CONTROL_ORIENTATION:
|
case GDISP_CONTROL_ORIENTATION:
|
||||||
if (g->g.Orientation == (gOrientation)g->p.ptr)
|
if (g->g.Orientation == (gOrientation)g->p.ptr)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
switch((gOrientation)g->p.ptr) {
|
switch((gOrientation)g->p.ptr) {
|
||||||
case gOrientation0:
|
case gOrientation0:
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
|
|
||||||
write_index(g, 0x36);
|
write_index(g, 0x36);
|
||||||
write_data(g, 0x08);
|
write_data(g, 0x08);
|
||||||
|
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
g->g.Height = GDISP_SCREEN_HEIGHT;
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case gOrientation90:
|
case gOrientation90:
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
|
|
||||||
write_index(g, 0x36);
|
write_index(g, 0x36);
|
||||||
write_data(g, 0x68);
|
write_data(g, 0x68);
|
||||||
|
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
g->g.Height = GDISP_SCREEN_WIDTH;
|
g->g.Height = GDISP_SCREEN_WIDTH;
|
||||||
g->g.Width = GDISP_SCREEN_HEIGHT;
|
g->g.Width = GDISP_SCREEN_HEIGHT;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case gOrientation180:
|
case gOrientation180:
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
|
|
||||||
write_index(g, 0x36);
|
write_index(g, 0x36);
|
||||||
write_data(g, 0xC8);
|
write_data(g, 0xC8);
|
||||||
|
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
g->g.Height = GDISP_SCREEN_HEIGHT;
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
g->g.Width = GDISP_SCREEN_WIDTH;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case gOrientation270:
|
case gOrientation270:
|
||||||
acquire_bus(g);
|
acquire_bus(g);
|
||||||
|
|
||||||
write_index(g, 0x36);
|
write_index(g, 0x36);
|
||||||
write_data(g, 0xA8);
|
write_data(g, 0xA8);
|
||||||
|
|
||||||
release_bus(g);
|
release_bus(g);
|
||||||
g->g.Height = GDISP_SCREEN_WIDTH;
|
g->g.Height = GDISP_SCREEN_WIDTH;
|
||||||
g->g.Width = GDISP_SCREEN_HEIGHT;
|
g->g.Width = GDISP_SCREEN_HEIGHT;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
g->g.Orientation = (gOrientation)g->p.ptr;
|
g->g.Orientation = (gOrientation)g->p.ptr;
|
||||||
return;
|
return;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
|
@ -1,25 +1,25 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
//#ifndef _GDISP_LLD_CONFIG_H
|
//#ifndef _GDISP_LLD_CONFIG_H
|
||||||
//#define _GDISP_LLD_CONFIG_H
|
//#define _GDISP_LLD_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
#if GFX_USE_GDISP
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver hardware support. */
|
/* Driver hardware support. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define GDISP_HARDWARE_STREAM_WRITE GFXOFF
|
#define GDISP_HARDWARE_STREAM_WRITE GFXOFF
|
||||||
#define GDISP_HARDWARE_STREAM_READ GFXOFF
|
#define GDISP_HARDWARE_STREAM_READ GFXOFF
|
||||||
#define GDISP_HARDWARE_CONTROL GFXOFF
|
#define GDISP_HARDWARE_CONTROL GFXOFF
|
||||||
#define GDISP_HARDWARE_DRAWPIXEL GFXON
|
#define GDISP_HARDWARE_DRAWPIXEL GFXON
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO
|
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO
|
||||||
#define GDISP_HARDWARE_FILLS GFXOFF
|
#define GDISP_HARDWARE_FILLS GFXOFF
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
||||||
//#endif /* _GDISP_LLD_CONFIG_H */
|
//#endif /* _GDISP_LLD_CONFIG_H */
|
||||||
|
|
|
@ -4,31 +4,31 @@
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_CONFIG_H
|
#ifndef _GDISP_LLD_CONFIG_H
|
||||||
#define _GDISP_LLD_CONFIG_H
|
#define _GDISP_LLD_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
#if GFX_USE_GDISP
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver hardware support. */
|
/* Driver hardware support. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define GDISP_HARDWARE_STREAM_WRITE GFXON
|
#define GDISP_HARDWARE_STREAM_WRITE GFXON
|
||||||
#define GDISP_HARDWARE_STREAM_READ GFXON
|
#define GDISP_HARDWARE_STREAM_READ GFXON
|
||||||
#define GDISP_HARDWARE_STREAM_POS GFXON
|
#define GDISP_HARDWARE_STREAM_POS GFXON
|
||||||
#define GDISP_HARDWARE_CONTROL GFXON
|
#define GDISP_HARDWARE_CONTROL GFXON
|
||||||
|
|
||||||
#if defined(GDISP_USE_DMA) && GDISP_USE_DMA
|
#if defined(GDISP_USE_DMA) && GDISP_USE_DMA
|
||||||
#define GDISP_HARDWARE_FILLS GFXON
|
#define GDISP_HARDWARE_FILLS GFXON
|
||||||
#if !defined(GDISP_PIXELFORMAT) || GDISP_PIXELFORMAT == 0x2565
|
#if !defined(GDISP_PIXELFORMAT) || GDISP_PIXELFORMAT == 0x2565
|
||||||
// Hardware BitBlts are only supported in native pixel format on this controller
|
// Hardware BitBlts are only supported in native pixel format on this controller
|
||||||
#define GDISP_HARDWARE_BITFILLS GFXON
|
#define GDISP_HARDWARE_BITFILLS GFXON
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
||||||
#endif /* _GDISP_LLD_CONFIG_H */
|
#endif /* _GDISP_LLD_CONFIG_H */
|
||||||
|
|
|
@ -1,59 +1,59 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://chibios-gfx.com/license.html
|
* http://chibios-gfx.com/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _SSD1306_H
|
#ifndef _SSD1306_H
|
||||||
#define _SSD1306_H
|
#define _SSD1306_H
|
||||||
|
|
||||||
#define SSD1306_SETCONTRAST 0x81
|
#define SSD1306_SETCONTRAST 0x81
|
||||||
#define SSD1306_DISPLAYALLON_RESUME 0xA4
|
#define SSD1306_DISPLAYALLON_RESUME 0xA4
|
||||||
#define SSD1306_DISPLAYALLON 0xA5
|
#define SSD1306_DISPLAYALLON 0xA5
|
||||||
#define SSD1306_NORMALDISPLAY 0xA6
|
#define SSD1306_NORMALDISPLAY 0xA6
|
||||||
#define SSD1306_INVERTDISPLAY 0xA7
|
#define SSD1306_INVERTDISPLAY 0xA7
|
||||||
#define SSD1306_DISPLAYOFF 0xAE
|
#define SSD1306_DISPLAYOFF 0xAE
|
||||||
#define SSD1306_DISPLAYON 0xAF
|
#define SSD1306_DISPLAYON 0xAF
|
||||||
|
|
||||||
#define SSD1306_SETDISPLAYOFFSET 0xD3
|
#define SSD1306_SETDISPLAYOFFSET 0xD3
|
||||||
#define SSD1306_SETCOMPINS 0xDA
|
#define SSD1306_SETCOMPINS 0xDA
|
||||||
|
|
||||||
#define SSD1306_SETVCOMDETECT 0xDB
|
#define SSD1306_SETVCOMDETECT 0xDB
|
||||||
|
|
||||||
#define SSD1306_SETDISPLAYCLOCKDIV 0xD5
|
#define SSD1306_SETDISPLAYCLOCKDIV 0xD5
|
||||||
#define SSD1306_SETPRECHARGE 0xD9
|
#define SSD1306_SETPRECHARGE 0xD9
|
||||||
#define SSD1306_ENABLE_CHARGE_PUMP 0x8D
|
#define SSD1306_ENABLE_CHARGE_PUMP 0x8D
|
||||||
|
|
||||||
#define SSD1306_SETMULTIPLEX 0xA8
|
#define SSD1306_SETMULTIPLEX 0xA8
|
||||||
#define SSD1306_SETSTARTLINE 0x40
|
#define SSD1306_SETSTARTLINE 0x40
|
||||||
|
|
||||||
#define SSD1306_MEMORYMODE 0x20
|
#define SSD1306_MEMORYMODE 0x20
|
||||||
#define SSD1306_HV_COLUMN_ADDRESS 0x21
|
#define SSD1306_HV_COLUMN_ADDRESS 0x21
|
||||||
#define SSD1306_HV_PAGE_ADDRESS 0x22
|
#define SSD1306_HV_PAGE_ADDRESS 0x22
|
||||||
#define SSD1306_PAM_PAGE_START 0xB0
|
#define SSD1306_PAM_PAGE_START 0xB0
|
||||||
|
|
||||||
#define SSD1306_ROWSCANINC 0xC0
|
#define SSD1306_ROWSCANINC 0xC0
|
||||||
#define SSD1306_ROWSCANDEC 0xC8
|
#define SSD1306_ROWSCANDEC 0xC8
|
||||||
|
|
||||||
#define SSD1306_COLSCANINC 0xA0
|
#define SSD1306_COLSCANINC 0xA0
|
||||||
#define SSD1306_COLSCANDEC 0xA1
|
#define SSD1306_COLSCANDEC 0xA1
|
||||||
|
|
||||||
#define SSD1306_CHARGEPUMP 0x8D
|
#define SSD1306_CHARGEPUMP 0x8D
|
||||||
|
|
||||||
#define SSD1306_EXTERNALVCC 0x1
|
#define SSD1306_EXTERNALVCC 0x1
|
||||||
#define SSD1306_SWITCHCAPVCC 0x2
|
#define SSD1306_SWITCHCAPVCC 0x2
|
||||||
|
|
||||||
#define SSD1306_SETLOWCOLUMN 0x00
|
#define SSD1306_SETLOWCOLUMN 0x00
|
||||||
#define SSD1306_SETHIGHCOLUMN 0x10
|
#define SSD1306_SETHIGHCOLUMN 0x10
|
||||||
|
|
||||||
// Scrolling #defines
|
// Scrolling #defines
|
||||||
#define SSD1306_SCROLL_ACTIVATE 0x2F
|
#define SSD1306_SCROLL_ACTIVATE 0x2F
|
||||||
#define SSD1306_SCROLL_DEACTIVATE 0x2E
|
#define SSD1306_SCROLL_DEACTIVATE 0x2E
|
||||||
#define SSD1306_SCROLL_SET_VERTICAL_SCROLL_AREA 0xA3
|
#define SSD1306_SCROLL_SET_VERTICAL_SCROLL_AREA 0xA3
|
||||||
#define SSD1306_SCROLL_HORIZONTAL_RIGHT 0x26
|
#define SSD1306_SCROLL_HORIZONTAL_RIGHT 0x26
|
||||||
#define SSD1306_SCROLL_HORIZONTAL_LEFT 0x27
|
#define SSD1306_SCROLL_HORIZONTAL_LEFT 0x27
|
||||||
#define SSD1306_SCROLL_VERTICAL_AND_HORIZONTAL_RIGHT 0x29
|
#define SSD1306_SCROLL_VERTICAL_AND_HORIZONTAL_RIGHT 0x29
|
||||||
#define SSD1306_SCROLL_VERTICAL_AND_HORIZONTAL_LEFT 0x2A
|
#define SSD1306_SCROLL_VERTICAL_AND_HORIZONTAL_LEFT 0x2A
|
||||||
|
|
||||||
#endif /* _SSD1306_H */
|
#endif /* _SSD1306_H */
|
||||||
|
|
|
@ -1,31 +1,31 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_CONFIG_H
|
#ifndef _GDISP_LLD_CONFIG_H
|
||||||
#define _GDISP_LLD_CONFIG_H
|
#define _GDISP_LLD_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
#if GFX_USE_GDISP
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver hardware support. */
|
/* Driver hardware support. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define GDISP_HARDWARE_FLUSH GFXON // This controller requires flushing
|
#define GDISP_HARDWARE_FLUSH GFXON // This controller requires flushing
|
||||||
#define GDISP_HARDWARE_DRAWPIXEL GFXON
|
#define GDISP_HARDWARE_DRAWPIXEL GFXON
|
||||||
#define GDISP_HARDWARE_PIXELREAD GFXON
|
#define GDISP_HARDWARE_PIXELREAD GFXON
|
||||||
#define GDISP_HARDWARE_CONTROL GFXON
|
#define GDISP_HARDWARE_CONTROL GFXON
|
||||||
#define GDISP_HARDWARE_FILLS GFXON
|
#define GDISP_HARDWARE_FILLS GFXON
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO
|
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO
|
||||||
|
|
||||||
// This controller supports a special gdispControl() to inverse the display.
|
// This controller supports a special gdispControl() to inverse the display.
|
||||||
// Pass a parameter of 1 for inverse and 0 for normal.
|
// Pass a parameter of 1 for inverse and 0 for normal.
|
||||||
#define GDISP_CONTROL_INVERSE (GDISP_CONTROL_LLD+0)
|
#define GDISP_CONTROL_INVERSE (GDISP_CONTROL_LLD+0)
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
||||||
#endif /* _GDISP_LLD_CONFIG_H */
|
#endif /* _GDISP_LLD_CONFIG_H */
|
||||||
|
|
|
@ -1,27 +1,27 @@
|
||||||
Description:
|
Description:
|
||||||
|
|
||||||
Driver for OLED with 4-wire serial interface and I2C/SPI interface
|
Driver for OLED with 4-wire serial interface and I²C/SPI interface
|
||||||
|
|
||||||
Know restictions:
|
Know restictions:
|
||||||
- Driver works only with SSD1306 hooked up over I2C or SPI (include corresponding header)
|
- Driver works only with SSD1306 hooked up over I2C or SPI (include corresponding header)
|
||||||
- Driver is written for 128x64 pixel displays (128x32 are only partly supported and need small further work)
|
- Driver is written for 128x64 pixel displays (128x32 are only partly supported and need small further work)
|
||||||
- after using uGFX subsystem gdisp_lld_display() has to be called "by hand" to push framebuffer to display
|
- after using uGFX subsystem gdisp_lld_display() has to be called "by hand" to push framebuffer to display
|
||||||
|
|
||||||
To use this driver:
|
To use this driver:
|
||||||
|
|
||||||
1. Add in your gfxconf.h:
|
1. Add in your gfxconf.h:
|
||||||
a) #define GFX_USE_GDISP GFXON
|
a) #define GFX_USE_GDISP GFXON
|
||||||
|
|
||||||
b) Any optional high level driver defines (see gdisp.h) eg: GDISP_NEED_MULTITHREAD
|
b) Any optional high level driver defines (see gdisp.h) eg: GDISP_NEED_MULTITHREAD
|
||||||
|
|
||||||
c) The following are optional - define them if you are not using the defaults below:
|
c) The following are optional - define them if you are not using the defaults below:
|
||||||
#define GDISP_SCREEN_WIDTH 128
|
#define GDISP_SCREEN_WIDTH 128
|
||||||
#define GDISP_SCREEN_HEIGHT 64
|
#define GDISP_SCREEN_HEIGHT 64
|
||||||
|
|
||||||
2. If you are not using a known board then create a gdisp_lld_board.h file according to
|
2. If you are not using a known board then create a gdisp_lld_board.h file according to
|
||||||
given example files (or just stick with them) and ensure it is on your include path.
|
given example files (or just stick with them) and ensure it is on your include path.
|
||||||
|
|
||||||
3. To your makefile add the following lines:
|
3. To your makefile add the following lines:
|
||||||
include $(GFXLIB)/drivers/gdisp/SSD1306/gdisp_lld.mk
|
include $(GFXLIB)/drivers/gdisp/SSD1306/gdisp_lld.mk
|
||||||
|
|
||||||
4. Call gdisp_lld_display() every time you want to update display content
|
4. Call gdisp_lld_display() every time you want to update display content
|
||||||
|
|
|
@ -1,58 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.io/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
#pragma once
|
|
||||||
|
|
||||||
/**
|
|
||||||
* The command byte to put in front of each page line.
|
|
||||||
*
|
|
||||||
* If this is defined, each page line is prefixed with the specified value in the locally
|
|
||||||
* maintained framebuffer.
|
|
||||||
*
|
|
||||||
* This can be omitted and handled inside of write_data() manually instead.
|
|
||||||
*/
|
|
||||||
#define SSD1312_PAGE_PREFIX 0x40 // Co = 0, D/C = 1
|
|
||||||
|
|
||||||
static GFXINLINE void init_board(GDisplay *g)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void post_init_board(GDisplay *g)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void setpin_reset(GDisplay *g, gBool state)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
(void) state;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void acquire_bus(GDisplay *g)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void release_bus(GDisplay *g)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void write_cmd(GDisplay *g, gU8 *data, gU16 length)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
(void) data;
|
|
||||||
(void) length;
|
|
||||||
}
|
|
||||||
|
|
||||||
static GFXINLINE void write_data(GDisplay *g, gU8 *data, gU16 length)
|
|
||||||
{
|
|
||||||
(void) g;
|
|
||||||
(void) data;
|
|
||||||
(void) length;
|
|
||||||
}
|
|
|
@ -1,8 +0,0 @@
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}/gdisp_lld_SSD1312.c
|
|
||||||
)
|
|
||||||
|
|
|
@ -1,3 +0,0 @@
|
||||||
GFXINC += $(GFXLIB)/drivers/gdisp/SSD1312
|
|
||||||
GFXSRC += $(GFXLIB)/drivers/gdisp/SSD1312/gdisp_lld_SSD1312.c
|
|
||||||
|
|
|
@ -1,391 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.io/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "gfx.h"
|
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
|
||||||
|
|
||||||
#define GDISP_DRIVER_VMT GDISPVMT_SSD1312
|
|
||||||
#include "gdisp_lld_config.h"
|
|
||||||
#include "../../../src/gdisp/gdisp_driver.h"
|
|
||||||
|
|
||||||
#include "board_SSD1312.h"
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver local definitions. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
#ifndef GDISP_SCREEN_HEIGHT
|
|
||||||
#define GDISP_SCREEN_HEIGHT 32 // This controller should also support 64 (untested)
|
|
||||||
#endif
|
|
||||||
#ifndef GDISP_SCREEN_WIDTH
|
|
||||||
#define GDISP_SCREEN_WIDTH 128
|
|
||||||
#endif
|
|
||||||
#ifndef GDISP_INITIAL_CONTRAST
|
|
||||||
#define GDISP_INITIAL_CONTRAST 100
|
|
||||||
#endif
|
|
||||||
#ifndef GDISP_INITIAL_BACKLIGHT
|
|
||||||
#define GDISP_INITIAL_BACKLIGHT 100
|
|
||||||
#endif
|
|
||||||
#ifdef SSD1312_PAGE_PREFIX
|
|
||||||
#define SSD1312_PAGE_WIDTH (GDISP_SCREEN_WIDTH+1)
|
|
||||||
#define SSD1312_PAGE_OFFSET 1
|
|
||||||
#else
|
|
||||||
#define SSD1312_PAGE_WIDTH GDISP_SCREEN_WIDTH
|
|
||||||
#define SSD1312_PAGE_OFFSET 0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define GDISP_FLG_NEEDFLUSH (GDISP_FLG_DRIVER<<0)
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver local functions. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
// Some common routines and macros
|
|
||||||
#define RAM(g) ((gU8 *)g->priv)
|
|
||||||
#define xyaddr(x, y) (SSD1312_PAGE_OFFSET + (x) + ((y)>>3)*SSD1312_PAGE_WIDTH)
|
|
||||||
#define xybit(y) (1<<((y)&7))
|
|
||||||
|
|
||||||
#define write_cmd_1(g, a) { gU8 cmd[1]; cmd[0] = a; write_cmd(g, cmd, 1); }
|
|
||||||
#define write_cmd_2(g, a, b) { gU8 cmd[2]; cmd[0] = a; cmd[1] = b; write_cmd(g, cmd, 2); }
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver exported functions. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* As this controller can't update on a pixel boundary we need to maintain the
|
|
||||||
* the entire display surface in memory so that we can do the necessary bit
|
|
||||||
* operations. Fortunately it is a small monochrome display.
|
|
||||||
* 64 * 128 / 8 = 1024 bytes.
|
|
||||||
*/
|
|
||||||
|
|
||||||
LLDSPEC gBool gdisp_lld_init(GDisplay *g)
|
|
||||||
{
|
|
||||||
// The private area is the display surface.
|
|
||||||
g->priv = gfxAlloc(GDISP_SCREEN_HEIGHT/8 * SSD1312_PAGE_WIDTH);
|
|
||||||
if (!g->priv)
|
|
||||||
return gFalse;
|
|
||||||
|
|
||||||
// Fill in the prefix command byte on each page line of the display buffer
|
|
||||||
// We can do this during initialisation as we're being careful that this byte is never overwritten.
|
|
||||||
#ifdef SSD1312_PAGE_PREFIX
|
|
||||||
for (unsigned i = 0; i < GDISP_SCREEN_HEIGHT/8 * SSD1312_PAGE_WIDTH; i += SSD1312_PAGE_WIDTH)
|
|
||||||
RAM(g)[i] = SSD1312_PAGE_PREFIX;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Initialise the board interface
|
|
||||||
init_board(g);
|
|
||||||
|
|
||||||
// Hardware reset
|
|
||||||
setpin_reset(g, gTrue);
|
|
||||||
gfxSleepMilliseconds(20);
|
|
||||||
setpin_reset(g, gFalse);
|
|
||||||
gfxSleepMilliseconds(200);
|
|
||||||
|
|
||||||
acquire_bus(g);
|
|
||||||
|
|
||||||
// Configuration
|
|
||||||
// This might require display module vendor specific changes
|
|
||||||
{
|
|
||||||
// Display off
|
|
||||||
write_cmd_1(g, 0xAE);
|
|
||||||
|
|
||||||
// Clock divider
|
|
||||||
write_cmd_2(g, 0xD5, 0x80);
|
|
||||||
|
|
||||||
// Multiplex ratio
|
|
||||||
write_cmd_2(g, 0xA8, 0x1F);
|
|
||||||
|
|
||||||
// Display offset
|
|
||||||
write_cmd_2(g, 0xD3, 0x30);
|
|
||||||
|
|
||||||
// Display start line
|
|
||||||
write_cmd_1(g, 0x40);
|
|
||||||
|
|
||||||
// Charge pump
|
|
||||||
write_cmd_2(g, 0x8D, 0x72); // 0x10 if Vcc externally supplied
|
|
||||||
|
|
||||||
// Segment re-map
|
|
||||||
write_cmd_1(g, 0xA1);
|
|
||||||
|
|
||||||
// COM output scan direction
|
|
||||||
write_cmd_1(g, 0xC0);
|
|
||||||
|
|
||||||
// COM pin hardware configuration
|
|
||||||
write_cmd_2(g, 0xDA, 0x10);
|
|
||||||
|
|
||||||
// Set internal/external current reference
|
|
||||||
write_cmd_2(g, 0xAD, 0x50);
|
|
||||||
|
|
||||||
// Set contract
|
|
||||||
write_cmd_2(g, 0x81, 0x17);
|
|
||||||
|
|
||||||
// Set pre-charge period
|
|
||||||
write_cmd_2(g, 0xD9, 0xF1);
|
|
||||||
|
|
||||||
// Set VCOMH select level
|
|
||||||
write_cmd_2(g, 0xDB, 0x30);
|
|
||||||
|
|
||||||
// Set entire display on/off
|
|
||||||
write_cmd_1(g, 0xA4);
|
|
||||||
|
|
||||||
// Set normal/inverse display
|
|
||||||
write_cmd_1(g, 0xA6);
|
|
||||||
|
|
||||||
// Page addressing mode
|
|
||||||
write_cmd_2(g, 0x20, 0x02);
|
|
||||||
|
|
||||||
// Display on
|
|
||||||
write_cmd_1(g, 0xAF);
|
|
||||||
}
|
|
||||||
|
|
||||||
release_bus(g);
|
|
||||||
|
|
||||||
// Finish Init
|
|
||||||
post_init_board(g);
|
|
||||||
|
|
||||||
// Initialise the GDISP structure
|
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
|
||||||
g->g.Orientation = gOrientation0;
|
|
||||||
g->g.Powermode = gPowerOn;
|
|
||||||
g->g.Backlight = GDISP_INITIAL_BACKLIGHT;
|
|
||||||
g->g.Contrast = GDISP_INITIAL_CONTRAST;
|
|
||||||
|
|
||||||
return gTrue;
|
|
||||||
}
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_FLUSH
|
|
||||||
LLDSPEC void gdisp_lld_flush(GDisplay *g)
|
|
||||||
{
|
|
||||||
gU8 * ram;
|
|
||||||
unsigned pages;
|
|
||||||
|
|
||||||
// Only flush if necessary
|
|
||||||
if (!(g->flags & GDISP_FLG_NEEDFLUSH))
|
|
||||||
return;
|
|
||||||
|
|
||||||
ram = RAM(g);
|
|
||||||
pages = GDISP_SCREEN_HEIGHT/8;
|
|
||||||
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_1(g, 0x40 | 0);
|
|
||||||
while (pages--) {
|
|
||||||
write_cmd_1(g, 0xB0 + (((GDISP_SCREEN_HEIGHT/8)-1)-pages));
|
|
||||||
write_cmd_1(g, 0x00);
|
|
||||||
write_cmd_1(g, 0x10);
|
|
||||||
write_data(g, ram, SSD1312_PAGE_WIDTH);
|
|
||||||
ram += SSD1312_PAGE_WIDTH;
|
|
||||||
}
|
|
||||||
release_bus(g);
|
|
||||||
|
|
||||||
g->flags &= ~GDISP_FLG_NEEDFLUSH;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_DRAWPIXEL
|
|
||||||
LLDSPEC void gdisp_lld_draw_pixel(GDisplay *g)
|
|
||||||
{
|
|
||||||
gCoord x, y;
|
|
||||||
|
|
||||||
switch(g->g.Orientation) {
|
|
||||||
default:
|
|
||||||
case gOrientation0:
|
|
||||||
x = g->p.x;
|
|
||||||
y = g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation90:
|
|
||||||
x = g->p.y;
|
|
||||||
y = GDISP_SCREEN_HEIGHT-1 - g->p.x;
|
|
||||||
break;
|
|
||||||
case gOrientation180:
|
|
||||||
x = GDISP_SCREEN_WIDTH-1 - g->p.x;
|
|
||||||
y = GDISP_SCREEN_HEIGHT-1 - g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation270:
|
|
||||||
x = GDISP_SCREEN_WIDTH-1 - g->p.y;
|
|
||||||
y = g->p.x;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
if (gdispColor2Native(g->p.color) != gdispColor2Native(GFX_BLACK))
|
|
||||||
RAM(g)[xyaddr(x, y)] |= xybit(y);
|
|
||||||
else
|
|
||||||
RAM(g)[xyaddr(x, y)] &= ~xybit(y);
|
|
||||||
g->flags |= GDISP_FLG_NEEDFLUSH;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_PIXELREAD
|
|
||||||
LLDSPEC gColor gdisp_lld_get_pixel_color(GDisplay *g)
|
|
||||||
{
|
|
||||||
gCoord x, y;
|
|
||||||
|
|
||||||
switch(g->g.Orientation) {
|
|
||||||
default:
|
|
||||||
case gOrientation0:
|
|
||||||
x = g->p.x;
|
|
||||||
y = g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation90:
|
|
||||||
x = g->p.y;
|
|
||||||
y = GDISP_SCREEN_HEIGHT-1 - g->p.x;
|
|
||||||
break;
|
|
||||||
case gOrientation180:
|
|
||||||
x = GDISP_SCREEN_WIDTH-1 - g->p.x;
|
|
||||||
y = GDISP_SCREEN_HEIGHT-1 - g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation270:
|
|
||||||
x = GDISP_SCREEN_WIDTH-1 - g->p.y;
|
|
||||||
y = g->p.x;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
return (RAM(g)[xyaddr(x, y)] & xybit(y)) ? GFX_WHITE : GFX_BLACK;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if GDISP_HARDWARE_FILLS
|
|
||||||
LLDSPEC void gdisp_lld_fill_area(GDisplay *g)
|
|
||||||
{
|
|
||||||
gCoord sy, ey;
|
|
||||||
gCoord sx, ex;
|
|
||||||
gCoord col;
|
|
||||||
unsigned spage, zpages;
|
|
||||||
gU8 * base;
|
|
||||||
gU8 mask;
|
|
||||||
|
|
||||||
switch(g->g.Orientation) {
|
|
||||||
default:
|
|
||||||
case gOrientation0:
|
|
||||||
sx = g->p.x;
|
|
||||||
ex = g->p.x + g->p.cx - 1;
|
|
||||||
sy = g->p.y;
|
|
||||||
ey = sy + g->p.cy - 1;
|
|
||||||
break;
|
|
||||||
case gOrientation90:
|
|
||||||
sx = g->p.y;
|
|
||||||
ex = g->p.y + g->p.cy - 1;
|
|
||||||
sy = GDISP_SCREEN_HEIGHT - g->p.x - g->p.cx;
|
|
||||||
ey = GDISP_SCREEN_HEIGHT-1 - g->p.x;
|
|
||||||
break;
|
|
||||||
case gOrientation180:
|
|
||||||
sx = GDISP_SCREEN_WIDTH - g->p.x - g->p.cx;
|
|
||||||
ex = GDISP_SCREEN_WIDTH-1 - g->p.x;
|
|
||||||
sy = GDISP_SCREEN_HEIGHT - g->p.y - g->p.cy;
|
|
||||||
ey = GDISP_SCREEN_HEIGHT-1 - g->p.y;
|
|
||||||
break;
|
|
||||||
case gOrientation270:
|
|
||||||
sx = GDISP_SCREEN_WIDTH - g->p.y - g->p.cy;
|
|
||||||
ex = GDISP_SCREEN_WIDTH-1 - g->p.y;
|
|
||||||
sy = g->p.x;
|
|
||||||
ey = g->p.x + g->p.cx - 1;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
spage = sy / 8;
|
|
||||||
base = RAM(g) + SSD1312_PAGE_OFFSET + SSD1312_PAGE_WIDTH * spage;
|
|
||||||
mask = 0xff << (sy&7);
|
|
||||||
zpages = (ey / 8) - spage;
|
|
||||||
|
|
||||||
if (gdispColor2Native(g->p.color) == gdispColor2Native(GFX_BLACK)) {
|
|
||||||
while (zpages--) {
|
|
||||||
for (col = sx; col <= ex; col++)
|
|
||||||
base[col] &= ~mask;
|
|
||||||
mask = 0xff;
|
|
||||||
base += SSD1312_PAGE_WIDTH;
|
|
||||||
}
|
|
||||||
mask &= (0xff >> (7 - (ey&7)));
|
|
||||||
for (col = sx; col <= ex; col++)
|
|
||||||
base[col] &= ~mask;
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
while (zpages--) {
|
|
||||||
for (col = sx; col <= ex; col++)
|
|
||||||
base[col] |= mask;
|
|
||||||
mask = 0xff;
|
|
||||||
base += SSD1312_PAGE_WIDTH;
|
|
||||||
}
|
|
||||||
mask &= (0xff >> (7 - (ey&7)));
|
|
||||||
for (col = sx; col <= ex; col++)
|
|
||||||
base[col] |= mask;
|
|
||||||
}
|
|
||||||
g->flags |= GDISP_FLG_NEEDFLUSH;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if GDISP_NEED_CONTROL && GDISP_HARDWARE_CONTROL
|
|
||||||
LLDSPEC void gdisp_lld_control(GDisplay *g)
|
|
||||||
{
|
|
||||||
switch(g->p.x) {
|
|
||||||
case GDISP_CONTROL_POWER:
|
|
||||||
if (g->g.Powermode == (gPowermode)g->p.ptr)
|
|
||||||
return;
|
|
||||||
switch((gPowermode)g->p.ptr) {
|
|
||||||
case gPowerOff:
|
|
||||||
case gPowerSleep:
|
|
||||||
case gPowerDeepSleep:
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_1(g, 0xAE);
|
|
||||||
release_bus(g);
|
|
||||||
break;
|
|
||||||
case gPowerOn:
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_1(g, 0xAF);
|
|
||||||
release_bus(g);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
g->g.Powermode = (gPowermode)g->p.ptr;
|
|
||||||
return;
|
|
||||||
|
|
||||||
case GDISP_CONTROL_ORIENTATION:
|
|
||||||
if (g->g.Orientation == (gOrientation)g->p.ptr)
|
|
||||||
return;
|
|
||||||
|
|
||||||
switch((gOrientation)g->p.ptr) {
|
|
||||||
// Rotation is handled by the drawing routines
|
|
||||||
case gOrientation0:
|
|
||||||
case gOrientation180:
|
|
||||||
g->g.Height = GDISP_SCREEN_HEIGHT;
|
|
||||||
g->g.Width = GDISP_SCREEN_WIDTH;
|
|
||||||
break;
|
|
||||||
case gOrientation90:
|
|
||||||
case gOrientation270:
|
|
||||||
g->g.Height = GDISP_SCREEN_WIDTH;
|
|
||||||
g->g.Width = GDISP_SCREEN_HEIGHT;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
g->g.Orientation = (gOrientation)g->p.ptr;
|
|
||||||
return;
|
|
||||||
|
|
||||||
case GDISP_CONTROL_CONTRAST:
|
|
||||||
if ((unsigned)g->p.ptr > 100)
|
|
||||||
g->p.ptr = (void *)100;
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_2(g, 0x81, (((unsigned)g->p.ptr)<<8)/101);
|
|
||||||
release_bus(g);
|
|
||||||
g->g.Contrast = (unsigned)g->p.ptr;
|
|
||||||
return;
|
|
||||||
|
|
||||||
// Our own special controller code to inverse the display
|
|
||||||
// 0 = normal, 1 = inverse
|
|
||||||
case GDISP_CONTROL_INVERSE:
|
|
||||||
acquire_bus(g);
|
|
||||||
write_cmd_1(g, g->p.ptr ? 0xA7: 0xA6);
|
|
||||||
release_bus(g);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif // GDISP_NEED_CONTROL
|
|
||||||
|
|
||||||
#endif // GFX_USE_GDISP
|
|
||||||
|
|
|
@ -1,31 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
|
||||||
*
|
|
||||||
* http://ugfx.io/license.html
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_CONFIG_H
|
|
||||||
#define _GDISP_LLD_CONFIG_H
|
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver hardware support. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
#define GDISP_HARDWARE_FLUSH GFXON // This controller requires flushing
|
|
||||||
#define GDISP_HARDWARE_DRAWPIXEL GFXON
|
|
||||||
#define GDISP_HARDWARE_PIXELREAD GFXON
|
|
||||||
#define GDISP_HARDWARE_CONTROL GFXON
|
|
||||||
#define GDISP_HARDWARE_FILLS GFXON
|
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO
|
|
||||||
|
|
||||||
// This controller supports a special gdispControl() to inverse the display.
|
|
||||||
// Pass a parameter of 1 for inverse and 0 for normal.
|
|
||||||
#define GDISP_CONTROL_INVERSE (GDISP_CONTROL_LLD+0)
|
|
||||||
|
|
||||||
#endif // GFX_USE_GDISP
|
|
||||||
|
|
||||||
#endif // _GDISP_LLD_CONFIG_H
|
|
|
@ -1,3 +0,0 @@
|
||||||
GFXINC += $(GFXLIB)/drivers/gdisp/SSD1322
|
|
||||||
GFXSRC += $(GFXLIB)/drivers/gdisp/SSD1322/gdisp_lld_SSD1322.c
|
|
||||||
|
|
|
@ -1,7 +0,0 @@
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}/gdisp_lld_STM32LTDC.c
|
|
||||||
)
|
|
File diff suppressed because it is too large
Load Diff
|
@ -12,8 +12,7 @@ To use this driver:
|
||||||
|
|
||||||
3. Add a `board_STM32LTDC.h` to you project directory (or board directory)
|
3. Add a `board_STM32LTDC.h` to you project directory (or board directory)
|
||||||
based on one of the templates.
|
based on one of the templates.
|
||||||
|
|
||||||
|
|
||||||
# Configuration
|
# Configuration
|
||||||
Configuration options available in `gfxconf.h`:
|
Configuration options available in `gfxconf.h`:
|
||||||
|
|
||||||
|
@ -25,7 +24,6 @@ Configuration options available in `gfxconf.h`:
|
||||||
| `STM32LTDC_USE_DOUBLEBUFFERING` | `GFXOFF` | Whether to use double buffering. See the corresponding section below. |
|
| `STM32LTDC_USE_DOUBLEBUFFERING` | `GFXOFF` | Whether to use double buffering. See the corresponding section below. |
|
||||||
| `STM32LTDC_USE_RGB565` | `GFXOFF` | Whether to use RGB565 instead of RGB888. |
|
| `STM32LTDC_USE_RGB565` | `GFXOFF` | Whether to use RGB565 instead of RGB888. |
|
||||||
|
|
||||||
|
|
||||||
# 2nd layer
|
# 2nd layer
|
||||||
To use the 2nd LTDC layer:
|
To use the 2nd LTDC layer:
|
||||||
- set `STM32LTDC_USE_LAYER2` to `GFXON` in `gfxconf.h`.
|
- set `STM32LTDC_USE_LAYER2` to `GFXON` in `gfxconf.h`.
|
||||||
|
@ -37,7 +35,6 @@ For more information, see:
|
||||||
- https://wiki.ugfx.io/index.php/Multiple_displays#Example_-_Same_controller
|
- https://wiki.ugfx.io/index.php/Multiple_displays#Example_-_Same_controller
|
||||||
- https://wiki.ugfx.io/index.php/Multiple_displays#Access_the_displays
|
- https://wiki.ugfx.io/index.php/Multiple_displays#Access_the_displays
|
||||||
|
|
||||||
|
|
||||||
# Double buffering
|
# Double buffering
|
||||||
To use double buffering:
|
To use double buffering:
|
||||||
- set `STM32LTDC_USE_DOUBLEBUFFERING` to `GFXON` in `gfxconf.h`.
|
- set `STM32LTDC_USE_DOUBLEBUFFERING` to `GFXON` in `gfxconf.h`.
|
||||||
|
|
|
@ -1,138 +1,138 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef STM32_LTDC_H
|
#ifndef STM32_LTDC_H
|
||||||
#define STM32_LTDC_H
|
#define STM32_LTDC_H
|
||||||
|
|
||||||
// LTDC enable flags
|
// LTDC enable flags
|
||||||
#define LTDC_EF_ENABLE (1U << 0) /**< LTDC enabled.*/
|
#define LTDC_EF_ENABLE (1U << 0) /**< LTDC enabled.*/
|
||||||
#define LTDC_EF_DITHER (1U << 16) /**< Dithering enabled.*/
|
#define LTDC_EF_DITHER (1U << 16) /**< Dithering enabled.*/
|
||||||
#define LTDC_EF_PIXCLK_INVERT (1U << 28) /**< Inverted pixel clock.*/
|
#define LTDC_EF_PIXCLK_INVERT (1U << 28) /**< Inverted pixel clock.*/
|
||||||
#define LTDC_EF_DATAEN_HIGH (1U << 29) /**< Active-high data enable.*/
|
#define LTDC_EF_DATAEN_HIGH (1U << 29) /**< Active-high data enable.*/
|
||||||
#define LTDC_EF_VSYNC_HIGH (1U << 30) /**< Active-high vsync.*/
|
#define LTDC_EF_VSYNC_HIGH (1U << 30) /**< Active-high vsync.*/
|
||||||
#define LTDC_EF_HSYNC_HIGH (1U << 31) /**< Active-high hsync.*/
|
#define LTDC_EF_HSYNC_HIGH (1U << 31) /**< Active-high hsync.*/
|
||||||
|
|
||||||
#define LTDC_EF_MASK (LTDC_EF_ENABLE | LTDC_EF_DITHER | LTDC_EF_PIXCLK_INVERT | LTDC_EF_DATAEN_HIGH | LTDC_EF_VSYNC_HIGH | LTDC_EF_HSYNC_HIGH)
|
#define LTDC_EF_MASK (LTDC_EF_ENABLE | LTDC_EF_DITHER | LTDC_EF_PIXCLK_INVERT | LTDC_EF_DATAEN_HIGH | LTDC_EF_VSYNC_HIGH | LTDC_EF_HSYNC_HIGH)
|
||||||
|
|
||||||
// LTDC layer enable flags
|
// LTDC layer enable flags
|
||||||
#define LTDC_LEF_ENABLE (1U << 0) /**< Layer enabled*/
|
#define LTDC_LEF_ENABLE (1U << 0) /**< Layer enabled*/
|
||||||
#define LTDC_LEF_KEYING (1U << 1) /**< Color keying enabled.*/
|
#define LTDC_LEF_KEYING (1U << 1) /**< Color keying enabled.*/
|
||||||
#define LTDC_LEF_PALETTE (1U << 4) /**< Palette enabled.*/
|
#define LTDC_LEF_PALETTE (1U << 4) /**< Palette enabled.*/
|
||||||
|
|
||||||
#define LTDC_LEF_MASK (LTDC_LEF_ENABLE | LTDC_LEF_KEYING | LTDC_LEF_PALETTE)
|
#define LTDC_LEF_MASK (LTDC_LEF_ENABLE | LTDC_LEF_KEYING | LTDC_LEF_PALETTE)
|
||||||
|
|
||||||
// LTDC pixel formats
|
// LTDC pixel formats
|
||||||
#define LTDC_FMT_ARGB8888 0 /**< ARGB-8888 format.*/
|
#define LTDC_FMT_ARGB8888 0 /**< ARGB-8888 format.*/
|
||||||
#define LTDC_FMT_RGB888 1 /**< RGB-888 format.*/
|
#define LTDC_FMT_RGB888 1 /**< RGB-888 format.*/
|
||||||
#define LTDC_FMT_RGB565 2 /**< RGB-565 format.*/
|
#define LTDC_FMT_RGB565 2 /**< RGB-565 format.*/
|
||||||
#define LTDC_FMT_ARGB1555 3 /**< ARGB-1555 format.*/
|
#define LTDC_FMT_ARGB1555 3 /**< ARGB-1555 format.*/
|
||||||
#define LTDC_FMT_ARGB4444 4 /**< ARGB-4444 format.*/
|
#define LTDC_FMT_ARGB4444 4 /**< ARGB-4444 format.*/
|
||||||
#define LTDC_FMT_L8 5 /**< L-8 format.*/
|
#define LTDC_FMT_L8 5 /**< L-8 format.*/
|
||||||
#define LTDC_FMT_AL44 6 /**< AL-44 format.*/
|
#define LTDC_FMT_AL44 6 /**< AL-44 format.*/
|
||||||
#define LTDC_FMT_AL88 7 /**< AL-88 format.*/
|
#define LTDC_FMT_AL88 7 /**< AL-88 format.*/
|
||||||
|
|
||||||
// LTDC pixel format aliased raw masks
|
// LTDC pixel format aliased raw masks
|
||||||
#define LTDC_XMASK_ARGB8888 0xFFFFFFFF /**< ARGB-8888 aliased mask.*/
|
#define LTDC_XMASK_ARGB8888 0xFFFFFFFF /**< ARGB-8888 aliased mask.*/
|
||||||
#define LTDC_XMASK_RGB888 0x00FFFFFF /**< RGB-888 aliased mask.*/
|
#define LTDC_XMASK_RGB888 0x00FFFFFF /**< RGB-888 aliased mask.*/
|
||||||
#define LTDC_XMASK_RGB565 0x00F8FCF8 /**< RGB-565 aliased mask.*/
|
#define LTDC_XMASK_RGB565 0x00F8FCF8 /**< RGB-565 aliased mask.*/
|
||||||
#define LTDC_XMASK_ARGB1555 0x80F8F8F8 /**< ARGB-1555 aliased mask.*/
|
#define LTDC_XMASK_ARGB1555 0x80F8F8F8 /**< ARGB-1555 aliased mask.*/
|
||||||
#define LTDC_XMASK_ARGB4444 0xF0F0F0F0 /**< ARGB-4444 aliased mask.*/
|
#define LTDC_XMASK_ARGB4444 0xF0F0F0F0 /**< ARGB-4444 aliased mask.*/
|
||||||
#define LTDC_XMASK_L8 0x000000FF /**< L-8 aliased mask.*/
|
#define LTDC_XMASK_L8 0x000000FF /**< L-8 aliased mask.*/
|
||||||
#define LTDC_XMASK_AL44 0xF00000F0 /**< AL-44 aliased mask.*/
|
#define LTDC_XMASK_AL44 0xF00000F0 /**< AL-44 aliased mask.*/
|
||||||
#define LTDC_XMASK_AL88 0xFF0000FF /**< AL-88 aliased mask.*/
|
#define LTDC_XMASK_AL88 0xFF0000FF /**< AL-88 aliased mask.*/
|
||||||
|
|
||||||
// LTDC blending factors
|
// LTDC blending factors
|
||||||
#define LTDC_BLEND_FIX1_FIX2 0x0405 /**< cnst1; 1 - cnst2 */
|
#define LTDC_BLEND_FIX1_FIX2 0x0405 /**< cnst1; 1 - cnst2 */
|
||||||
#define LTDC_BLEND_FIX1_MOD2 0x0407 /**< cnst1; 1 - a2 * cnst2 */
|
#define LTDC_BLEND_FIX1_MOD2 0x0407 /**< cnst1; 1 - a2 * cnst2 */
|
||||||
#define LTDC_BLEND_MOD1_FIX2 0x0605 /**< a1 * cnst1; 1 - cnst2 */
|
#define LTDC_BLEND_MOD1_FIX2 0x0605 /**< a1 * cnst1; 1 - cnst2 */
|
||||||
#define LTDC_BLEND_MOD1_MOD2 0x0607 /**< a1 * cnst1; 1 - a2 * cnst2 */
|
#define LTDC_BLEND_MOD1_MOD2 0x0607 /**< a1 * cnst1; 1 - a2 * cnst2 */
|
||||||
|
|
||||||
// LTDC parameter bounds
|
// LTDC parameter bounds
|
||||||
#define LTDC_MIN_SCREEN_WIDTH 1
|
#define LTDC_MIN_SCREEN_WIDTH 1
|
||||||
#define LTDC_MIN_SCREEN_HEIGHT 1
|
#define LTDC_MIN_SCREEN_HEIGHT 1
|
||||||
#define LTDC_MAX_SCREEN_WIDTH 800
|
#define LTDC_MAX_SCREEN_WIDTH 800
|
||||||
#define LTDC_MAX_SCREEN_HEIGHT 600
|
#define LTDC_MAX_SCREEN_HEIGHT 600
|
||||||
|
|
||||||
#define LTDC_MIN_HSYNC_WIDTH 1
|
#define LTDC_MIN_HSYNC_WIDTH 1
|
||||||
#define LTDC_MIN_VSYNC_HEIGHT 1
|
#define LTDC_MIN_VSYNC_HEIGHT 1
|
||||||
#define LTDC_MAX_HSYNC_WIDTH (1U << 12)
|
#define LTDC_MAX_HSYNC_WIDTH (1U << 12)
|
||||||
#define LTDC_MAX_VSYNC_HEIGHT (1U << 11)
|
#define LTDC_MAX_VSYNC_HEIGHT (1U << 11)
|
||||||
|
|
||||||
#define LTDC_MIN_HBP_WIDTH 0
|
#define LTDC_MIN_HBP_WIDTH 0
|
||||||
#define LTDC_MIN_VBP_HEIGHT 0
|
#define LTDC_MIN_VBP_HEIGHT 0
|
||||||
#define LTDC_MAX_HBP_WIDTH (1U << 12)
|
#define LTDC_MAX_HBP_WIDTH (1U << 12)
|
||||||
#define LTDC_MAX_VBP_HEIGHT (1U << 11)
|
#define LTDC_MAX_VBP_HEIGHT (1U << 11)
|
||||||
|
|
||||||
#define LTDC_MIN_ACC_HBP_WIDTH 1
|
#define LTDC_MIN_ACC_HBP_WIDTH 1
|
||||||
#define LTDC_MIN_ACC_VBP_HEIGHT 1
|
#define LTDC_MIN_ACC_VBP_HEIGHT 1
|
||||||
#define LTDC_MAX_ACC_HBP_WIDTH (1U << 12)
|
#define LTDC_MAX_ACC_HBP_WIDTH (1U << 12)
|
||||||
#define LTDC_MAX_ACC_VBP_HEIGHT (1U << 11)
|
#define LTDC_MAX_ACC_VBP_HEIGHT (1U << 11)
|
||||||
|
|
||||||
#define LTDC_MIN_HFP_WIDTH 0
|
#define LTDC_MIN_HFP_WIDTH 0
|
||||||
#define LTDC_MIN_VFP_HEIGHT 0
|
#define LTDC_MIN_VFP_HEIGHT 0
|
||||||
#define LTDC_MAX_HFP_WIDTH (1U << 12)
|
#define LTDC_MAX_HFP_WIDTH (1U << 12)
|
||||||
#define LTDC_MAX_VFP_HEIGHT (1U << 11)
|
#define LTDC_MAX_VFP_HEIGHT (1U << 11)
|
||||||
|
|
||||||
#define LTDC_MIN_ACTIVE_WIDTH 0
|
#define LTDC_MIN_ACTIVE_WIDTH 0
|
||||||
#define LTDC_MIN_ACTIVE_HEIGHT 0
|
#define LTDC_MIN_ACTIVE_HEIGHT 0
|
||||||
#define LTDC_MAX_ACTIVE_WIDTH (1U << 12)
|
#define LTDC_MAX_ACTIVE_WIDTH (1U << 12)
|
||||||
#define LTDC_MAX_ACTIVE_HEIGHT (1U << 11)
|
#define LTDC_MAX_ACTIVE_HEIGHT (1U << 11)
|
||||||
|
|
||||||
#define LTDC_MIN_ACC_ACTIVE_WIDTH 1
|
#define LTDC_MIN_ACC_ACTIVE_WIDTH 1
|
||||||
#define LTDC_MIN_ACC_ACTIVE_HEIGHT 1
|
#define LTDC_MIN_ACC_ACTIVE_HEIGHT 1
|
||||||
#define LTDC_MAX_ACC_ACTIVE_WIDTH (1U << 12)
|
#define LTDC_MAX_ACC_ACTIVE_WIDTH (1U << 12)
|
||||||
#define LTDC_MAX_ACC_ACTIVE_HEIGHT (1U << 11)
|
#define LTDC_MAX_ACC_ACTIVE_HEIGHT (1U << 11)
|
||||||
|
|
||||||
#define LTDC_MIN_ACC_TOTAL_WIDTH 1
|
#define LTDC_MIN_ACC_TOTAL_WIDTH 1
|
||||||
#define LTDC_MIN_ACC_TOTAL_HEIGHT 1
|
#define LTDC_MIN_ACC_TOTAL_HEIGHT 1
|
||||||
#define LTDC_MAX_ACC_TOTAL_WIDTH (1U << 12)
|
#define LTDC_MAX_ACC_TOTAL_WIDTH (1U << 12)
|
||||||
#define LTDC_MAX_ACC_TOTAL_HEIGHT (1U << 11)
|
#define LTDC_MAX_ACC_TOTAL_HEIGHT (1U << 11)
|
||||||
|
|
||||||
#define LTDC_MIN_LINE_INTERRUPT_POS 0
|
#define LTDC_MIN_LINE_INTERRUPT_POS 0
|
||||||
#define LTDC_MAX_LINE_INTERRUPT_POS ((1U << 11) - 1)
|
#define LTDC_MAX_LINE_INTERRUPT_POS ((1U << 11) - 1)
|
||||||
|
|
||||||
#define LTDC_MIN_WINDOW_HSTART 0
|
#define LTDC_MIN_WINDOW_HSTART 0
|
||||||
#define LTDC_MIN_WINDOW_HSTART 0
|
#define LTDC_MIN_WINDOW_HSTART 0
|
||||||
#define LTDC_MAX_WINDOW_HSTOP ((1U << 12) - 1)
|
#define LTDC_MAX_WINDOW_HSTOP ((1U << 12) - 1)
|
||||||
#define LTDC_MAX_WINDOW_HSTOP ((1U << 12) - 1)
|
#define LTDC_MAX_WINDOW_HSTOP ((1U << 12) - 1)
|
||||||
|
|
||||||
#define LTDC_MIN_WINDOW_VSTART 0
|
#define LTDC_MIN_WINDOW_VSTART 0
|
||||||
#define LTDC_MIN_WINDOW_VSTART 0
|
#define LTDC_MIN_WINDOW_VSTART 0
|
||||||
#define LTDC_MAX_WINDOW_VSTOP ((1U << 11) - 1)
|
#define LTDC_MAX_WINDOW_VSTOP ((1U << 11) - 1)
|
||||||
#define LTDC_MAX_WINDOW_VSTOP ((1U << 11) - 1)
|
#define LTDC_MAX_WINDOW_VSTOP ((1U << 11) - 1)
|
||||||
|
|
||||||
#define LTDC_MIN_FRAME_WIDTH_BYTES 0
|
#define LTDC_MIN_FRAME_WIDTH_BYTES 0
|
||||||
#define LTDC_MIN_FRAME_HEIGHT_LINES 0
|
#define LTDC_MIN_FRAME_HEIGHT_LINES 0
|
||||||
#define LTDC_MIN_FRAME_PITCH_BYTES 0
|
#define LTDC_MIN_FRAME_PITCH_BYTES 0
|
||||||
#define LTDC_MAX_FRAME_WIDTH_BYTES ((1U << 13) - 1 - 3)
|
#define LTDC_MAX_FRAME_WIDTH_BYTES ((1U << 13) - 1 - 3)
|
||||||
#define LTDC_MAX_FRAME_HEIGHT_LINES ((1U << 11) - 1)
|
#define LTDC_MAX_FRAME_HEIGHT_LINES ((1U << 11) - 1)
|
||||||
#define LTDC_MAX_FRAME_PITCH_BYTES ((1U << 13) - 1)
|
#define LTDC_MAX_FRAME_PITCH_BYTES ((1U << 13) - 1)
|
||||||
|
|
||||||
#define LTDC_MIN_PIXFMT_ID 0
|
#define LTDC_MIN_PIXFMT_ID 0
|
||||||
#define LTDC_MAX_PIXFMT_ID 7
|
#define LTDC_MAX_PIXFMT_ID 7
|
||||||
|
|
||||||
#define LTDC_MAX_PALETTE_LENGTH 256
|
#define LTDC_MAX_PALETTE_LENGTH 256
|
||||||
|
|
||||||
// LTDC basic ARGB-8888 colors.
|
// LTDC basic ARGB-8888 colors.
|
||||||
#define LTDC_COLOR_BLACK 0xFF000000
|
#define LTDC_COLOR_BLACK 0xFF000000
|
||||||
#define LTDC_COLOR_MAROON 0xFF800000
|
#define LTDC_COLOR_MAROON 0xFF800000
|
||||||
#define LTDC_COLOR_GREEN 0xFF008000
|
#define LTDC_COLOR_GREEN 0xFF008000
|
||||||
#define LTDC_COLOR_OLIVE 0xFF808000
|
#define LTDC_COLOR_OLIVE 0xFF808000
|
||||||
#define LTDC_COLOR_NAVY 0xFF000080
|
#define LTDC_COLOR_NAVY 0xFF000080
|
||||||
#define LTDC_COLOR_PURPLE 0xFF800080
|
#define LTDC_COLOR_PURPLE 0xFF800080
|
||||||
#define LTDC_COLOR_TEAL 0xFF008080
|
#define LTDC_COLOR_TEAL 0xFF008080
|
||||||
#define LTDC_COLOR_SILVER 0xFFC0C0C0
|
#define LTDC_COLOR_SILVER 0xFFC0C0C0
|
||||||
#define LTDC_COLOR_GRAY 0xFF808080
|
#define LTDC_COLOR_GRAY 0xFF808080
|
||||||
#define LTDC_COLOR_RED 0xFFFF0000
|
#define LTDC_COLOR_RED 0xFFFF0000
|
||||||
#define LTDC_COLOR_LIME 0xFF00FF00
|
#define LTDC_COLOR_LIME 0xFF00FF00
|
||||||
#define LTDC_COLOR_YELLOW 0xFFFFFF00
|
#define LTDC_COLOR_YELLOW 0xFFFFFF00
|
||||||
#define LTDC_COLOR_BLUE 0xFF0000FF
|
#define LTDC_COLOR_BLUE 0xFF0000FF
|
||||||
#define LTDC_COLOR_FUCHSIA 0xFFFF00FF
|
#define LTDC_COLOR_FUCHSIA 0xFFFF00FF
|
||||||
#define LTDC_COLOR_AQUA 0xFF00FFFF
|
#define LTDC_COLOR_AQUA 0xFF00FFFF
|
||||||
#define LTDC_COLOR_WHITE 0xFFFFFFFF
|
#define LTDC_COLOR_WHITE 0xFFFFFFFF
|
||||||
|
|
||||||
#endif /* STM32_LTDC_H */
|
#endif /* STM32_LTDC_H */
|
||||||
|
|
|
@ -4,21 +4,21 @@
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GDISP_LLD_CONFIG_H
|
#ifndef _GDISP_LLD_CONFIG_H
|
||||||
#define _GDISP_LLD_CONFIG_H
|
#define _GDISP_LLD_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GDISP
|
#if GFX_USE_GDISP
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver hardware support. */
|
/* Driver hardware support. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define GDISP_HARDWARE_DRAWPIXEL GFXON
|
#define GDISP_HARDWARE_DRAWPIXEL GFXON
|
||||||
#define GDISP_HARDWARE_PIXELREAD GFXON
|
#define GDISP_HARDWARE_PIXELREAD GFXON
|
||||||
|
|
||||||
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
#define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP */
|
#endif /* GFX_USE_GDISP */
|
||||||
|
|
||||||
#endif /* _GDISP_LLD_CONFIG_H */
|
#endif /* _GDISP_LLD_CONFIG_H */
|
||||||
|
|
|
@ -1,8 +0,0 @@
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}/gdisp_lld_framebuffer.c
|
|
||||||
)
|
|
||||||
|
|
|
@ -1,46 +1,45 @@
|
||||||
A list of current display drivers:
|
A list of current display drivers:
|
||||||
|
|
||||||
AlteraFramereader - Support for the "Altera Frame Reader IP Core"
|
AlteraFramereader - Support for the "Altera Frame Reader IP Core"
|
||||||
ED060SC4 - E-Ink display
|
ED060SC4 - E-Ink display
|
||||||
framebuffer - Supports any non-palletized, non-bitpacked color display with a framebuffer
|
framebuffer - Supports any non-palletized, non-bitpacked color display with a framebuffer
|
||||||
Fb24bpp - Same as 'framebuffer' driver but supports RGB888 and BGR888 packed framebuffer formats.
|
Fb24bpp - Same as 'framebuffer' driver but supports RGB888 and BGR888 packed framebuffer formats.
|
||||||
HX8347D - Mid-sized color LCD displays eg RGB565 320x240
|
HX8347D - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
ILI9320 - Mid-sized color LCD displays eg RGB565 320x240
|
ILI9320 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
ILI9325 - Mid-sized color LCD displays eg RGB565 320x240
|
ILI9325 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
ILI9341 - Mid-sized color LCD displays eg RGB565 320x240
|
ILI9341 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
ILI9342 - Mid-sized color LCD displays eg RGB565 320x240
|
ILI9342 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
ILI93xx - Mid-sized color LCD displays eg RGB565 320x240 (attempt at a common driver)
|
ILI93xx - Mid-sized color LCD displays eg RGB565 320x240 (attempt at a common driver)
|
||||||
ILI9481 - Mid-sized color LCD displays eg RGB565 320x240
|
ILI9481 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
KS0108 - Small monochrome LCD
|
KS0108 - Small monochrome LCD
|
||||||
LGDP4532 - Mid-sized color LCD displays eg RGB565 320x240
|
LGDP4532 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
Nokia6610GE8 - Small (130x130) 12bit color LCD
|
Nokia6610GE8 - Small (130x130) 12bit color LCD
|
||||||
Nokia6610GE12 - Small (130x130) 12bit color LCD (untested)
|
Nokia6610GE12 - Small (130x130) 12bit color LCD (untested)
|
||||||
PCD8544 - Small monochrome LCD
|
PCD8544 - Small monochrome LCD
|
||||||
PCF8812 - Small monochrome LCD
|
PCF8812 - Small monochrome LCD
|
||||||
R61505U - Mid-sized color LCD displays eg RGB565 320x240
|
R61505U - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
RA6963 - Small monochrome LCD
|
RA6963 - Small monochrome LCD
|
||||||
RA8875 - Mid-sized color LCD displays eg RGB565 320x240
|
RA8875 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
S6D1121 - Mid-sized color LCD displays eg RGB565 320x240
|
S6D1121 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
SPFD54124B - Mid-sized color LCD displays eg RGB565 320x240
|
SPFD54124B - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
SSD1289 - Mid-sized color LCD displays eg RGB565 320x240
|
SSD1289 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
SSD1306 - Small monochrome LCD
|
SSD1306 - Small monochrome LCD
|
||||||
SSD1312 - Small monochrome LCD (usually 128x32 or 128x64 OLED)
|
SSD1322 - Small 16 level grayscale LCD
|
||||||
SSD1322 - Small 16 level grayscale LCD
|
SSD1331 - Small hardware accelerated OLED display RGB565 96x64
|
||||||
SSD1331 - Small hardware accelerated OLED display RGB565 96x64
|
SSD1351 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
SSD1351 - Mid-sized color LCD displays eg RGB565 320x240
|
SSD1848 - Small grayscale LCD eg 2-Bit 130x130
|
||||||
SSD1848 - Small grayscale LCD eg 2-Bit 130x130
|
SSD1963 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
SSD1963 - Mid-sized color LCD displays eg RGB565 320x240
|
SSD2119 - Mid-sized color LCD displays eg RGB565 320x240
|
||||||
SSD2119 - Mid-sized color LCD displays eg RGB565 320x240
|
ST7565 - Small monochrome LCD
|
||||||
ST7565 - Small monochrome LCD
|
STM32LTDC - STM32 ART graphics STM32F4 and STM32F7 series CPU's
|
||||||
STM32LTDC - STM32 ART graphics STM32F4 and STM32F7 series CPU's
|
TestStub - NULL driver just to test compile
|
||||||
TestStub - NULL driver just to test compile
|
TLS8204 - Small monochrome LCD
|
||||||
TLS8204 - Small monochrome LCD
|
UC8173 - E-Ink display driver
|
||||||
UC8173 - E-Ink display driver
|
UC1601s - Small (64x132) monochrome LCD
|
||||||
UC1601s - Small (64x132) monochrome LCD
|
UC1610 - Small (78x64 or 160x104) 4 level grayscale LCD
|
||||||
UC1610 - Small (78x64 or 160x104) 4 level grayscale LCD
|
UC8175 - Small E-Ink display
|
||||||
UC8175 - Small E-Ink display
|
WS29EPD - Small E-Ink display by WaveShare
|
||||||
WS29EPD - Small E-Ink display by WaveShare
|
QImage - Driver that allows rendering into a QImage object (of the Qt framework)
|
||||||
QImage - Driver that allows rendering into a QImage object (of the Qt framework)
|
uGFXnet - Remote Network display (in drivers/multiple/uGFXnet directory)
|
||||||
uGFXnet - Remote Network display (in drivers/multiple/uGFXnet directory)
|
Win32 - Microsoft Windows (in drivers/multiple/Win32 directory)
|
||||||
Win32 - Microsoft Windows (in drivers/multiple/Win32 directory)
|
X - X Windows (Xlib) (in drivers/multiple/X directory)
|
||||||
X - X Windows (Xlib) (in drivers/multiple/X directory)
|
|
||||||
|
|
|
@ -3,16 +3,16 @@
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GINPUT_LLD_TOGGLE_CONFIG_H
|
#ifndef _GINPUT_LLD_TOGGLE_CONFIG_H
|
||||||
#define _GINPUT_LLD_TOGGLE_CONFIG_H
|
#define _GINPUT_LLD_TOGGLE_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GINPUT && GINPUT_NEED_TOGGLE
|
#if GFX_USE_GINPUT && GINPUT_NEED_TOGGLE
|
||||||
|
|
||||||
/* Include the user supplied board definitions */
|
/* Include the user supplied board definitions */
|
||||||
#include "ginput_lld_toggle_board.h"
|
#include "ginput_lld_toggle_board.h"
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP && GINPUT_NEED_TOGGLE */
|
#endif /* GFX_USE_GDISP && GINPUT_NEED_TOGGLE */
|
||||||
|
|
||||||
#endif /* _GINPUT_LLD_TOGGLE_CONFIG_H */
|
#endif /* _GINPUT_LLD_TOGGLE_CONFIG_H */
|
||||||
|
|
|
@ -1,13 +1,13 @@
|
||||||
To use this driver:
|
To use this driver:
|
||||||
|
|
||||||
1. Add in your gfxconf.h:
|
1. Add in your gfxconf.h:
|
||||||
a) #define GFX_USE_GINPUT GFXON
|
a) #define GFX_USE_GINPUT GFXON
|
||||||
#define GINPUT_NEED_TOGGLE GFXON
|
#define GINPUT_NEED_TOGGLE GFXON
|
||||||
d) If you are not using a known board then create a ginput_lld_toggle_board.h file
|
d) If you are not using a known board then create a ginput_lld_toggle_board.h file
|
||||||
and ensure it is on your include path.
|
and ensure it is on your include path.
|
||||||
Use the ginput_lld_toggle_board_example.h file as a basis.
|
Use the ginput_lld_toggle_board_example.h file as a basis.
|
||||||
Currently known boards are:
|
Currently known boards are:
|
||||||
Olimex SAM7-EX256
|
Olimex SAM7-EX256
|
||||||
|
|
||||||
2. To your makefile add the following lines:
|
2. To your makefile add the following lines:
|
||||||
include $(GFXLIB)/drivers/ginput/toggle/Pal/driver.mk
|
include $(GFXLIB)/drivers/ginput/toggle/Pal/driver.mk
|
||||||
|
|
|
@ -1,80 +1,80 @@
|
||||||
/*
|
/*
|
||||||
* This file is subject to the terms of the GFX License. If a copy of
|
* This file is subject to the terms of the GFX License. If a copy of
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "gfx.h"
|
#include "gfx.h"
|
||||||
|
|
||||||
#if (GFX_USE_GINPUT && GINPUT_NEED_MOUSE)
|
#if (GFX_USE_GINPUT && GINPUT_NEED_MOUSE)
|
||||||
|
|
||||||
#define GMOUSE_DRIVER_VMT GMOUSEVMT_ADS7843
|
#define GMOUSE_DRIVER_VMT GMOUSEVMT_ADS7843
|
||||||
#include "../../../../src/ginput/ginput_driver_mouse.h"
|
#include "../../../../src/ginput/ginput_driver_mouse.h"
|
||||||
|
|
||||||
// Get the hardware interface
|
// Get the hardware interface
|
||||||
#include "gmouse_lld_ADS7843_board.h"
|
#include "gmouse_lld_ADS7843_board.h"
|
||||||
|
|
||||||
#define CMD_X 0xD1
|
#define CMD_X 0xD1
|
||||||
#define CMD_Y 0x91
|
#define CMD_Y 0x91
|
||||||
#define CMD_ENABLE_IRQ 0x80
|
#define CMD_ENABLE_IRQ 0x80
|
||||||
|
|
||||||
static gBool MouseXYZ(GMouse* m, GMouseReading* pdr)
|
static gBool MouseXYZ(GMouse* m, GMouseReading* pdr)
|
||||||
{
|
{
|
||||||
(void)m;
|
(void)m;
|
||||||
|
|
||||||
// No buttons
|
// No buttons
|
||||||
pdr->buttons = 0;
|
pdr->buttons = 0;
|
||||||
pdr->z = 0;
|
pdr->z = 0;
|
||||||
|
|
||||||
if (getpin_pressed(m)) {
|
if (getpin_pressed(m)) {
|
||||||
pdr->z = 1; // Set to Z_MAX as we are pressed
|
pdr->z = 1; // Set to Z_MAX as we are pressed
|
||||||
|
|
||||||
aquire_bus(m);
|
aquire_bus(m);
|
||||||
|
|
||||||
read_value(m, CMD_X); // Dummy read - disable PenIRQ
|
read_value(m, CMD_X); // Dummy read - disable PenIRQ
|
||||||
pdr->x = read_value(m, CMD_X); // Read X-Value
|
pdr->x = read_value(m, CMD_X); // Read X-Value
|
||||||
|
|
||||||
read_value(m, CMD_Y); // Dummy read - disable PenIRQ
|
read_value(m, CMD_Y); // Dummy read - disable PenIRQ
|
||||||
pdr->y = read_value(m, CMD_Y); // Read Y-Value
|
pdr->y = read_value(m, CMD_Y); // Read Y-Value
|
||||||
|
|
||||||
read_value(m, CMD_ENABLE_IRQ); // Enable IRQ
|
read_value(m, CMD_ENABLE_IRQ); // Enable IRQ
|
||||||
|
|
||||||
release_bus(m);
|
release_bus(m);
|
||||||
}
|
}
|
||||||
return gTrue;
|
return gTrue;
|
||||||
}
|
}
|
||||||
|
|
||||||
const GMouseVMT const GMOUSE_DRIVER_VMT[1] = {{
|
const GMouseVMT const GMOUSE_DRIVER_VMT[1] = {{
|
||||||
{
|
{
|
||||||
GDRIVER_TYPE_TOUCH,
|
GDRIVER_TYPE_TOUCH,
|
||||||
GMOUSE_VFLG_TOUCH | GMOUSE_VFLG_CALIBRATE | GMOUSE_VFLG_CAL_TEST |
|
GMOUSE_VFLG_TOUCH | GMOUSE_VFLG_CALIBRATE | GMOUSE_VFLG_CAL_TEST |
|
||||||
GMOUSE_VFLG_ONLY_DOWN | GMOUSE_VFLG_POORUPDOWN,
|
GMOUSE_VFLG_ONLY_DOWN | GMOUSE_VFLG_POORUPDOWN,
|
||||||
sizeof(GMouse)+GMOUSE_ADS7843_BOARD_DATA_SIZE,
|
sizeof(GMouse)+GMOUSE_ADS7843_BOARD_DATA_SIZE,
|
||||||
_gmouseInitDriver,
|
_gmouseInitDriver,
|
||||||
_gmousePostInitDriver,
|
_gmousePostInitDriver,
|
||||||
_gmouseDeInitDriver
|
_gmouseDeInitDriver
|
||||||
},
|
},
|
||||||
1, // z_max - (currently?) not supported
|
1, // z_max - (currently?) not supported
|
||||||
0, // z_min - (currently?) not supported
|
0, // z_min - (currently?) not supported
|
||||||
1, // z_touchon
|
1, // z_touchon
|
||||||
0, // z_touchoff
|
0, // z_touchoff
|
||||||
{ // pen_jitter
|
{ // pen_jitter
|
||||||
GMOUSE_ADS7843_PEN_CALIBRATE_ERROR, // calibrate
|
GMOUSE_ADS7843_PEN_CALIBRATE_ERROR, // calibrate
|
||||||
GMOUSE_ADS7843_PEN_CLICK_ERROR, // click
|
GMOUSE_ADS7843_PEN_CLICK_ERROR, // click
|
||||||
GMOUSE_ADS7843_PEN_MOVE_ERROR // move
|
GMOUSE_ADS7843_PEN_MOVE_ERROR // move
|
||||||
},
|
},
|
||||||
{ // finger_jitter
|
{ // finger_jitter
|
||||||
GMOUSE_ADS7843_FINGER_CALIBRATE_ERROR, // calibrate
|
GMOUSE_ADS7843_FINGER_CALIBRATE_ERROR, // calibrate
|
||||||
GMOUSE_ADS7843_FINGER_CLICK_ERROR, // click
|
GMOUSE_ADS7843_FINGER_CLICK_ERROR, // click
|
||||||
GMOUSE_ADS7843_FINGER_MOVE_ERROR // move
|
GMOUSE_ADS7843_FINGER_MOVE_ERROR // move
|
||||||
},
|
},
|
||||||
init_board, // init
|
init_board, // init
|
||||||
0, // deinit
|
0, // deinit
|
||||||
MouseXYZ, // get
|
MouseXYZ, // get
|
||||||
0, // calsave
|
0, // calsave
|
||||||
0 // calload
|
0 // calload
|
||||||
}};
|
}};
|
||||||
|
|
||||||
#endif /* GFX_USE_GINPUT && GINPUT_NEED_MOUSE */
|
#endif /* GFX_USE_GINPUT && GINPUT_NEED_MOUSE */
|
||||||
|
|
||||||
|
|
|
@ -1,8 +0,0 @@
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${CMAKE_CURRENT_LIST_DIR}/gmouse_lld_linux_event.c
|
|
||||||
)
|
|
||||||
|
|
|
@ -1,48 +0,0 @@
|
||||||
set(ROOT_PATH ${UGFX_ROOT}/drivers/multiple/SDL)
|
|
||||||
|
|
||||||
# Defaults
|
|
||||||
if (NOT UGFX_DEPENDENCY_SDL2_DOWNLOAD)
|
|
||||||
set(UGFX_DEPENDENCY_SDL2_DOWNLOAD OFF)
|
|
||||||
endif()
|
|
||||||
|
|
||||||
# Get or find SDL2
|
|
||||||
if (UGFX_DEPENDENCY_SDL2_DOWNLOAD)
|
|
||||||
include(FetchContent)
|
|
||||||
|
|
||||||
FetchContent_Declare(
|
|
||||||
SDL2
|
|
||||||
GIT_REPOSITORY https://github.com/libsdl-org/SDL
|
|
||||||
GIT_TAG release-2.26.5
|
|
||||||
)
|
|
||||||
FetchContent_MakeAvailable(SDL2)
|
|
||||||
|
|
||||||
if (NOT UGFX_DEPENDENCY_SDL2_TARGET)
|
|
||||||
set(UGFX_DEPENDENCY_SDL2_TARGET SDL2-static)
|
|
||||||
endif()
|
|
||||||
else()
|
|
||||||
find_package(
|
|
||||||
SDL2
|
|
||||||
REQUIRED
|
|
||||||
)
|
|
||||||
|
|
||||||
if (NOT UGFX_DEPENDENCY_SDL2_TARGET)
|
|
||||||
set(UGFX_DEPENDENCY_SDL2_TARGET SDL2::SDL2)
|
|
||||||
endif()
|
|
||||||
endif()
|
|
||||||
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${ROOT_PATH}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${ROOT_PATH}/gdisp_lld_SDL.c
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_DEFS
|
|
||||||
GFX_OS_PRE_INIT_FUNCTION=sdl_driver_init
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_LIBS
|
|
||||||
${UGFX_DEPENDENCY_SDL2_TARGET}
|
|
||||||
)
|
|
||||||
|
|
|
@ -174,8 +174,8 @@ static struct SDL_UGFXContext *context;
|
||||||
static sem_t *ctx_mutex;
|
static sem_t *ctx_mutex;
|
||||||
static sem_t *input_event;
|
static sem_t *input_event;
|
||||||
|
|
||||||
#define CTX_MUTEX_NAME "/ugfx_ctx_mutex"
|
#define CTX_MUTEX_NAME "ugfx_ctx_mutex"
|
||||||
#define INPUT_EVENT_NAME "/ugfx_input_event"
|
#define INPUT_EVENT_NAME "ugfx_input_event"
|
||||||
|
|
||||||
|
|
||||||
static int SDL_loop (void) {
|
static int SDL_loop (void) {
|
||||||
|
@ -311,12 +311,12 @@ static void *SDL_input_event_loop (void *arg) {
|
||||||
// Must be executed on early stage of initialization: before threads and timer
|
// Must be executed on early stage of initialization: before threads and timer
|
||||||
|
|
||||||
void sdl_driver_init (void) {
|
void sdl_driver_init (void) {
|
||||||
if (SDL_Init(SDL_INIT_VIDEO | SDL_INIT_EVENTS) != 0){
|
if (SDL_Init(SDL_INIT_EVERYTHING) != 0){
|
||||||
fprintf(stderr, "Unable to initialize SDL: %s\n", SDL_GetError());
|
fprintf(stderr, "Unable to initialize SDL: %s\n", SDL_GetError());
|
||||||
exit (1) ;
|
exit (1) ;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((context = (struct SDL_UGFXContext*) mmap (0, sizeof(struct SDL_UGFXContext), PROT_WRITE|PROT_READ, (MAP_ANONYMOUS | MAP_SHARED), -1, 0)) == MAP_FAILED) {
|
if ((context = (struct SDL_UGFXContext*) mmap (0,sizeof (struct SDL_UGFXContext ),PROT_WRITE|PROT_READ,(MAP_ANONYMOUS | MAP_SHARED),0,0)) ==MAP_FAILED) {
|
||||||
perror("Failed to allocate shared memory");
|
perror("Failed to allocate shared memory");
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
|
|
|
@ -24,4 +24,3 @@ and a touchscreen driver.
|
||||||
|
|
||||||
4. Modify your makefile to add `sdl2-config --libs --cflags` to the CFLAGS line. i.e.
|
4. Modify your makefile to add `sdl2-config --libs --cflags` to the CFLAGS line. i.e.
|
||||||
CFLAGS = `sdl2-config --libs --cflags`
|
CFLAGS = `sdl2-config --libs --cflags`
|
||||||
|
|
||||||
|
|
|
@ -1,13 +0,0 @@
|
||||||
set(ROOT_PATH ${UGFX_ROOT}/drivers/multiple/Win32)
|
|
||||||
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${ROOT_PATH}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${ROOT_PATH}/gdisp_lld_Win32.c
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_LIBS
|
|
||||||
gdi32
|
|
||||||
)
|
|
|
@ -647,30 +647,12 @@ static LRESULT myWindowProc(HWND hWnd, UINT Msg, WPARAM wParam, LPARAM lParam)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if GFX_USE_GINPUT && GINPUT_NEED_KEYBOARD
|
#if GFX_USE_GINPUT && GINPUT_NEED_KEYBOARD
|
||||||
case WM_ACTIVATE:
|
|
||||||
// Copy the lock key states into the uGFX keyboard as it might have changed while we were away
|
|
||||||
// For simplicity we do this on both activate and deactivate.
|
|
||||||
if (keyboard && keyboard->pLayout) {
|
|
||||||
if (GetKeyState(VK_NUMLOCK) & 1)
|
|
||||||
keyboard->keystate |= GKEYSTATE_NUMLOCK;
|
|
||||||
else
|
|
||||||
keyboard->keystate &= ~GKEYSTATE_NUMLOCK;
|
|
||||||
if (GetKeyState(VK_CAPITAL) & 1)
|
|
||||||
keyboard->keystate |= GKEYSTATE_CAPSLOCK;
|
|
||||||
else
|
|
||||||
keyboard->keystate &= ~GKEYSTATE_CAPSLOCK;
|
|
||||||
if (GetKeyState(VK_SCROLL) & 1)
|
|
||||||
keyboard->keystate |= GKEYSTATE_SCROLLLOCK;
|
|
||||||
else
|
|
||||||
keyboard->keystate &= ~GKEYSTATE_SCROLLLOCK;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case WM_SYSKEYDOWN:
|
case WM_SYSKEYDOWN:
|
||||||
case WM_SYSKEYUP:
|
case WM_SYSKEYUP:
|
||||||
case WM_KEYDOWN:
|
case WM_KEYDOWN:
|
||||||
case WM_KEYUP:
|
case WM_KEYUP:
|
||||||
// A layout is being used: Send scan codes to the keyboard buffer
|
// A layout is being used: Send scan codes to the keyboard buffer
|
||||||
if (keyboard && keyboard->pLayout && keypos < (int)sizeof(keybuffer)-1 && (wParam & 0xFF) >= VK_BACK) {
|
if (keyboard && keyboard->pLayout && keypos < (int)sizeof(keybuffer)-1 && (wParam & 0xFF) > 0x01) {
|
||||||
if (Msg == WM_KEYUP || Msg == WM_SYSKEYUP)
|
if (Msg == WM_KEYUP || Msg == WM_SYSKEYUP)
|
||||||
keybuffer[keypos++] = 0x00; // Keyup
|
keybuffer[keypos++] = 0x00; // Keyup
|
||||||
else if (HIWORD(lParam) & KF_REPEAT)
|
else if (HIWORD(lParam) & KF_REPEAT)
|
||||||
|
@ -1297,17 +1279,11 @@ LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
||||||
gPixel * buffer;
|
gPixel * buffer;
|
||||||
RECT rect;
|
RECT rect;
|
||||||
BITMAPV4HEADER bmpInfo;
|
BITMAPV4HEADER bmpInfo;
|
||||||
#if GDISP_NEED_CONTROL
|
|
||||||
gPixel* bufferBase;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Make everything relative to the start of the line
|
// Make everything relative to the start of the line
|
||||||
priv = g->priv;
|
priv = g->priv;
|
||||||
buffer = g->p.ptr;
|
buffer = g->p.ptr;
|
||||||
buffer += g->p.x2 * g->p.y1 + g->p.x1;
|
buffer += g->p.x2*g->p.y1;
|
||||||
#if GDISP_NEED_CONTROL
|
|
||||||
bufferBase = buffer; // Keep pointer to original buffer for correct free()-ing later on
|
|
||||||
#endif
|
|
||||||
|
|
||||||
memset(&bmpInfo, 0, sizeof(bmpInfo));
|
memset(&bmpInfo, 0, sizeof(bmpInfo));
|
||||||
bmpInfo.bV4Size = sizeof(bmpInfo);
|
bmpInfo.bV4Size = sizeof(bmpInfo);
|
||||||
|
@ -1393,7 +1369,7 @@ LLDSPEC gBool gdisp_lld_init(GDisplay *g) {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if GDISP_NEED_CONTROL
|
#if GDISP_NEED_CONTROL
|
||||||
if (bufferBase != buffer)
|
if (buffer != (gPixel *)g->p.ptr)
|
||||||
free(buffer);
|
free(buffer);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
|
@ -3,37 +3,37 @@
|
||||||
* the license was not distributed with this file, you can obtain one at:
|
* the license was not distributed with this file, you can obtain one at:
|
||||||
*
|
*
|
||||||
* http://ugfx.io/license.html
|
* http://ugfx.io/license.html
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _GINPUT_LLD_TOGGLE_CONFIG_H
|
#ifndef _GINPUT_LLD_TOGGLE_CONFIG_H
|
||||||
#define _GINPUT_LLD_TOGGLE_CONFIG_H
|
#define _GINPUT_LLD_TOGGLE_CONFIG_H
|
||||||
|
|
||||||
#if GFX_USE_GINPUT && GINPUT_NEED_TOGGLE
|
#if GFX_USE_GINPUT && GINPUT_NEED_TOGGLE
|
||||||
|
|
||||||
#define GINPUT_TOGGLE_POLL_PERIOD gDelayForever // We are interrupt driven (or polled - either works here)
|
#define GINPUT_TOGGLE_POLL_PERIOD gDelayForever // We are interrupt driven (or polled - either works here)
|
||||||
|
|
||||||
// This driver is unique in that it can support 8 buttons per window across multiple windows.
|
// This driver is unique in that it can support 8 buttons per window across multiple windows.
|
||||||
// GINPUT_TOGGLE_CONFIG_ENTRIES just must be less than the number of GDISP windows (GDISP_DRIVER_COUNT_WIN32).
|
// GINPUT_TOGGLE_CONFIG_ENTRIES just must be less than the number of GDISP windows (GDISP_DRIVER_COUNT_WIN32).
|
||||||
// DEPRECATED: Currently only supports a single window with buttons until toggles use GDriver
|
// DEPRECATED: Currently only supports a single window with buttons until toggles use GDriver
|
||||||
#ifndef GINPUT_TOGGLE_CONFIG_ENTRIES
|
#ifndef GINPUT_TOGGLE_CONFIG_ENTRIES
|
||||||
#define GINPUT_TOGGLE_CONFIG_ENTRIES 1 // The total number of GToggleConfig entries
|
#define GINPUT_TOGGLE_CONFIG_ENTRIES 1 // The total number of GToggleConfig entries
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// The total number of toggle inputs
|
// The total number of toggle inputs
|
||||||
#define GINPUT_TOGGLE_NUM_PORTS (8 * GINPUT_TOGGLE_CONFIG_ENTRIES)
|
#define GINPUT_TOGGLE_NUM_PORTS (8 * GINPUT_TOGGLE_CONFIG_ENTRIES)
|
||||||
|
|
||||||
#define GINPUT_TOGGLE_SW1 0 // Switch 1 - Toggle
|
#define GINPUT_TOGGLE_SW1 0 // Switch 1 - Toggle
|
||||||
#define GINPUT_TOGGLE_SW2 1 // Switch 2 - Toggle
|
#define GINPUT_TOGGLE_SW2 1 // Switch 2 - Toggle
|
||||||
#define GINPUT_TOGGLE_SW3 2 // Switch 3 - Toggle
|
#define GINPUT_TOGGLE_SW3 2 // Switch 3 - Toggle
|
||||||
#define GINPUT_TOGGLE_SW4 3 // Switch 4 - Toggle
|
#define GINPUT_TOGGLE_SW4 3 // Switch 4 - Toggle
|
||||||
|
|
||||||
#define GINPUT_TOGGLE_MOMENTARY1 4 // Switch 5 - Momentary
|
#define GINPUT_TOGGLE_MOMENTARY1 4 // Switch 5 - Momentary
|
||||||
#define GINPUT_TOGGLE_MOMENTARY2 5 // Switch 6 - Momentary
|
#define GINPUT_TOGGLE_MOMENTARY2 5 // Switch 6 - Momentary
|
||||||
#define GINPUT_TOGGLE_MOMENTARY3 6 // Switch 7 - Momentary
|
#define GINPUT_TOGGLE_MOMENTARY3 6 // Switch 7 - Momentary
|
||||||
#define GINPUT_TOGGLE_MOMENTARY4 7 // Switch 8 - Momentary
|
#define GINPUT_TOGGLE_MOMENTARY4 7 // Switch 8 - Momentary
|
||||||
|
|
||||||
// This pattern of switch and momentary action is repeated across all windows.
|
// This pattern of switch and momentary action is repeated across all windows.
|
||||||
|
|
||||||
#endif /* GFX_USE_GDISP && GINPUT_NEED_TOGGLE */
|
#endif /* GFX_USE_GDISP && GINPUT_NEED_TOGGLE */
|
||||||
|
|
||||||
#endif /* _GINPUT_LLD_TOGGLE_CONFIG_H */
|
#endif /* _GINPUT_LLD_TOGGLE_CONFIG_H */
|
||||||
|
|
|
@ -1,29 +1,29 @@
|
||||||
To use this driver:
|
To use this driver:
|
||||||
|
|
||||||
This driver is special in that it implements both the gdisp low level driver,
|
This driver is special in that it implements both the gdisp low level driver,
|
||||||
optionally a touchscreen driver, and optionally a toggle driver.
|
optionally a touchscreen driver, and optionally a toggle driver.
|
||||||
|
|
||||||
1. Add in your gfxconf.h:
|
1. Add in your gfxconf.h:
|
||||||
a) #define GFX_USE_GDISP GFXON
|
a) #define GFX_USE_GDISP GFXON
|
||||||
b) Optionally #define GFX_USE_GINPUT GFXON
|
b) Optionally #define GFX_USE_GINPUT GFXON
|
||||||
#define GINPUT_USE_MOUSE GFXON
|
#define GINPUT_USE_MOUSE GFXON
|
||||||
#define GINPUT_USE_TOGGLE GFXON
|
#define GINPUT_USE_TOGGLE GFXON
|
||||||
c) Any optional high level driver defines (see gdisp.h) eg: GDISP_NEED_MULTITHREAD
|
c) Any optional high level driver defines (see gdisp.h) eg: GDISP_NEED_MULTITHREAD
|
||||||
d) Optionally the following (with appropriate values):
|
d) Optionally the following (with appropriate values):
|
||||||
#define GDISP_SCREEN_WIDTH 640
|
#define GDISP_SCREEN_WIDTH 640
|
||||||
#define GDISP_SCREEN_HEIGHT 480
|
#define GDISP_SCREEN_HEIGHT 480
|
||||||
|
|
||||||
|
|
||||||
2. To your makefile add the following lines:
|
2. To your makefile add the following lines:
|
||||||
include $(GFXLIB)/gfx.mk
|
include $(GFXLIB)/gfx.mk
|
||||||
include $(GFXLIB)/drivers/multiple/Win32/driver.mk
|
include $(GFXLIB)/drivers/multiple/Win32/driver.mk
|
||||||
|
|
||||||
However, consider using the Win32 board file instead as this does include all
|
However, consider using the Win32 board file instead as this does include all
|
||||||
the possible drivers that can be used (eg. for the GAUDIO module) by using:
|
the possible drivers that can be used (eg. for the GAUDIO module) by using:
|
||||||
|
|
||||||
include $(GFXLIB)/gfx.mk
|
include $(GFXLIB)/gfx.mk
|
||||||
include $(GFXLIB)/boards/base/Win32/board.mk
|
include $(GFXLIB)/boards/base/Win32/board.mk
|
||||||
|
|
||||||
|
|
||||||
3. Modify your makefile to add -lws2_32 and -lgdi32 to the DLIBS line. i.e.
|
3. Modify your makefile to add -lws2_32 and -lgdi32 to the DLIBS line. i.e.
|
||||||
DLIBS = -lws2_32 -lgdi32
|
DLIBS = -lws2_32 -lgdi32
|
||||||
|
|
|
@ -1,14 +0,0 @@
|
||||||
set(ROOT_PATH ${UGFX_ROOT}/drivers/multiple/X)
|
|
||||||
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${ROOT_PATH}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${ROOT_PATH}/gdisp_lld_X.c
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_LIBS
|
|
||||||
X11
|
|
||||||
)
|
|
||||||
|
|
142
gfx.mk
142
gfx.mk
|
@ -1,71 +1,71 @@
|
||||||
# This file is subject to the terms of the GFX License. If a copy of
|
# This file is subject to the terms of the GFX License. If a copy of
|
||||||
# the license was not distributed with this file, you can obtain one at:
|
# the license was not distributed with this file, you can obtain one at:
|
||||||
#
|
#
|
||||||
# http://ugfx.io/license.html
|
# http://ugfx.io/license.html
|
||||||
|
|
||||||
GFXINC += $(GFXLIB)
|
GFXINC += $(GFXLIB)
|
||||||
|
|
||||||
ifeq ($(GFXSINGLEMAKE),yes)
|
ifeq ($(GFXSINGLEMAKE),yes)
|
||||||
GFXSRC += $(GFXLIB)/src/gfx_mk.c
|
GFXSRC += $(GFXLIB)/src/gfx_mk.c
|
||||||
else
|
else
|
||||||
GFXSRC += $(GFXLIB)/src/gfx.c
|
GFXSRC += $(GFXLIB)/src/gfx.c
|
||||||
include $(GFXLIB)/src/gos/gos.mk
|
include $(GFXLIB)/src/gos/gos.mk
|
||||||
include $(GFXLIB)/src/gdriver/gdriver.mk
|
include $(GFXLIB)/src/gdriver/gdriver.mk
|
||||||
include $(GFXLIB)/src/gqueue/gqueue.mk
|
include $(GFXLIB)/src/gqueue/gqueue.mk
|
||||||
include $(GFXLIB)/src/gdisp/gdisp.mk
|
include $(GFXLIB)/src/gdisp/gdisp.mk
|
||||||
include $(GFXLIB)/src/gevent/gevent.mk
|
include $(GFXLIB)/src/gevent/gevent.mk
|
||||||
include $(GFXLIB)/src/gtimer/gtimer.mk
|
include $(GFXLIB)/src/gtimer/gtimer.mk
|
||||||
include $(GFXLIB)/src/gwin/gwin.mk
|
include $(GFXLIB)/src/gwin/gwin.mk
|
||||||
include $(GFXLIB)/src/ginput/ginput.mk
|
include $(GFXLIB)/src/ginput/ginput.mk
|
||||||
include $(GFXLIB)/src/gadc/gadc.mk
|
include $(GFXLIB)/src/gadc/gadc.mk
|
||||||
include $(GFXLIB)/src/gaudio/gaudio.mk
|
include $(GFXLIB)/src/gaudio/gaudio.mk
|
||||||
include $(GFXLIB)/src/gmisc/gmisc.mk
|
include $(GFXLIB)/src/gmisc/gmisc.mk
|
||||||
include $(GFXLIB)/src/gfile/gfile.mk
|
include $(GFXLIB)/src/gfile/gfile.mk
|
||||||
include $(GFXLIB)/src/gtrans/gtrans.mk
|
include $(GFXLIB)/src/gtrans/gtrans.mk
|
||||||
endif
|
endif
|
||||||
|
|
||||||
# Include the boards and drivers
|
# Include the boards and drivers
|
||||||
ifneq ($(GFXBOARD),)
|
ifneq ($(GFXBOARD),)
|
||||||
include $(GFXLIB)/boards/base/$(GFXBOARD)/board.mk
|
include $(GFXLIB)/boards/base/$(GFXBOARD)/board.mk
|
||||||
endif
|
endif
|
||||||
ifneq ($(GFXDRIVERS),)
|
ifneq ($(GFXDRIVERS),)
|
||||||
include $(patsubst %,$(GFXLIB)/drivers/%/driver.mk,$(GFXDRIVERS))
|
include $(patsubst %,$(GFXLIB)/drivers/%/driver.mk,$(GFXDRIVERS))
|
||||||
endif
|
endif
|
||||||
ifneq ($(GFXDEMO),)
|
ifneq ($(GFXDEMO),)
|
||||||
include $(GFXLIB)/demos/$(GFXDEMO)/demo.mk
|
include $(GFXLIB)/demos/$(GFXDEMO)/demo.mk
|
||||||
endif
|
endif
|
||||||
|
|
||||||
# Include the operating system define
|
# Include the operating system define
|
||||||
ifeq ($(OPT_OS),arduino)
|
ifeq ($(OPT_OS),arduino)
|
||||||
GFXDEFS += GFX_USE_OS_ARDUINO=GFXON
|
GFXDEFS += GFX_USE_OS_ARDUINO=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),win32)
|
ifeq ($(OPT_OS),win32)
|
||||||
GFXDEFS += GFX_USE_OS_WIN32=GFXON
|
GFXDEFS += GFX_USE_OS_WIN32=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),win32.chibios)
|
ifeq ($(OPT_OS),win32.chibios)
|
||||||
GFXDEFS += GFX_USE_OS_CHIBIOS=GFXON
|
GFXDEFS += GFX_USE_OS_CHIBIOS=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),win32.raw32)
|
ifeq ($(OPT_OS),win32.raw32)
|
||||||
GFXDEFS += GFX_USE_OS_RAW32=GFXON
|
GFXDEFS += GFX_USE_OS_RAW32=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),linux)
|
ifeq ($(OPT_OS),linux)
|
||||||
GFXDEFS += GFX_USE_OS_LINUX=GFXON
|
GFXDEFS += GFX_USE_OS_LINUX=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),osx)
|
ifeq ($(OPT_OS),osx)
|
||||||
GFXDEFS += GFX_USE_OS_OSX=GFXON
|
GFXDEFS += GFX_USE_OS_OSX=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),chibios)
|
ifeq ($(OPT_OS),chibios)
|
||||||
GFXDEFS += GFX_USE_OS_CHIBIOS=GFXON
|
GFXDEFS += GFX_USE_OS_CHIBIOS=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),freertos)
|
ifeq ($(OPT_OS),freertos)
|
||||||
GFXDEFS += GFX_USE_OS_FREERTOS=GFXON
|
GFXDEFS += GFX_USE_OS_FREERTOS=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),ecos)
|
ifeq ($(OPT_OS),ecos)
|
||||||
GFXDEFS += GFX_USE_OS_ECOS=GFXON
|
GFXDEFS += GFX_USE_OS_ECOS=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),rawrtos)
|
ifeq ($(OPT_OS),rawrtos)
|
||||||
GFXDEFS += GFX_USE_OS_RAWRTOS=GFXON
|
GFXDEFS += GFX_USE_OS_RAWRTOS=GFXON
|
||||||
endif
|
endif
|
||||||
ifeq ($(OPT_OS),raw32)
|
ifeq ($(OPT_OS),raw32)
|
||||||
GFXDEFS += GFX_USE_OS_RAW32=GFXON
|
GFXDEFS += GFX_USE_OS_RAW32=GFXON
|
||||||
endif
|
endif
|
||||||
|
|
|
@ -36,7 +36,6 @@
|
||||||
// #define GFX_FREERTOS_USE_TRACE GFXOFF
|
// #define GFX_FREERTOS_USE_TRACE GFXOFF
|
||||||
//#define GFX_USE_OS_WIN32 GFXOFF
|
//#define GFX_USE_OS_WIN32 GFXOFF
|
||||||
//#define GFX_USE_OS_LINUX GFXOFF
|
//#define GFX_USE_OS_LINUX GFXOFF
|
||||||
//#define GFX_USE_OS_FREEBSD GFXOFF
|
|
||||||
//#define GFX_USE_OS_OSX GFXOFF
|
//#define GFX_USE_OS_OSX GFXOFF
|
||||||
//#define GFX_USE_OS_ECOS GFXOFF
|
//#define GFX_USE_OS_ECOS GFXOFF
|
||||||
//#define GFX_USE_OS_RAWRTOS GFXOFF
|
//#define GFX_USE_OS_RAWRTOS GFXOFF
|
||||||
|
|
10
readme.txt
10
readme.txt
|
@ -1,5 +1,5 @@
|
||||||
Homepage: http://ugfx.io
|
Homepage: http://ugfx.io
|
||||||
Documentation: http://wiki.ugfx.io
|
Documentation: http://wiki.ugfx.io
|
||||||
API-Reference: http://api.ugfx.io
|
API-Reference: http://api.ugfx.io
|
||||||
Forum: http://community.ugfx.io
|
Forum: http://community.ugfx.io
|
||||||
uGFX-Studio: http://studio.ugfx.io
|
uGFX-Studio: http://studio.ugfx.io
|
||||||
|
|
|
@ -1,9 +0,0 @@
|
||||||
set(ROOT_PATH ${UGFX_ROOT}/src/gadc)
|
|
||||||
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${ROOT_PATH}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${ROOT_PATH}/gadc.c
|
|
||||||
)
|
|
|
@ -1,9 +0,0 @@
|
||||||
set(ROOT_PATH ${UGFX_ROOT}/src/gaudio)
|
|
||||||
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${ROOT_PATH}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${ROOT_PATH}/gaudio.c
|
|
||||||
)
|
|
|
@ -47,21 +47,21 @@ GDisplay *GDISP;
|
||||||
#if !NEED_CLIPPING
|
#if !NEED_CLIPPING
|
||||||
#define TEST_CLIP_AREA(g)
|
#define TEST_CLIP_AREA(g)
|
||||||
#elif GDISP_HARDWARE_CLIP == HARDWARE_AUTODETECT
|
#elif GDISP_HARDWARE_CLIP == HARDWARE_AUTODETECT
|
||||||
|
#define TEST_CLIP_AREA(g) \
|
||||||
|
if (!gvmt(g)->setclip) { \
|
||||||
|
if ((g)->p.x < (g)->clipx0) { (g)->p.cx -= (g)->clipx0 - (g)->p.x; (g)->p.x = (g)->clipx0; } \
|
||||||
|
if ((g)->p.y < (g)->clipy0) { (g)->p.cy -= (g)->clipy0 - (g)->p.y; (g)->p.y = (g)->clipy0; } \
|
||||||
|
if ((g)->p.x + (g)->p.cx > (g)->clipx1) (g)->p.cx = (g)->clipx1 - (g)->p.x; \
|
||||||
|
if ((g)->p.y + (g)->p.cy > (g)->clipy1) (g)->p.cy = (g)->clipy1 - (g)->p.y; \
|
||||||
|
} \
|
||||||
|
if ((g)->p.cx > 0 && (g)->p.cy > 0)
|
||||||
|
#else
|
||||||
#define TEST_CLIP_AREA(g) \
|
#define TEST_CLIP_AREA(g) \
|
||||||
if (!gvmt(g)->setclip) { \
|
|
||||||
if ((g)->p.x < (g)->clipx0) { (g)->p.cx -= (g)->clipx0 - (g)->p.x; (g)->p.x = (g)->clipx0; } \
|
if ((g)->p.x < (g)->clipx0) { (g)->p.cx -= (g)->clipx0 - (g)->p.x; (g)->p.x = (g)->clipx0; } \
|
||||||
if ((g)->p.y < (g)->clipy0) { (g)->p.cy -= (g)->clipy0 - (g)->p.y; (g)->p.y = (g)->clipy0; } \
|
if ((g)->p.y < (g)->clipy0) { (g)->p.cy -= (g)->clipy0 - (g)->p.y; (g)->p.y = (g)->clipy0; } \
|
||||||
if ((g)->p.x + (g)->p.cx > (g)->clipx1) (g)->p.cx = (g)->clipx1 - (g)->p.x; \
|
if ((g)->p.x + (g)->p.cx > (g)->clipx1) (g)->p.cx = (g)->clipx1 - (g)->p.x; \
|
||||||
if ((g)->p.y + (g)->p.cy > (g)->clipy1) (g)->p.cy = (g)->clipy1 - (g)->p.y; \
|
if ((g)->p.y + (g)->p.cy > (g)->clipy1) (g)->p.cy = (g)->clipy1 - (g)->p.y; \
|
||||||
} \
|
if ((g)->p.cx > 0 && (g)->p.cy > 0)
|
||||||
if ((g)->p.cx > 0 && (g)->p.cy > 0)
|
|
||||||
#else
|
|
||||||
#define TEST_CLIP_AREA(g) \
|
|
||||||
if ((g)->p.x < (g)->clipx0) { (g)->p.cx -= (g)->clipx0 - (g)->p.x; (g)->p.x = (g)->clipx0; } \
|
|
||||||
if ((g)->p.y < (g)->clipy0) { (g)->p.cy -= (g)->clipy0 - (g)->p.y; (g)->p.y = (g)->clipy0; } \
|
|
||||||
if ((g)->p.x + (g)->p.cx > (g)->clipx1) (g)->p.cx = (g)->clipx1 - (g)->p.x; \
|
|
||||||
if ((g)->p.y + (g)->p.cy > (g)->clipy1) (g)->p.cy = (g)->clipy1 - (g)->p.y; \
|
|
||||||
if ((g)->p.cx > 0 && (g)->p.cy > 0)
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*==========================================================================*/
|
/*==========================================================================*/
|
||||||
|
@ -89,14 +89,14 @@ GDisplay *GDISP;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if GDISP_HARDWARE_STREAM_POS && GDISP_HARDWARE_STREAM_WRITE
|
#if GDISP_HARDWARE_STREAM_POS && GDISP_HARDWARE_STREAM_WRITE
|
||||||
#define autoflush(g) \
|
#define autoflush(g) \
|
||||||
{ \
|
{ \
|
||||||
if ((g->flags & GDISP_FLG_SCRSTREAM)) { \
|
if ((g->flags & GDISP_FLG_SCRSTREAM)) { \
|
||||||
gdisp_lld_write_stop(g); \
|
gdisp_lld_write_stop(g); \
|
||||||
g->flags &= ~GDISP_FLG_SCRSTREAM; \
|
g->flags &= ~GDISP_FLG_SCRSTREAM; \
|
||||||
} \
|
} \
|
||||||
autoflush_stopdone(g); \
|
autoflush_stopdone(g); \
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
#define autoflush(g) autoflush_stopdone(g)
|
#define autoflush(g) autoflush_stopdone(g)
|
||||||
#endif
|
#endif
|
||||||
|
@ -569,9 +569,9 @@ void _gdispInit(void)
|
||||||
#if defined(GDISP_DRIVER_LIST)
|
#if defined(GDISP_DRIVER_LIST)
|
||||||
{
|
{
|
||||||
unsigned i;
|
unsigned i;
|
||||||
typedef const GDISPVMT GDISPVMTLIST[1];
|
typedef const GDISPVMT const GDISPVMTLIST[1];
|
||||||
|
|
||||||
static const GDISPVMT* dclist[] = { GDISP_DRIVER_LIST };
|
static const GDISPVMT * const dclist[] = {GDISP_DRIVER_LIST};
|
||||||
|
|
||||||
for(i = 0; i < sizeof(dclist)/sizeof(dclist[0]); i++) {
|
for(i = 0; i < sizeof(dclist)/sizeof(dclist[0]); i++) {
|
||||||
if (!(dclist[i]->d.flags & GDISP_VFLG_DYNAMICONLY))
|
if (!(dclist[i]->d.flags & GDISP_VFLG_DYNAMICONLY))
|
||||||
|
@ -2885,10 +2885,6 @@ void gdispGBlitArea(GDisplay *g, gCoord x, gCoord y, gCoord cx, gCoord cy, gCoor
|
||||||
case gOrientationPortrait:
|
case gOrientationPortrait:
|
||||||
g->p.ptr = g->g.Width >= g->g.Height ? (void *)gOrientation90 : (void *)gOrientation0;
|
g->p.ptr = g->g.Width >= g->g.Height ? (void *)gOrientation90 : (void *)gOrientation0;
|
||||||
break;
|
break;
|
||||||
case gOrientation0:
|
|
||||||
case gOrientation90:
|
|
||||||
case gOrientation180:
|
|
||||||
case gOrientation270:
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,27 +0,0 @@
|
||||||
set(ROOT_PATH ${UGFX_ROOT}/src/gdisp)
|
|
||||||
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${ROOT_PATH}
|
|
||||||
${ROOT_PATH}/mcufont
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${ROOT_PATH}/gdisp.c
|
|
||||||
${ROOT_PATH}/gdisp_fonts.c
|
|
||||||
${ROOT_PATH}/gdisp_pixmap.c
|
|
||||||
${ROOT_PATH}/gdisp_image.c
|
|
||||||
${ROOT_PATH}/gdisp_image_native.c
|
|
||||||
${ROOT_PATH}/gdisp_image_gif.c
|
|
||||||
${ROOT_PATH}/gdisp_image_bmp.c
|
|
||||||
${ROOT_PATH}/gdisp_image_jpg.c
|
|
||||||
${ROOT_PATH}/gdisp_image_png.c
|
|
||||||
|
|
||||||
${ROOT_PATH}/mcufont/mf_encoding.c
|
|
||||||
${ROOT_PATH}/mcufont/mf_font.c
|
|
||||||
${ROOT_PATH}/mcufont/mf_justify.c
|
|
||||||
${ROOT_PATH}/mcufont/mf_kerning.c
|
|
||||||
${ROOT_PATH}/mcufont/mf_rlefont.c
|
|
||||||
${ROOT_PATH}/mcufont/mf_bwfont.c
|
|
||||||
${ROOT_PATH}/mcufont/mf_scaledfont.c
|
|
||||||
${ROOT_PATH}/mcufont/mf_wordwrap.c
|
|
||||||
)
|
|
|
@ -1,9 +0,0 @@
|
||||||
set(ROOT_PATH ${UGFX_ROOT}/src/gdriver)
|
|
||||||
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${ROOT_PATH}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${ROOT_PATH}/gdriver.c
|
|
||||||
)
|
|
|
@ -1,9 +0,0 @@
|
||||||
set(ROOT_PATH ${UGFX_ROOT}/src/gevent)
|
|
||||||
|
|
||||||
list(APPEND ugfx_INCLUDE_DIRS
|
|
||||||
${ROOT_PATH}
|
|
||||||
)
|
|
||||||
|
|
||||||
list(APPEND ugfx_SOURCES
|
|
||||||
${ROOT_PATH}/gevent.c
|
|
||||||
)
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue