113 lines
3.8 KiB
C
113 lines
3.8 KiB
C
#include "../../../gfx.h"
|
|
#if GFX_COMPAT_V2 && GFX_COMPAT_OLDCOLORS
|
|
#undef Red
|
|
#undef Green
|
|
#undef Blue
|
|
#endif
|
|
#include "stm32f4xx.h"
|
|
#include "stm32f4xx_hal.h"
|
|
|
|
#if !GFX_USE_OS_CHIBIOS
|
|
systemticks_t gfxSystemTicks(void)
|
|
{
|
|
return HAL_GetTick();
|
|
}
|
|
|
|
systemticks_t gfxMillisecondsToTicks(delaytime_t ms)
|
|
{
|
|
return ms;
|
|
}
|
|
#endif
|
|
|
|
static void SystemClock_Config(void);
|
|
|
|
void Raw32OSInit(void) {
|
|
|
|
/* STM32F4xx HAL library initialization:
|
|
- Configure the Flash prefetch, instruction and Data caches
|
|
- Systick timer is configured by default as source of time base, but user
|
|
can eventually implement his proper time base source (a general purpose
|
|
timer for example or other time source), keeping in mind that Time base
|
|
duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
|
|
handled in milliseconds basis.
|
|
- Set NVIC Group Priority to 4
|
|
- Low Level Initialization: global MSP (MCU Support Package) initialization
|
|
*/
|
|
HAL_Init();
|
|
|
|
/* Configure the system clock to 216 MHz */
|
|
SystemClock_Config();
|
|
}
|
|
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* The system Clock is configured as follow :
|
|
* System Clock source = PLL (HSE)
|
|
* SYSCLK(Hz) = 180000000
|
|
* HCLK(Hz) = 180000000
|
|
* AHB Prescaler = 1
|
|
* APB1 Prescaler = 4
|
|
* APB2 Prescaler = 2
|
|
* HSE Frequency(Hz) = 8000000
|
|
* PLL_M = 8
|
|
* PLL_N = 360
|
|
* PLL_P = 2
|
|
* PLL_Q = 7
|
|
* PLL_R = 6
|
|
* VDD(V) = 3.3
|
|
* Main regulator output voltage = Scale1 mode
|
|
* Flash Latency(WS) = 5
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void SystemClock_Config(void)
|
|
{
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
|
|
|
/* Enable Power Control clock */
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
|
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
|
clocked below the maximum system frequency, to update the voltage scaling value
|
|
regarding system frequency refer to product datasheet. */
|
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
|
|
|
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
#if defined(USE_STM32469I_DISCO_REVA)
|
|
RCC_OscInitStruct.PLL.PLLM = 25;
|
|
#else
|
|
RCC_OscInitStruct.PLL.PLLM = 8;
|
|
#endif /* USE_STM32469I_DISCO_REVA */
|
|
RCC_OscInitStruct.PLL.PLLN = 360;
|
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
|
RCC_OscInitStruct.PLL.PLLQ = 7;
|
|
RCC_OscInitStruct.PLL.PLLR = 6;
|
|
|
|
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
{
|
|
while(1);
|
|
}
|
|
/* Enable the OverDrive to reach the 180 Mhz Frequency */
|
|
if(HAL_PWREx_EnableOverDrive() != HAL_OK)
|
|
{
|
|
while(1);
|
|
}
|
|
|
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
|
clocks dividers */
|
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
|
if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
|
|
{
|
|
while(1);
|
|
}
|
|
}
|