122 lines
3.5 KiB
C
122 lines
3.5 KiB
C
#include "gfx.h"
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#include "stm32f7xx_hal.h"
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systemticks_t gfxSystemTicks(void)
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{
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return HAL_GetTick();
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}
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systemticks_t gfxMillisecondsToTicks(delaytime_t ms)
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{
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return ms;
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}
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static void SystemClock_Config(void);
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static void CPU_CACHE_Enable(void);
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void Raw32OSInit(void) {
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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/* Enable the CPU Cache */
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CPU_CACHE_Enable();
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/* STM32F7xx HAL library initialization:
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- Configure the Flash ART accelerator on ITCM interface
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- Configure the Systick to generate an interrupt each 1 msec
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- Set NVIC Group Priority to 4
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- Global MSP (MCU Support Package) initialization
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*/
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HAL_Init();
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/* Configure the system clock to 216 MHz */
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SystemClock_Config();
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// LED - for testing
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GPIO_InitTypeDef GPIO_InitStruct;
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GPIO_InitStruct.Pin = GPIO_PIN_1;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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__GPIOI_CLK_ENABLE();
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HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
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}
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/**
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* @brief System Clock Configuration
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* The system Clock is configured as follow :
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* System Clock source = PLL (HSE)
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* SYSCLK(Hz) = 200000000 / 216000000
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* HCLK(Hz) = 200000000 / 216000000
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* AHB Prescaler = 1
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* APB1 Prescaler = 4
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* APB2 Prescaler = 2
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* HSE Frequency(Hz) = 25000000
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* PLL_M = 25
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* PLL_N = 400 / 432
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* PLL_P = 2
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* PLL_Q = 8 / 9
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* VDD(V) = 3.3
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* Main regulator output voltage = Scale1 mode
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* Flash Latency(WS) = 6 / 7
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* @param None
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct;
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HAL_StatusTypeDef ret = HAL_OK;
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 25;
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RCC_OscInitStruct.PLL.PLLN = 400; // 432
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 8; // 9
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ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
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if(ret != HAL_OK)
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{
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while(1) { ; }
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}
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/* Activate the OverDrive to reach the 200/216 MHz Frequency */
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ret = HAL_PWREx_EnableOverDrive();
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if(ret != HAL_OK)
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{
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while(1) { ; }
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}
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/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6); // FLASH_LATENCY_7
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if(ret != HAL_OK)
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{
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while(1) { ; }
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}
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}
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/**
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* @brief CPU L1-Cache enable.
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* @param None
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* @retval None
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*/
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static void CPU_CACHE_Enable(void)
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{
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/* Enable I-Cache */
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SCB_EnableICache();
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/* Enable D-Cache */
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SCB_EnableDCache();
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}
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