116 lines
3.0 KiB
C
116 lines
3.0 KiB
C
/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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/*
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driver quickly hacked together from a chinese sourcecode that came
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with the board and existing ili9320 code by Chris van Dongen (sjaak)
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(sjaak2002 at msn.com)
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Also added rotation for 180 and 270 degrees and minor tweaks to
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setcursor
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Added code comes without warranty and free bugs. Feel free to use
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or misuse the added code :D
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*/
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/**
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* @file boards/addons/gdisp/board_ILI9325_hy_stm32_100p.h
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* @brief GDISP Graphic Driver subsystem board SPI interface for the ILI9325 display.
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*
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* @note This file contains a mix of hardware specific and operating system specific
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* code. You will need to change it for your CPU and/or operating system.
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*/
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#ifndef GDISP_LLD_BOARD_H
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#define GDISP_LLD_BOARD_H
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// For a multiple display configuration we would put all this in a structure and then
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// set g->board to that structure.
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#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
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#define GDISP_RAM (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
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static GFXINLINE void init_board(GDisplay *g) {
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// As we are not using multiple displays we set g->board to NULL as we don't use it.
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g->board = 0;
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switch(g->controllerdisplay) {
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case 0: // Set up for Display 0
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/* FSMC setup for F1 */
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rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
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/* set pin modes */
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/* IOBus busD = {GPIOD, PAL_WHOLE_PORT, 0};
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IOBus busE = {GPIOE, PAL_WHOLE_PORT, 0};
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palSetBusMode(&busD, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetBusMode(&busE, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetPadMode(GPIOE, GPIOE_TFT_RST, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOD, GPIOD_TFT_LIGHT, PAL_MODE_OUTPUT_PUSHPULL); */
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const unsigned char FSMC_Bank = 0;
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/* FSMC timing */
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FSMC_Bank1->BTCR[FSMC_Bank+1] = (6) | (10 << 8) | (10 << 16);
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/* Bank1 NOR/SRAM control register configuration
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* This is actually not needed as already set by default after reset */
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FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
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break;
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}
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}
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static GFXINLINE void post_init_board(GDisplay *g) {
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(void) g;
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}
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static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
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(void) g;
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if(state)
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palClearPad(GPIOE, GPIOE_TFT_RST);
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else
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palSetPad(GPIOE, GPIOE_TFT_RST);
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}
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static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
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(void) g;
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(void)percent;
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}
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static GFXINLINE void acquire_bus(GDisplay *g) {
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(void) g;
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}
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static GFXINLINE void release_bus(GDisplay *g) {
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(void) g;
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}
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static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
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(void) g;
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GDISP_REG = index;
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}
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static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
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(void) g;
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GDISP_RAM = data;
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}
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static GFXINLINE void setreadmode(GDisplay *g) {
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(void) g;
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}
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static GFXINLINE void setwritemode(GDisplay *g) {
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(void) g;
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}
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static GFXINLINE uint16_t read_data(GDisplay *g) {
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(void) g;
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return GDISP_RAM;
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}
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#endif /* GDISP_LLD_BOARD_H */
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