2013-10-18 06:45:35 +00:00
|
|
|
/*
|
|
|
|
* This file is subject to the terms of the GFX License. If a copy of
|
|
|
|
* the license was not distributed with this file, you can obtain one at:
|
|
|
|
*
|
2018-10-01 15:32:39 +00:00
|
|
|
* http://ugfx.io/license.html
|
2013-10-18 06:45:35 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef GDISP_LLD_BOARD_H
|
|
|
|
#define GDISP_LLD_BOARD_H
|
|
|
|
|
|
|
|
// For a multiple display configuration we would put all this in a structure and then
|
2013-10-21 07:11:07 +00:00
|
|
|
// set g->board to that structure.
|
2018-11-03 00:51:23 +00:00
|
|
|
#define GDISP_REG (*((volatile gU16 *) 0x60000000)) /* RS = 0 */
|
|
|
|
#define GDISP_RAM (*((volatile gU16 *) 0x60100000)) /* RS = 1 */
|
2013-10-18 06:45:35 +00:00
|
|
|
|
2015-10-23 08:24:49 +00:00
|
|
|
static GFXINLINE void init_board(GDisplay *g) {
|
2013-10-18 06:45:35 +00:00
|
|
|
|
2013-10-21 05:13:10 +00:00
|
|
|
// As we are not using multiple displays we set g->board to NULL as we don't use it.
|
|
|
|
g->board = 0;
|
2013-10-18 06:45:35 +00:00
|
|
|
|
2013-10-19 05:36:05 +00:00
|
|
|
switch(g->controllerdisplay) {
|
|
|
|
case 0: // Set up for Display 0
|
2013-10-18 06:45:35 +00:00
|
|
|
/* FSMC setup for F1 */
|
|
|
|
rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
|
|
|
|
|
|
|
|
/* set pin modes */
|
|
|
|
IOBus busD = {GPIOD, PAL_WHOLE_PORT, 0};
|
|
|
|
IOBus busE = {GPIOE, PAL_WHOLE_PORT, 0};
|
|
|
|
palSetBusMode(&busD, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
|
|
|
|
palSetBusMode(&busE, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
|
|
|
|
palSetPadMode(GPIOE, GPIOE_TFT_RST, PAL_MODE_OUTPUT_PUSHPULL);
|
|
|
|
palSetPadMode(GPIOD, GPIOD_TFT_LIGHT, PAL_MODE_OUTPUT_PUSHPULL);
|
|
|
|
|
|
|
|
/* FSMC timing */
|
|
|
|
FSMC_Bank1->BTCR[0+1] = (6) | (10 << 8) | (10 << 16);
|
|
|
|
|
|
|
|
/* Bank1 NOR/SRAM control register configuration
|
|
|
|
* This is actually not needed as already set by default after reset */
|
|
|
|
FSMC_Bank1->BTCR[0] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
|
2013-10-19 05:36:05 +00:00
|
|
|
break;
|
2013-10-18 06:45:35 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-10-23 08:24:49 +00:00
|
|
|
static GFXINLINE void post_init_board(GDisplay *g) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
|
|
|
}
|
|
|
|
|
2018-06-23 03:02:07 +00:00
|
|
|
static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
2013-11-10 21:29:36 +00:00
|
|
|
|
2013-10-18 06:45:35 +00:00
|
|
|
if(state)
|
|
|
|
palClearPad(GPIOE, GPIOE_TFT_RST);
|
|
|
|
else
|
|
|
|
palSetPad(GPIOE, GPIOE_TFT_RST);
|
|
|
|
}
|
|
|
|
|
2018-11-03 00:51:23 +00:00
|
|
|
static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
2013-11-10 21:29:36 +00:00
|
|
|
|
2013-10-18 06:45:35 +00:00
|
|
|
if(percent)
|
|
|
|
palClearPad(GPIOD, GPIOD_TFT_LIGHT);
|
|
|
|
else
|
|
|
|
palSetPad(GPIOD, GPIOD_TFT_LIGHT);
|
|
|
|
}
|
|
|
|
|
2015-10-23 08:24:49 +00:00
|
|
|
static GFXINLINE void acquire_bus(GDisplay *g) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
|
|
|
}
|
|
|
|
|
2015-10-23 08:24:49 +00:00
|
|
|
static GFXINLINE void release_bus(GDisplay *g) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
|
|
|
}
|
|
|
|
|
2018-11-03 00:51:23 +00:00
|
|
|
static GFXINLINE void write_index(GDisplay *g, gU16 index) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
2013-11-10 21:29:36 +00:00
|
|
|
|
2013-10-18 06:45:35 +00:00
|
|
|
GDISP_REG = index;
|
|
|
|
}
|
|
|
|
|
2018-11-03 00:51:23 +00:00
|
|
|
static GFXINLINE void write_data(GDisplay *g, gU16 data) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
2013-11-10 21:29:36 +00:00
|
|
|
|
2013-10-18 06:45:35 +00:00
|
|
|
GDISP_RAM = data;
|
|
|
|
}
|
|
|
|
|
2015-10-23 08:24:49 +00:00
|
|
|
static GFXINLINE void setreadmode(GDisplay *g) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
|
|
|
}
|
|
|
|
|
2015-10-23 08:24:49 +00:00
|
|
|
static GFXINLINE void setwritemode(GDisplay *g) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
|
|
|
}
|
|
|
|
|
2018-11-03 00:51:23 +00:00
|
|
|
static GFXINLINE gU16 read_data(GDisplay *g) {
|
2013-10-18 06:45:35 +00:00
|
|
|
(void) g;
|
2013-11-10 21:29:36 +00:00
|
|
|
|
2013-10-18 06:45:35 +00:00
|
|
|
return GDISP_RAM;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* GDISP_LLD_BOARD_H */
|
2013-11-10 21:29:36 +00:00
|
|
|
|