2015-02-07 13:33:49 +00:00
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/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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2018-10-01 15:32:39 +00:00
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* http://ugfx.io/license.html
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2015-02-07 13:33:49 +00:00
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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#include "board_uext.h"
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2015-05-09 13:39:52 +00:00
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/*
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* NOTE: This board file is for an SSD1306 running in SPI mode
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* You will need to use a different board file for an SSD1306 running in I2C mode
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*/
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2015-02-07 13:33:49 +00:00
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// The various methods of driving the SPI interface
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#define SPI_METHOD_PIO 1
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#define SPI_METHOD_AT91 2
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#define SPI_METHOD_CHIBIOS 3 // ChibiOS SPI for AT91SAM7 requires patch 7675 or higher to work correctly
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// The various methods of driving the PIO interface
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#define PIO_METHOD_AT91 1
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#define PIO_METHOD_CHIBIOS 2 // ChibiOS PIO for the AT91SAM7 requires patch 7669 or higher to work correctly
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// What methods are we using in this file
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#define SPI_METHOD SPI_METHOD_AT91
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#define PIO_METHOD PIO_METHOD_AT91
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// If using SPI_METHOD_CHIBIOS or SPI_METHOD_AT91 then this must be defined for your CPU
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#define SPI_CONFIG_REGISTER 0x00000801 // For AT91SAM7: 8bit, CPOL=1, NCPHA = 0, ClockPhase=0, SCLK = 48Mhz/8 = 6MHz
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//---------------------------------------------------------------------
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2015-05-09 13:39:52 +00:00
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/*
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* Pin connection for the display to the UEXT connector:
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*
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* DISPLAY VCC UEXT PIN 1 (3.3V)
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* DISPLAY GND UEXT PIN 2 (GND)
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* DISPLAY SCL UEXT PIN 9 (SCK)
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* DISPLAY SDA UEXT PIN 8 (MOSI)
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* DISPLAY RST UEXT PIN 5 (SCL)
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* DISPLAY D/C UEXT PIN 6 (SDA)
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*/
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2015-02-07 13:33:49 +00:00
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#define PORT_RESET UEXT_PORT_PIN5
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#define PIN_RESET UEXT_PORTPIN_PIN5
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#define PORT_DC UEXT_PORT_PIN6
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#define PIN_DC UEXT_PORTPIN_PIN6
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#if PIO_METHOD == PIO_METHOD_AT91
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#define PinIsOutput(port,pin) ((port)->PIO_OER = 1 << (pin), (port)->PIO_PER = 1 << (pin), (port)->PIO_MDDR = 1 << (pin), (port)->PIO_PPUDR = 1 << (pin))
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#define PinSet(port,pin) (port)->PIO_SODR = 1 << (pin)
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#define PinClear(port,pin) (port)->PIO_CODR = 1 << (pin)
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#elif PIO_METHOD == PIO_METHOD_CHIBIOS
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#define PinIsOutput(port,pin) palSetPadMode((port), (pin), PAL_MODE_OUTPUT_PUSHPULL)
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#define PinSet(port,pin) palSetPad((port), (pin))
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#define PinClear(port,pin) palClearPad((port), (pin))
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#else
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2015-05-09 13:39:52 +00:00
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#error "SSD1306 board file: Unsupported PIO method"
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2015-02-07 13:33:49 +00:00
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#endif
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#if SPI_METHOD == SPI_METHOD_PIO
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static void spi_delay(volatile unsigned long a) { while (a!=0) a--; }
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2018-11-03 00:51:23 +00:00
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static void spi_write(gU8 data) {
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gU8 bit;
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2015-02-07 13:33:49 +00:00
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for(bit = 0x80; bit; bit >>= 1) {
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if(data & bit)
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PinSet(UEXT_SPI_MOSI_PORT, UEXT_SPI_MOSI_PORTPIN);
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else
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PinClear(UEXT_SPI_MOSI_PORT, UEXT_SPI_MOSI_PORTPIN);
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spi_delay(1);
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PinClear(UEXT_SPI_SCK_PORT, UEXT_SPI_SCK_PORTPIN);
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spi_delay(1);
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PinSet(UEXT_SPI_SCK_PORT, UEXT_SPI_SCK_PORTPIN);
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}
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}
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#define SPI_INIT() { \
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PinIsOutput (UEXT_SPI_MOSI_PORT, UEXT_SPI_MOSI_PORTPIN); \
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PinSet (UEXT_SPI_MOSI_PORT, UEXT_SPI_MOSI_PORTPIN); \
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PinIsOutput (UEXT_SPI_SCK_PORT, UEXT_SPI_SCK_PORTPIN); \
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PinSet (UEXT_SPI_SCK_PORT, UEXT_SPI_SCK_PORTPIN); \
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PinIsOutput (UEXT_SPI_CS_PORT, UEXT_SPI_CS_PORTPIN); \
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PinSet (UEXT_SPI_CS_PORT, UEXT_SPI_CS_PORTPIN); \
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}
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#define SPI_GETBUS() PinClear(UEXT_SPI_CS_PORT, UEXT_SPI_CS_PORTPIN)
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#define SPI_RELEASEBUS() PinSet(UEXT_SPI_CS_PORT, UEXT_SPI_CS_PORTPIN)
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#define SPI_WAITCOMPLETE()
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#define SPI_WRITEBYTE(data) spi_write(data)
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#define SPI_WRITEBYTES(pdata, len) while(len--) spi_write(*pdata++)
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#elif SPI_METHOD == SPI_METHOD_AT91
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#if UEXT_SPI_SCK_PORTPIN == 22
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// Assume it is on SPI1
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#define UEXT_SPI_DEV AT91C_BASE_SPI1
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#define UEXT_SPI_ID AT91C_ID_SPI1
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#define UEXT_SPI_PORT AT91C_BASE_PIOA
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#define UEXT_SPI_PERIPH PIO_BSR
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#else
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// Assume it is on SPI0
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#define UEXT_SPI_DEV AT91C_BASE_SPI0
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#define UEXT_SPI_ID AT91C_ID_SPI0
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#define UEXT_SPI_PORT AT91C_BASE_PIOA
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#define UEXT_SPI_PERIPH PIO_ASR
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#endif
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#define SPI_INIT() { \
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UEXT_SPI_PORT->PIO_MDDR = (1<<UEXT_SPI_CS_PORTPIN) | (1<<UEXT_SPI_SCK_PORTPIN) | (1<<UEXT_SPI_MOSI_PORTPIN) | (1<<UEXT_SPI_MISO_PORTPIN); \
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UEXT_SPI_PORT->PIO_PPUER = 1<<UEXT_SPI_MISO_PORTPIN; \
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UEXT_SPI_PORT->PIO_PDR = (1<<UEXT_SPI_CS_PORTPIN) | (1<<UEXT_SPI_SCK_PORTPIN) | (1<<UEXT_SPI_MOSI_PORTPIN) | (1<<UEXT_SPI_MISO_PORTPIN); \
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UEXT_SPI_PORT->UEXT_SPI_PERIPH = (1<<UEXT_SPI_CS_PORTPIN) | (1<<UEXT_SPI_SCK_PORTPIN) | (1<<UEXT_SPI_MOSI_PORTPIN) | (1<<UEXT_SPI_MISO_PORTPIN); \
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AT91C_BASE_PMC->PMC_PCER = 1 << UEXT_SPI_ID; \
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UEXT_SPI_DEV->SPI_CR = 0x81; \
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UEXT_SPI_DEV->SPI_CR = 0x81; \
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UEXT_SPI_DEV->SPI_CR = 0x01; \
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UEXT_SPI_DEV->SPI_MR = 0x000E0011; \
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UEXT_SPI_DEV->SPI_CSR[0] = SPI_CONFIG_REGISTER; \
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}
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#define SPI_WAITCOMPLETE() while(!(UEXT_SPI_DEV->SPI_SR & AT91C_SPI_TXEMPTY))
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#define SPI_GETBUS()
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#define SPI_RELEASEBUS()
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#define SPI_WRITEBYTE(data) { \
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while(!(UEXT_SPI_DEV->SPI_SR & AT91C_SPI_TDRE)); \
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UEXT_SPI_DEV->SPI_TDR = data; \
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}
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#define SPI_WRITEBYTES(pdata, len) while(len--) SPI_WRITEBYTE(*pdata++)
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#elif SPI_METHOD == SPI_METHOD_CHIBIOS
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static const SPIConfig spiconfig = {
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0,
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/* HW dependent part.*/
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UEXT_SPI_CS_PORT,
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UEXT_SPI_CS_PORTPIN,
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SPI_CONFIG_REGISTER
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};
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#define SPI_INIT()
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#define SPI_GETBUS() { \
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spiStart(UEXT_SPI, &spiconfig); \
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spiSelect(UEXT_SPI); \
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}
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#define SPI_RELEASEBUS() { \
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spiUnselect(UEXT_SPI); \
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spiStop(UEXT_SPI); \
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}
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#define SPI_WAITCOMPLETE()
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#define SPI_WRITEBYTE(data) spiSend(UEXT_SPI, 1, &data)
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#define SPI_WRITEBYTES(pdata, len) spiSend(UEXT_SPI, len, pdata)
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#else
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2015-05-09 13:39:52 +00:00
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#error "SSD1306 board file: Unsupported SPI method"
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2015-02-07 13:33:49 +00:00
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#endif
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2015-10-23 08:24:49 +00:00
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static GFXINLINE void init_board(GDisplay *g) {
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2015-02-07 13:33:49 +00:00
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(void) g;
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PinIsOutput (PORT_DC, PIN_DC);
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PinIsOutput (PORT_RESET, PIN_RESET);
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PinSet (PORT_RESET, PIN_RESET);
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SPI_INIT();
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}
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2015-10-23 08:24:49 +00:00
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static GFXINLINE void post_init_board(GDisplay *g) {
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2015-02-07 13:33:49 +00:00
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(void) g;
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}
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2018-06-23 03:02:07 +00:00
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static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
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2015-02-07 13:33:49 +00:00
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(void) g;
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(void) state;
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if (state)
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PinClear(PORT_RESET, PIN_RESET);
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else
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PinSet(PORT_RESET, PIN_RESET);
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}
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2018-11-03 00:51:23 +00:00
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static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
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2015-02-07 13:33:49 +00:00
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(void) g;
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(void) percent;
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}
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2015-10-23 08:24:49 +00:00
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static GFXINLINE void acquire_bus(GDisplay *g) {
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2015-02-07 13:33:49 +00:00
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(void) g;
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SPI_GETBUS();
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}
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2015-10-23 08:24:49 +00:00
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static GFXINLINE void release_bus(GDisplay *g) {
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2015-02-07 13:33:49 +00:00
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(void) g;
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SPI_WAITCOMPLETE();
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SPI_RELEASEBUS();
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}
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2018-11-03 00:51:23 +00:00
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static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) {
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2015-02-07 13:33:49 +00:00
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(void) g;
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// Command mode please
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SPI_WAITCOMPLETE();
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PinClear(PORT_DC, PIN_DC);
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SPI_WRITEBYTE(cmd);
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}
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2018-11-03 00:51:23 +00:00
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static GFXINLINE void write_data(GDisplay *g, gU8* data, gU16 length) {
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2015-02-07 13:33:49 +00:00
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(void) g;
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// Data mode please
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SPI_WAITCOMPLETE();
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PinSet(PORT_DC, PIN_DC);
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SPI_WRITEBYTES(data, length);
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}
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#endif /* _GDISP_LLD_BOARD_H */
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